From fb81e59ccbea6753d6ccd87f113bcc7a77440b72 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad@amd.com>
Date: Thu, 26 Feb 2026 22:09:53 +0000
Subject: [PATCH] [Clang] Fix typo "LABLE" in test checks (#178449)

---
 clang/test/AST/HLSL/WaveSize.hlsl                          | 6 +++---
 clang/test/CodeGen/aix-builtin-cpu-supports.c              | 6 +++---
 clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp | 2 +-
 clang/test/CodeGenCXX/vtable-assume-load.cpp               | 2 +-
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/clang/test/AST/HLSL/WaveSize.hlsl b/clang/test/AST/HLSL/WaveSize.hlsl
index 44a7bfab1788..605666d7d92f 100644
--- a/clang/test/AST/HLSL/WaveSize.hlsl
+++ b/clang/test/AST/HLSL/WaveSize.hlsl
@@ -1,6 +1,6 @@
 // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.8-library -x hlsl -ast-dump -o - %s | FileCheck %s
 
-// CHECK-LABLE:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w0 'void ()'
+// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} {{.*}} w0 'void ()'
 // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 128 0 0
  [numthreads(8,8,1)]
  [WaveSize(128)]
@@ -9,7 +9,7 @@
 
 
 
-// CHECK-LABLE:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w1 'void ()'
+// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} {{.*}} w1 'void ()'
 // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 64 0
  [numthreads(8,8,1)]
  [WaveSize(8, 64)]
@@ -17,7 +17,7 @@
  }
 
 
-// CHECK-LABLE:FunctionDecl 0x{{[0-9a-f]+}} <{{.*}}> w2 'void ()'
+// CHECK-LABEL:FunctionDecl 0x{{[0-9a-f]+}} {{.*}} w2 'void ()'
 // CHECK:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 128 64
 // Duplicate WaveSize attribute will be ignored.
 // CHECK-NOT:HLSLWaveSizeAttr 0x{{[0-9a-f]+}} <{{.*}}> 8 128 64
diff --git a/clang/test/CodeGen/aix-builtin-cpu-supports.c b/clang/test/CodeGen/aix-builtin-cpu-supports.c
index 52073ddfe0fd..6581f7453071 100644
--- a/clang/test/CodeGen/aix-builtin-cpu-supports.c
+++ b/clang/test/CodeGen/aix-builtin-cpu-supports.c
@@ -39,7 +39,7 @@
 // RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck -DBOOL=1 %s
 
 // RUN: echo "int main() { return __builtin_cpu_supports(\"htm\");}" > %t.c
-// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABLE=59  -DBIT=i64 -DVALUE=0 \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABEL=59  -DBIT=i64 -DVALUE=0 \
 // RUN:   --check-prefixes=CHECKOP,OPRT,SYSCALL
 
 // RUN: echo "int main() { return __builtin_cpu_supports(\"htm-nosc\");}" > %t.c
@@ -55,7 +55,7 @@
 // RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck -DBOOL=1 %s
 
 // RUN: echo "int main() { return __builtin_cpu_supports(\"mma\");}" > %t.c
-// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABLE=62 -DBIT=i64 -DVALUE=0 \
+// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DPOS=1 -DOP=ugt -DLABEL=62 -DBIT=i64 -DVALUE=0 \
 // RUN:   --check-prefixes=CHECKOP,OPRT,SYSCALL
 
 // RUN: echo "int main() { return __builtin_cpu_supports(\"mmu\");}" > %t.c
@@ -154,7 +154,7 @@
 // CHECKOP-NEXT:   store i32 0, ptr %retval, align 4
 
 // SYSCONF-NEXT:   %0 = load i32, ptr getelementptr inbounds ({ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i64, i64, i64, i64, i32, i32, i32, i32, i32, i32, i64, i32, i8, i8, i8, i8, i32, i32, i16, i16, [3 x i32], i32 }, ptr @_system_configuration, i32 0, i32 [[POS]]), align 4
-// SYSCALL-NEXT:  %0 = call i64 @getsystemcfg(i32 [[LABLE]])
+// SYSCALL-NEXT:  %0 = call i64 @getsystemcfg(i32 [[LABEL]])
 
 // OPRT-NEXT:  %1 = icmp [[OP]] [[BIT]] %0, [[VALUE]]
 // OPRT-NEXT:     %conv = zext i1 %1 to i32
diff --git a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
index e8d3a8407cda..2c800ba7f3a1 100644
--- a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
+++ b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
@@ -112,7 +112,7 @@ void g(B *a) { a->foo(); }
 // CHECK3: call{{.*}} void @_ZN5test31CC1Ev(ptr
 // CHECK3: %[[CMP:.*]] = icmp eq ptr addrspace(1) %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr addrspace(1)] }, ptr addrspace(1) @_ZTVN5test31CE, i32 0, i32 0, i32 3)
 // CHECK3: call{{.*}} void @llvm.assume(i1 %[[CMP]])
-// CHECK3-LABLEL: }
+// CHECK3-LABEL: {{^}}}
 void test() {
   C c;
   g(&c);
diff --git a/clang/test/CodeGenCXX/vtable-assume-load.cpp b/clang/test/CodeGenCXX/vtable-assume-load.cpp
index 6ce07d0db1b1..858c23846b14 100644
--- a/clang/test/CodeGenCXX/vtable-assume-load.cpp
+++ b/clang/test/CodeGenCXX/vtable-assume-load.cpp
@@ -111,7 +111,7 @@ void g(B *a) { a->foo(); }
 // CHECK3: call void @_ZN5test31CC1Ev(ptr
 // CHECK3: %[[CMP:.*]] = icmp eq ptr %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr] }, ptr @_ZTVN5test31CE, i32 0, i32 0, i32 3)
 // CHECK3: call void @llvm.assume(i1 %[[CMP]])
-// CHECK3-LABLEL: }
+// CHECK3-LABEL: {{^}}}
 void test() {
   C c;
   g(&c);