shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity

[arith] Allow integer casts of 0-D vectors

Browse Source 
This just works, no reason to disallow it.

Differential Revision: https://reviews.llvm.org/D142137
This commit is contained in:
Benjamin Kramer 2023-01-19 18:44:31 +01:00
parent ebd9a2477e
commit fcd505d040
2 changed files with 13 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
View File

@ -102,7 +102,7 @@ class Arith_CastOp<string mnemonic, TypeConstraint From, TypeConstraint To,
// excluding indices: signless integers, vectors or tensors thereof.
def SignlessFixedWidthIntegerLike : TypeConstraint<Or<[
AnySignlessInteger.predicate,
VectorOf<[AnySignlessInteger]>.predicate,
VectorOfAnyRankOf<[AnySignlessInteger]>.predicate,
TensorOf<[AnySignlessInteger]>.predicate]>,
"signless-fixed-width-integer-like">;

12
mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
View File

@ -297,6 +297,18 @@ func.func @integer_extension_and_truncation(%arg0 : i3) {
return
}
// CHECK-LABEL: @integer_cast_0d_vector
func.func @integer_cast_0d_vector(%arg0 : vector<i3>) {
// CHECK: %[[ARG0:.*]] = builtin.unrealized_conversion_cast
// CHECK-NEXT: = llvm.sext %[[ARG0]] : vector<1xi3> to vector<1xi6>
%0 = arith.extsi %arg0 : vector<i3> to vector<i6>
// CHECK-NEXT: = llvm.zext %[[ARG0]] : vector<1xi3> to vector<1xi6>
%1 = arith.extui %arg0 : vector<i3> to vector<i6>
// CHECK-NEXT: = llvm.trunc %[[ARG0]] : vector<1xi3> to vector<1xi2>
%2 = arith.trunci %arg0 : vector<i3> to vector<i2>
return
}
// CHECK-LABEL: func @fcmp(%arg0: f32, %arg1: f32) {
func.func @fcmp(f32, f32) -> () {
^bb0(%arg0: f32, %arg1: f32):