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[LegalizeTypes][AMDGPU]: Allow for scalarization of insert_subvector (#104236)

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Legalization for when the inserted subvector is to be scalarized.

https://godbolt.org/z/vx3joWqoh
This commit is contained in:
Jeffrey Byrnes 2024-08-15 08:07:05 -07:00 committed by GitHub
parent 95daf1aedf
commit fcefe957dd
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3 changed files with 41 additions and 0 deletions
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1
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
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@ -865,6 +865,7 @@ private:
SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
SDValue ScalarizeVecOp_UnaryOp_StrictFP(SDNode *N);
SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
SDValue ScalarizeVecOp_INSERT_SUBVECTOR(SDNode *N, unsigned OpNo);
SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
SDValue ScalarizeVecOp_VSELECT(SDNode *N);
SDValue ScalarizeVecOp_VSETCC(SDNode *N);

16
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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@ -765,6 +765,9 @@ bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
case ISD::CONCAT_VECTORS:
Res = ScalarizeVecOp_CONCAT_VECTORS(N);
break;
case ISD::INSERT_SUBVECTOR:
Res = ScalarizeVecOp_INSERT_SUBVECTOR(N, OpNo);
break;
case ISD::EXTRACT_VECTOR_ELT:
Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
break;
@ -882,6 +885,19 @@ SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
return DAG.getBuildVector(N->getValueType(0), SDLoc(N), Ops);
}
/// The inserted subvector is to be scalarized - use insert vector element
/// instead.
SDValue DAGTypeLegalizer::ScalarizeVecOp_INSERT_SUBVECTOR(SDNode *N,
unsigned OpNo) {
// We should not be attempting to scalarize the containing vector
assert(OpNo == 1);
SDValue Elt = GetScalarizedVector(N->getOperand(1));
SDValue ContainingVec = N->getOperand(0);
return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
ContainingVec.getValueType(), ContainingVec, Elt,
N->getOperand(2));
}
/// If the input is a vector that needs to be scalarized, it must be <1 x ty>,
/// so just return the element, ignoring the index.
SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {

24
llvm/test/CodeGen/AMDGPU/scalarize-insert-subvector.ll Normal file
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@ -0,0 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck -check-prefix=GCN %s
define void @scalarize_insert_subvector(ptr addrspace(3) %inptr, ptr addrspace(3) %inptr1, ptr addrspace(3) %outptr) {
; GCN-LABEL: scalarize_insert_subvector:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: ds_read_b64 v[4:5], v0
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: ds_read_b32 v5, v1 offset:4
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: ds_write_b64 v2, v[4:5]
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_setpc_b64 s[30:31]
%load0 = load <2 x i32>, ptr addrspace(3) %inptr, align 8
%load1= load <2 x i32>, ptr addrspace(3) %inptr1, align 8
%shuffle0 = shufflevector <2 x i32> %load1, <2 x i32> poison, <1 x i32> <i32 1>
%bitcast0 = bitcast <1 x i32> %shuffle0 to <2 x half>
%bitcast1 = bitcast <2 x i32> %load0 to <4 x half>
%shuffle1 = shufflevector <2 x half> %bitcast0, <2 x half> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
%shuffle2 = shufflevector <4 x half> %bitcast1, <4 x half> %shuffle1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
store <4 x half> %shuffle2, ptr addrspace(3) %outptr
ret void
}