Revert "[lld] Merge equivalent symbols found during ICF (#134342)"
The change would also merge *non-equivalent* symbols under some circumstances, see comment with a reproducer on the PR. > Fixes a correctness issue for AArch64 when ADRP and LDR instructions are > outlined in separate sections and sections are fed to ICF for > deduplication. > > See test case (based on > https://github.com/llvm/llvm-project/issues/129122) for details. All > rodata.* sections are folded into a single section with ICF. This leads > to all f2_* function sections getting folded into one (as their > relocation target symbols g* belong to .rodata.g* sections that have > already been folded into one). Since relocations still refer original g* > symbols, we end up creating duplicate GOT entry for all such symbols. > This PR addresses that by tracking such folded symbols and create one > GOT entry for all such symbols. > > Fixes https://github.com/llvm/llvm-project/issues/129122 > > Co-authored by: @jyknight This reverts commit 8389d6fad76bd880f02bddce7f0f2612ff0afc40.
This commit is contained in:
Hans Wennborg
parent
98763433e6
commit
fd3fecfc09
@ -80,7 +80,6 @@
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#include "SymbolTable.h"
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#include "Symbols.h"
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#include "SyntheticSections.h"
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#include "llvm/ADT/EquivalenceClasses.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/Object/ELF.h"
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#include "llvm/Support/Parallel.h"
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@ -334,28 +333,6 @@ bool ICF<ELFT>::equalsConstant(const InputSection *a, const InputSection *b) {
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: constantEq(a, ra.relas, b, rb.relas);
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}
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template <class RelTy>
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static SmallVector<Symbol *> getReloc(const InputSection *sec,
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Relocs<RelTy> relocs) {
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SmallVector<Symbol *> syms;
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for (auto ri = relocs.begin(), re = relocs.end(); ri != re; ++ri) {
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Symbol &sym = sec->file->getRelocTargetSym(*ri);
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syms.push_back(&sym);
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}
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return syms;
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}
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template <class ELFT>
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static SmallVector<Symbol *> getRelocTargetSyms(const InputSection *sec) {
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const RelsOrRelas<ELFT> rel = sec->template relsOrRelas<ELFT>();
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if (rel.areRelocsCrel())
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return getReloc(sec, rel.crels);
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if (rel.areRelocsRel())
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return getReloc(sec, rel.rels);
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return getReloc(sec, rel.relas);
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}
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// Compare two lists of relocations. Returns true if all pairs of
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// relocations point to the same section in terms of ICF.
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template <class ELFT>
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@ -560,28 +537,14 @@ template <class ELFT> void ICF<ELFT>::run() {
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auto print = [&ctx = ctx]() -> ELFSyncStream {
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return {ctx, ctx.arg.printIcfSections ? DiagLevel::Msg : DiagLevel::None};
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};
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EquivalenceClasses<Symbol *> symbolEquivalence;
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// Merge sections by the equivalence class.
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// Merge symbols identified as equivalent during ICF.
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forEachClassRange(0, sections.size(), [&](size_t begin, size_t end) {
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if (end - begin == 1)
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return;
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print() << "selected section " << sections[begin];
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SmallVector<Symbol *> syms = getRelocTargetSyms<ELFT>(sections[begin]);
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for (size_t i = begin + 1; i < end; ++i) {
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print() << " removing identical section " << sections[i];
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sections[begin]->replace(sections[i]);
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SmallVector<Symbol *> replacedSyms =
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getRelocTargetSyms<ELFT>(sections[i]);
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assert(syms.size() == replacedSyms.size() &&
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"Should have same number of syms!");
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for (size_t i = 0; i < syms.size(); i++) {
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if (syms[i] == replacedSyms[i] || !syms[i]->isGlobal() ||
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!replacedSyms[i]->isGlobal())
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continue;
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symbolEquivalence.unionSets(syms[i], replacedSyms[i]);
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}
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// At this point we know sections merged are fully identical and hence
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// we want to remove duplicate implicit dependencies such as link order
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@ -600,26 +563,11 @@ template <class ELFT> void ICF<ELFT>::run() {
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d->folded = true;
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}
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};
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for (Symbol *sym : ctx.symtab->getSymbols()) {
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for (Symbol *sym : ctx.symtab->getSymbols())
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fold(sym);
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auto it = symbolEquivalence.findLeader(sym);
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if (it != symbolEquivalence.member_end() && *it != sym) {
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print() << "redirecting '" << sym->getName() << "' in symtab to '"
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<< (*it)->getName() << "'";
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ctx.symtab->redirect(sym, *it);
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}
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}
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parallelForEach(ctx.objectFiles, [&](ELFFileBase *file) {
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for (Symbol *sym : file->getLocalSymbols())
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fold(sym);
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for (Symbol *&sym : file->getMutableGlobalSymbols()) {
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auto it = symbolEquivalence.findLeader(sym);
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if (it != symbolEquivalence.member_end() && *it != sym) {
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print() << "redirecting '" << sym->getName() << "' to '"
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<< (*it)->getName() << "'";
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sym = *it;
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}
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}
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});
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// InputSectionDescription::sections is populated by processSectionCommands().
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@ -29,12 +29,6 @@ using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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void SymbolTable::redirect(Symbol *from, Symbol *to) {
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int &fromIdx = symMap[CachedHashStringRef(from->getName())];
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const int toIdx = symMap[CachedHashStringRef(to->getName())];
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fromIdx = toIdx;
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}
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void SymbolTable::wrap(Symbol *sym, Symbol *real, Symbol *wrap) {
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// Redirect __real_foo to the original foo and foo to the original __wrap_foo.
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int &idx1 = symMap[CachedHashStringRef(sym->getName())];
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@ -41,7 +41,6 @@ public:
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SymbolTable(Ctx &ctx) : ctx(ctx) {}
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ArrayRef<Symbol *> getSymbols() const { return symVector; }
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void redirect(Symbol *from, Symbol *to);
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void wrap(Symbol *sym, Symbol *real, Symbol *wrap);
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Symbol *insert(StringRef name);
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@ -1,95 +0,0 @@
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## REQUIRES: aarch64
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## Check that symbols that ICF assumes to be the same get a single GOT entry
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# RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t
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# RUN: llvm-mc -filetype=obj -crel -triple=aarch64 %s -o %tcrel
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# RUN: ld.lld %t -o %t2 --icf=all
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# RUN: ld.lld %tcrel -o %tcrel2 --icf=all
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# RUN: llvm-objdump --section-headers %t2 | FileCheck %s --check-prefix=EXE
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# RUN: llvm-objdump --section-headers %tcrel2 | FileCheck %s --check-prefix=EXE
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# RUN: ld.lld -shared %t -o %t3 --icf=all
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# RUN: ld.lld -shared %tcrel -o %tcrel3 --icf=all
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# RUN: llvm-objdump --section-headers %t3 | FileCheck %s --check-prefix=DSO
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# RUN: llvm-objdump --section-headers %tcrel3 | FileCheck %s --check-prefix=DSO
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## All global g* symbols should merge into a single GOT entry while non-global
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## gets its own GOT entry.
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# EXE: {{.*}}.got 00000010{{.*}}
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## When symbols are preemptible in DSO mode, GOT entries wouldn't be merged
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# DSO: {{.*}}.got 00000028{{.*}}
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.addrsig
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callee:
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ret
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.macro f, index, isglobal
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# (Kept unique) first instruction of the GOT code sequence
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.section .text.f1_\index,"ax",@progbits
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f1_\index:
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adrp x0, :got:g\index
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mov x1, #\index
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b f2_\index
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# Folded, second instruction of the GOT code sequence
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.section .text.f2_\index,"ax",@progbits
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f2_\index:
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ldr x0, [x0, :got_lo12:g\index]
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b callee
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# Folded
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.ifnb \isglobal
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.globl g\index
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.endif
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.section .rodata.g\index,"a",@progbits
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g_\index:
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.long 111
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.long 122
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g\index:
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.byte 123
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.section .text._start,"ax",@progbits
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bl f1_\index
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.endm
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## Another set of sections merging: g1 <- g2. Linker should be able to
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## resolve both g1 and g2 to g0 based on ICF on previous sections.
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.section .text.t1_0,"ax",@progbits
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t1_0:
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adrp x2, :got:g1
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mov x3, #1
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b t2_0
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.section .text.t2_0,"ax",@progbits
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t2_0:
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ldr x2, [x2, :got_lo12:g1]
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b callee
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.section .text.t1_1,"ax",@progbits
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t1_1:
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adrp x2, :got:g2
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mov x3, #2
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b t2_1
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.section .text.t2_1,"ax",@progbits
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t2_1:
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ldr x2, [x2, :got_lo12:g2]
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b callee
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.section .text._start,"ax",@progbits
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.globl _start
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_start:
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f 0 1
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f 1 1
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f 2 1
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f 3 1
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f 4
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@ -17,12 +17,6 @@
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# EXE-NEXT: selected section {{.*}}:(.text.h1)
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# EXE-NEXT: removing identical section {{.*}}:(.text.h2)
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# EXE-NEXT: removing identical section {{.*}}:(.text.h3)
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# EXE-NEXT: redirecting 'f2' in symtab to 'f1'
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# EXE-NEXT: redirecting 'g2' in symtab to 'g1'
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# EXE-NEXT: redirecting 'g3' in symtab to 'g1'
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# EXE-NEXT: redirecting 'f2' to 'f1'
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# EXE-NEXT: redirecting 'g2' to 'g1'
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# EXE-NEXT: redirecting 'g3' to 'g1'
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# EXE-NOT: {{.}}
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## Definitions are preemptible in a DSO. Only leaf functions can be folded.
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