116 Commits

Author SHA1 Message Date
Paul Walker
be3a7a67d7
[NFC][Clang][AArch64] Simplify ACLE guards within arm_sve.td & arm_sme.td. (#152547)
Only set a target guard if it deviates from its default value[1].

When a target guard is set, it is automatically AND'd with its default
value. This means there is no need to use SVETargetGuard="sve,bf16"
because SVETargetGuard="bf16" is sufficient.

[1] Defaults: SVETargetGuard="sve", SMETargetGuard="sme"
2025-08-13 12:53:17 +01:00
Paul Walker
e4d00683c3
[Clang][SME] Refactor checkArmStreamingBuiltin. (#145941)
Rather than filtering the calling function's features the PR splits the
builtin guard into distinct non-streaming and streaming guards that are
compared to the active features in full.
2025-07-08 13:55:22 +01:00
Kazu Hirata
f4b311b527
[TableGen] Use StringRef::contains (NFC) (#141413) 2025-05-25 10:55:14 -07:00
Kazu Hirata
6290cc33e9
[clang] Use llvm::stable_sort (NFC) (#140413) 2025-05-17 17:02:45 -07:00
Kazu Hirata
f2ec5e40d9
[clang] Use llvm::unique (NFC) (#136469) 2025-04-19 20:33:53 -07:00
Virginia Cangelosi
e92ff64bad
[Clang][LLVM] Implement single-multi vectors MOP4{A/S} (#128854)
Implement all single-multi {BF/F/S/U/SU/US}MOP4{A/S} instructions in
clang and llvm following the acle in
https://github.com/ARM-software/acle/pull/381/files.

This PR depends on https://github.com/llvm/llvm-project/pull/127797

This patch updates the semantics of template arguments in intrinsic
names for clarity and ease of use. Previously, template argument numbers
indicated which character in the prototype string determined the final
type suffix, which was confusing—especially for intrinsics using
multiple prototype modifiers per operand (e.g., intrinsics operating on
arrays of vectors). The number had to reference the correct character in
the prototype (e.g., the ‘u’ in “2.u”), making the system cumbersome and
error-prone.
With this patch, template argument numbers now refer to the operand
number that determines the final type suffix, providing a more intuitive
and consistent approach.
2025-04-01 15:05:30 +01:00
Chandler Carruth
64ea3f5a47 [StrTable] Switch AArch64 and ARM to use directly TableGen-ed builtin tables
This leverages the sharded structure of the builtins to make it easy to
directly tablegen most of the AArch64 and ARM builtins while still using
X-macros for a few edge cases. It also extracts common prefixes as part
of that.

This makes the string tables for these targets dramatically smaller.
This is especially important as the SVE builtins represent (by far) the
largest string table and largest builtin table across all the targets in
Clang.
2025-02-04 18:04:58 +00:00
Momchil Velikov
b6e50ed209
[AArch64] Simplify definitions of SVE/SME intrinsics which set FPMR (#123796)
If an intrinsic has an `fpm_t` parameter, automatically set the flag
`SetsFPMR` and append "_fpm" to the name.
2025-02-03 09:38:05 +00:00
Momchil Velikov
f95a8bde34
[AArch64] Refactor implementation of FP8 types (NFC) (#123604)
- The FP8 scalar type (`__mfp8`) was described as a vector type
- The FP8 vector types were described/assumed to have integer element
type (the element type ought to be `__mfp8`)
- Add support for `m` type specifier (denoting `__mfp8`) in
`DecodeTypeFromStr` and create builtin function prototypes using that
specifier, instead of `int8_t`
2025-01-27 14:31:41 +00:00
Jonathan Thackray
d028eaaeb8
[AArch64] Update SVE untyped intrinsics to have FP8 variants (#123585)
Update the following intrinsics to have FP8 variants:
``` c
svuint8_t svdup_laneq[_u8](svuint8_t zn, uint64_t imm_idx);
svuint8_t svextq[_u8](svuint8_t zdn, svuint8_t zm, uint64_t imm);
svint8_t svtblq[_s8](svint8_t zn, svuint8_t zm);
svint8_t svtbxq[_s8](svint8_t fallback, svint8_t zn, svuint8_t zm);
svuint8_t svuzpq1[_u8](svuint8_t zn, svuint8_t zm);
svuint8_t svuzpq2[_u8](svuint8_t zn, svuint8_t zm);
svuint8_t svzipq1[_u8](svuint8_t zn, svuint8_t zm);
svuint8_t svzipq2[_u8](svuint8_t zn, svuint8_t zm);
```
2025-01-21 13:34:57 +00:00
Momchil Velikov
16e45b8fac
[AArch64] Implement FP8 SVE/SME reinterpret intrinsics (#121063) 2025-01-13 18:53:07 +00:00
Nicholas Guy
21b531ead1
[clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (#120265)
Replacing the extant streaming mode function call with an intrinsic
allows us to make further optimisations around it. For example, if it's
called within a function that has a known streaming mode, we can remove
the dead code, and avoid the redundant conditional branch.
2025-01-07 09:02:26 +00:00
SpencerAbson
db84ae3a68
[Clang][AArch64] Add signed index/offset variants of sve2p1 qword stores (#120549)
This patch adds signed offset/index variants to the SVE2p1 quadword
store intrinsics, in accordance with
https://github.com/ARM-software/acle/pull/359.
2024-12-19 13:27:07 +00:00
Momchil Velikov
c2172431c7
[AArch64] Implements FP8 SVE intrinsics for dot-product (#118125)
This patch adds the following intrinsics:

* 8-bit floating-point dot product to single-precision.

// Only if (__ARM_FEATURE_SVE2 && __ARM_FEATURE_FP8DOT4) ||
__ARM_FEATURE_SSVE_FP8DOT4
svfloat32_t svdot[_f32_mf8]_fpm(svfloat32_t zda, svmfloat8_t zn,
svmfloat8_t zm, fpm_t fpm);
svfloat32_t svdot[_n_f32_mf8]_fpm(svfloat32_t zda, svmfloat8_t zn,
mfloat8_t zm, fpm_t fpm);

* 8-bit floating-point indexed dot product to single-precision.

// Only if (__ARM_FEATURE_SVE2 && __ARM_FEATURE_FP8DOT4) ||
__ARM_FEATURE_SSVE_FP8DOT4
svfloat32_t svdot_lane[_f32_mf8]_fpm(svfloat32_t zda, svmfloat8_t zn,
svmfloat8_t zm,
                                       uint64_t imm0_3, fpm_t fpm);

* 8-bit floating-point dot product to half-precision.

// Only if (__ARM_FEATURE_SVE2 && __ARM_FEATURE_FP8DOT2) ||
__ARM_FEATURE_SSVE_FP8DOT2
svfloat16_t svdot[_f16_mf8]_fpm(svfloat16_t zda, svmfloat8_t zn,
svmfloat8_t zm, fpm_t fpm);
svfloat16_t svdot[_n_f16_mf8]_fpm(svfloat16_t zda, svmfloat8_t zn,
mfloat8_t zm, fpm_t fpm);

* 8-bit floating-point indexed dot product to half-precision.

// Only if (__ARM_FEATURE_SVE2 && __ARM_FEATURE_FP8DOT2) ||
__ARM_FEATURE_SSVE_FP8DOT2
svfloat16_t svdot_lane[_f16_mf8]_fpm(svfloat16_t zda, svmfloat8_t zn,
svmfloat8_t zm,
                                       uint64_t imm0_7, fpm_t fpm);
2024-12-13 14:06:54 +00:00
SpencerAbson
ac7fe42616
[Clang][AArch64]Refactor typespec handling in SveEmitter.cpp (#117717)
- Switch to an enumerated type approach, which is less error-prone as we
continue to add new types. This is similar to NeonEmitter.
- Fix existing faulty typespec modifiers
2024-12-02 16:34:57 +00:00
SpencerAbson
e4ee970c4b
[AArch64] Implement intrinsics for F1CVTL/F2CVTL and BF1CVTL/BF2CVTL (#116959)
This patch implements the following intrinsics:

8-bit floating-point convert to deinterleaved half-precision or
BFloat16.
``` c
  // Variant is also available for: _bf16[_mf8]_x2
  svfloat16x2_t svcvtl1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
  svfloat16x2_t svcvtl2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm) __arm_streaming;
```

Defined in https://github.com/ARM-software/acle/pull/323

Co-authored-by: Caroline Concatto caroline.concatto@arm.com
Co-authored-by: Marian Lukac marian.lukac@arm.com
2024-11-28 12:37:02 +00:00
Rahul Joshi
63aa8cf6be
[NFC][Clang][TableGen] Fix file header comments (#116491) 2024-11-17 07:54:10 -08:00
Kazu Hirata
a8a1e9033a
[TableGen] Remove unused includes (NFC) (#116168)
Identified with misc-include-cleaner.
2024-11-14 07:55:34 -08:00
CarolineConcatto
508fd966fb
[CLANG][AArch64]Add SVE tuple types for mfloat8_t (#112687)
This patch adds scalable tuple types vectors for MFloat_8 type,
according to the ACLE[1].

[1] https://github.com/ARM-software/acle.git
2024-10-18 09:10:17 +01:00
CarolineConcatto
cb43021e57
[CLANG]Add Scalable vectors for mfloat8_t (#101644)
This patch adds these new vector sizes for sve:
    svmfloat8_t

According to the ARM ACLE PR#323[1].

[1] ARM-software/acle#323
2024-10-17 09:22:55 +01:00
Sander de Smalen
f22e6d5919
[Clang][AArch64] Fix checkArmStreamingBuiltin for 'sve-b16b16' (#109420)
The implementation made the assumption that any feature starting with
"sve" meant that this was an SVE feature. This is not the case for
"sve-b16b16", as this is a feature that applies to both SVE and SME.

This meant that:
```
  __attribute__((target("+sme2,+sve2,+sve-b16b16")))
  svbfloat16_t foo(svbfloat16_t a, svbfloat16_t b, svbfloat16_t c)
                                                      __arm_streaming {
      return svclamp_bf16(a, b, c);
  }
```
would result in an incorrect diagnostic saying that `svclamp_bf16` could
only be used in non-streaming functions.
2024-10-08 10:01:40 +01:00
Rahul Joshi
a140931be5
[TableGen] Change getValueAsListOfDefs to return const pointer vector (#110713)
Change `getValueAsListOfDefs` to return a vector of const Record
pointer, and remove `getValueAsListOfConstDefs` that was added as a
transition aid.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-10-01 14:30:38 -07:00
Rahul Joshi
e9dbdb20f2
[Clang][TableGen] Change NeonEmitter to use const Record * (#110597)
This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-10-01 10:47:09 -07:00
Rahul Joshi
0e948bfd31
[NFC][clang][TableGen] Remove redundant llvm:: namespace qualifier (#108627)
Remove llvm:: from .cpp files, and add "using namespace llvm" if needed.
2024-09-16 06:35:34 -07:00
Rahul Joshi
711278e273
[clang][TableGen] Change SVE Emitter to use const RecordKeeper (#108503)
Change SVE Emitter to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-13 07:53:30 -07:00
SpencerAbson
1f70fcefa9
[Clang][AArch64] Add customisable immediate range checking to NEON (#100278)
This patch moves NEON immediate argument specification and checking to
the system currently shared by both SVE and SME.

In its current form, the TableGen definition of a NEON intrinsic cannot
control how its immediate arguments are range-checked, this information
must be inferred from the name of the intrinsic by NeonEmitter, which
also assumes that any NEON instruction will only ever receive a single
immediate argument. For SVE/SME instrinsics, this information is more
conveniently supplied in the TableGen definition.

As a result, for each immediate argument, NEON instructions must define
- The index of the immediate argument to be checked
- The type of immediate range check to be performed,
    (e.g., ImmCheckShiftRight)
- The index of the argument whose type defines the context
    of this immediate check (base type, vector size).
- **Difference from SVE/SME** If this definition generates a polymorphic
NEON builtin, the base type defined by this argument is overwritten by
that of the type code supplied to the overloaded builtin call. This
third argument is omitted in some cases due to this.

Here is an example for
[`vfma_laneq`](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=vfma_laneq)
- The immediate is supplied in argument 3
- The immediate is used as an index into the lanes of argument 2
- So we must perform an immediate check on argument 3, based on the type
information of argument 2.
- `ImmCheck<3, ImmCheckLaneIndex, 2>`

During this work, we discovered that the existing immediate
range-checking system was largely untested, which made it difficult to
make reliable progress. Missing tests have been added to verify this
implementation against all intrinsics which take constrained immediate
arguments. All test immediate range checking tests for NEON intrinsics
are moved to a dedicated directory
`clang/test/Sema/aarch64-neon-immediate-ranges/`.
2024-09-06 13:12:37 +01:00
Kazu Hirata
1fa7f05b70
[clang] Construct SmallVector with ArrayRef (NFC) (#101898) 2024-08-04 23:46:34 -07:00
Sander de Smalen
09c0337a58
[Clang][SveEmitter] Split up TargetGuard into SVE and SME component. (#96482)
One reason to want to split this up is to simplify the code added in
#93802, where it checks the SME streaming-mode requirements for a
builtin by checking for the absence of SVE. If the target guards are
separate, we can generate a table and make the Sema code to verify the
runtime mode simpler.

Another reason is to avoid an issue with a check in SveEmitter.cpp where
it ensures that the 'VerifyRuntimeMode' is set correctly for functions
that have both SVE and SME target guards:

if (!Def->isFlagSet(VerifyRuntimeMode) &&
Def->getGuard().contains("sve") &&
      Def->getGuard().contains("sme"))
    llvm_unreachable("Missing VerifyRuntimeMode flag");

However, if we ever add a new feature with "sme" in the name, even
though it is unrelated to FEAT_SME, then this code no longer works.

Note that the arm_sve.td and arm_sme.td files could do with a bit of
restructuring after this but it seems better to follow that up in an NFC
patch.
2024-06-24 20:31:22 +01:00
Sander de Smalen
b39f523af7
[Clang][AArch64] Expose compatible SVE intrinsics with only +sme (#95787)
This allows code with SVE intrinsics to be compiled with +sme,+nosve,
assuming the encompassing function is in the correct mode (see #93802)
2024-06-21 08:13:18 +01:00
Sander de Smalen
1644a31ae9
[Clang][AArch64] Generalise streaming mode checks for builtins. (#93802)
PR #76975 added 'IsStreamingOrSVE2p1' to emit a diagnostic when a builtin marked
with 'IsStreamingOrSVE2p1' is used in a non-streaming function that is not
compiled with `+sve2p1`.

The problem is a bit more complex than only this case. For example, we've marked
lots of builtins with 'IsStreamingCompatible', meaning it can be used in either
streaming, streaming-compatible or non-streaming functions. But the code in
SemaChecking, doesn't check the appropriate target guards. This issue becomes
relevant when SVE builtins are only available in streaming mode, e.g. when
compiling for SME without SVE.

If we were to add the appropriate target guards, we'd have to add many more
combinations, e.g.:
  IsStreamingSMEOrSVE
  IsStreamingSME2OrSVE2
  IsStreamingSMEOrSVE2p1
  IsStreamingSME2OrSVE2p1
  etc.

To avoid having to add more combinations (and avoid having to add more in the
future for new extensions), we use a single 'IsSVEOrStreamingSVE' flag for all
builtins that are available in streaming mode for the appropriate SME flags, or
in non-streaming mode for the appropriate SVE flags, or both.  The code in
SemaChecking will then verify for which mode (or both) the builtin would be
defined, given the target features of the function/compilation unit.

For example:

  'svclamp' is enabled under FEAT_SVE2p1 and FEAT_SME2

* When we compile for SVE2p1 and SME (but not SME2), the builtin is undefined
  behaviour when called from a streaming function.

* When we compile for SME2 and SVE2 (but not SVE2p1), the builtin is undefined
  behaviour when called from a non-streaming function.

* When we compile for _both_ SVE2p1 and SME2, the builtin can be used in either
  mode (non-streaming, streaming or streaming-compatible)
2024-06-16 17:24:23 +01:00
Sander de Smalen
f81da75693
[Clang][AArch64] Use __clang_arm_builtin_alias for overloaded svreinterpret's (#92427)
The intrinsics are currently defined as:

```
  __aio __attribute__((target("sve")))
  svint8_t svreinterpret_s8(svuint8_t op) __arm_streaming_compatible {
    return __builtin_sve_reinterpret_s8_u8(op);
  }
```

which doesn't work when calling it from an __arm_streaming function when
only +sme is available. By defining it in the same way as we've defined
all the other intrinsics, we can leave it to the code in SemaChecking to
verify that either +sve or +sme is available.

This PR also fixes the target guards for the svreinterpret_c and
svreinterpret_b intrinsics, that convert between svcount_t and svbool_t,
as these are available both in SME2 and SVE2p1.
2024-05-23 10:42:11 +01:00
aniplcc
451cad3a27
[clang] Prefer logical && over & for boolean operations (#87276) 2024-04-02 19:21:39 +02:00
Sander de Smalen
3c90fce450
[Clang][AArch64] Add missing prototypes for streaming-compatible routines (#82649) 2024-02-23 11:31:53 +00:00
Sander de Smalen
1f6f19935c
[Clang][AArch64] Add diagnostics for builtins that use ZT0. (#79140)
Similar to what we did for ZA, this patch adds diagnostics to flag when
using a ZT0 builtin in a function that does not have ZT0 state.
2024-01-23 17:41:12 +01:00
Matthew Devereau
312acdfae1
[AArch64][SME] Take arm_sme.h out of draft (#78961) 2024-01-22 17:12:16 +00:00
Sander de Smalen
40a631f452
[Clang] Refactor diagnostics for SME builtins. (#78258)
The arm_sme.td file was still using `IsSharedZA` and `IsPreservesZA`,
which should be changed to match the new state attributes added in
#76971.

This patch adds `IsInZA`, `IsOutZA` and `IsInOutZA` as the state for the
Clang builtins and fixes up the code in SemaChecking and SveEmitter to
match.

Note that the code is written in such a way that it can be easily
extended with ZT0 state (to follow in a future patch).
2024-01-19 16:02:24 +00:00
Sander de Smalen
032c832719 [Clang][AArch64] Remove unnecessary and incorrect attributes from arm_sme.h.
These attributes were using the GNU attribute syntax, rather than the new
keyword attribute syntax, and they are no longer required as we have code
in SemaChecking to verify whether a builtin is compatible with its caller.
2024-01-16 11:20:59 +00:00
Sander de Smalen
8e7f073eb4
[Clang][AArch64] Change SME attributes for shared/new/preserved state. (#76971)
This patch replaces the `__arm_new_za`, `__arm_shared_za` and
`__arm_preserves_za` attributes in favour of:
* `__arm_new("za")`
* `__arm_in("za")`
* `__arm_out("za")`
* `__arm_inout("za")`
* `__arm_preserves("za")`

As described in https://github.com/ARM-software/acle/pull/276.

One change is that `__arm_in/out/inout/preserves(S)` are all mutually
exclusive, whereas previously it was fine to write `__arm_shared_za
__arm_preserves_za`. This case is now represented with `__arm_in("za")`.

The current implementation uses the same LLVM attributes under the hood,
since `__arm_in/out/inout` are all variations of "shared ZA", so can use
the existing `aarch64_pstate_za_shared` attribute in LLVM.

#77941 will add support for the new "zt0" state as introduced
with SME2.
2024-01-15 09:41:32 +00:00
Sam Tebbs
0eefcaf96d
[Clang][SME] Add IsStreamingOrSVE2p1 (#76975)
This patch adds IsStreamingOrSVE2p1 to the applicable builtins and a
warning for when those builtins are not used in a streaming or sve2p1
function.
2024-01-05 09:55:50 +00:00
Sam Tebbs
a7a78fd427
Revert "[Clang][SME] Add IsStreamingOrSVE2p1" (#76973)
Reverts llvm/llvm-project#75958

I mistakenly included a commit from my local main after rebasing.
2024-01-04 16:53:14 +00:00
Sam Tebbs
8f8152091c
[Clang][SME] Add IsStreamingOrSVE2p1 (#75958)
This patch adds IsStreamingOrSVE2p1 to the applicable builtins and a
warning for when those builtins are not used in a streaming or sve2p1
function.
2024-01-04 16:50:31 +00:00
Sander de Smalen
5055eeea52
[Clang][AArch64] Add missing SME functions to header file. (#75791)
This includes:
* __arm_in_streaming_mode()
* __arm_has_sme()
* __arm_za_disable()
* __svundef_za()
2024-01-02 09:43:30 +00:00
Sam Tebbs
a0a3c793d2
[Clang][SME] Warn when a function doesn't have ZA state (#75805)
This patch adds a warning that's emitted when a builtin call uses ZA
state but the calling function doesn't provide any.

Patch by David Sherwood <david.sherwood@arm.com>.
2023-12-18 16:14:25 +00:00
Sam Tebbs
945c645acb
[AArch64][SME] Warn when using a streaming builtin from a non-streaming function (#75487)
This PR adds a warning that's emitted when a non-streaming or
non-streaming-compatible builtin is called in an unsuitable function.

Uses work by Kerry McLaughlin.

This is a re-upload of #74064 and fixes a compile time increase.
2023-12-18 09:32:34 +00:00
Sam Tebbs
342384ca05
Revert "[AArch64][SME] Warn when using a streaming builtin from a non-streaming function" (#75449)
Reverts llvm/llvm-project#74064
2023-12-14 09:31:55 +00:00
Sam Tebbs
2e45326b08
[AArch64][SME] Warn when using a streaming builtin from a non-streaming function (#74064)
This PR adds a warning that's emitted when a non-streaming or
non-streaming-compatible builtin is called in an unsuitable function.

Uses work by Kerry McLaughlin.
2023-12-14 00:11:04 +00:00
CarolineConcatto
f2464ca317
[SVE2.1][Clang][LLVM]Int/FP reduce builtin in Clang and LLVM intrinsic (#69926)
This patch implements the builtins in Clang
and the LLVM-IR intrinsic for the following:

// Variants are also available for:
// _s8, _s16, _u16, _s32, _u32, _s64, _u64,
// _f16, _f32, _f64uint8x16_t svaddqv[_u8](svbool_t pg, svuint8_t zn);

// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64
uint8x16_t svandqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t
sveorqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t svorqv[_u8](svbool_t
pg, svuint8_t zn);

// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64;
uint8x16_t svmaxqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t
svminqv[_u8](svbool_t pg, svuint8_t zn);

// Variants are also available for _f32, _f64
float16x8_t svmaxnmqv[_f16](svbool_t pg, svfloat16_t zn); float16x8_t
svminnmqv[_f16](svbool_t pg, svfloat16_t zn);

According to the PR#257[1]

The reduction instruction uses scalable vectors as input and fixed
vectors as output, therefore we changed SVEEmitter to emit fixed vector
types in case the neon header(arm_neon.h) is not present.

[1]https://github.com/ARM-software/acle/pull/257

Co-author: Dinar Temirbulatov <dinar.temirbulatov@arm.com>
2023-12-13 15:45:59 +00:00
CarolineConcatto
ed2d497291
[Clang][AArch64] Add fix vector types to header into SVE (#73258)
This patch is needed for the reduction instructions in sve2.1
 It add a new header to sve with all the fixed vector types.
  The new types are only added if neon is not declared.
2023-12-13 08:59:41 +00:00
Matthew Devereau
6704d6aadd
[SME2] Add LUTI2 and LUTI4 quad Builtins and Intrinsics (#73317)
See https://github.com/ARM-software/acle/pull/217

Patch by: Hassnaa Hamdi <hassnaa.hamdi@arm.com>
2023-12-06 10:08:04 +00:00
David Spickett
d7c03a196e [clang][AArch64][NFC] Remove trailing space in SME intriniscs header 2023-11-27 13:31:15 +00:00