38004 Commits

Author SHA1 Message Date
Boyao Wang
697beb3f17
[TargetLowering] Change getOptimalMemOpType and findOptimalMemOpLowering to take LLVM Context (#147664)
Add LLVM Context to getOptimalMemOpType and findOptimalMemOpLowering. So
that we can use EVT::getVectorVT to generate EVT type in
getOptimalMemOpType.

Related to [#146673](https://github.com/llvm/llvm-project/pull/146673).
2025-07-10 11:11:09 +08:00
Craig Topper
2fc6c73b39
[LegalizeTypes] Preserve disjoint flag when expanding OR. (#147640) 2025-07-09 14:15:42 -07:00
Peter Collingbourne
8b9bbd9ed6
MachineLICM: Merge logic for implicit and explicit definitions.
Anatoly Trosinenko found that when hasSideEffect was set to 0 in the
definition of LOADgotAUTH, MultiSource/Benchmarks/Ptrdist/ks/ks test
from llvm-test-suite started to crash. The issue was traced down to
MachineLICM pass placing LOADgotAUTH right after an unrelated copy to
x16 like rewriting this code:

````
bb.0:
  renamable $x16 = COPY renamable $x12
  B %bb.1

bb.1:
  ...
  /* use $x16 */
  ...
  renamable $x20 = LOADgotAUTH target-flags(aarch64-got) @some_variable, implicit-def dead $x16, implicit-def dead $x17, implicit-def dead $nzcv
  /* use $x20 */
  ...
````

like the following:

````
bb.0:
  renamable $x16 = COPY renamable $x12
  renamable $x20 = LOADgotAUTH target-flags(aarch64-got) @some_variable, implicit-def dead $x16, implicit-def dead $x17, implicit-def dead $nzcv
  B %bb.1

bb.1:
  ...
  /* use $x16 */
  ...
  /* use $x20 */
  ...
```

The issue was caused by inconsistent logic between implicit and explicit
operand definitions, where the implicit side was incorrectly skipping
checking RUDefs for dead operands, leading to RuledOut not being set
for the X16 operand.

Because there isn't really a semantic difference between implicit and
explicit operands at this point, let's remove the isImplicit check and
adjust the logic to do the same thing in both cases:

- For implicit operands, we now check and update RUDefs in the same way
  as explicit operands.
- For explicit operands, we now allow dead operands to be skipped.

Reviewers: arsenm, s-barannikov, atrosinenko

Reviewed By: arsenm, s-barannikov

Pull Request: https://github.com/llvm/llvm-project/pull/147624
2025-07-09 13:02:15 -07:00
Philip Reames
7bf439d260 [IA] Partially revert interface change from 4a66ba
As noted in post commit review, the API change here was not required.
I'd apparently confused myself when teasing apart patches from my
development branch.
2025-07-09 12:02:52 -07:00
Rahman Lavaee
fcecf177c1
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
Callsite offsets will help map addresses to the right position in the
basic block (before or after a callsite).

This PR also bumps the BBAddrMap version to 3.

The encoding/decoding ability is already pushed upstream
8d7a8fcc3ab9f6d4c4a7e4312876fe94ed3d6c4f.
2025-07-09 11:11:15 -07:00
jyli0116
4c27279ec4
[GlobalISel] Add Saturated Truncate Instructions (#147526)
Introduces saturated truncate instructions to Global ISel:
G_TRUNC_SSAT_S, G_TRUNC_SSAT_U, G_TRUNC_USAT_U. These were previously
introduced to SDAG to reduce redundant code.

The patch only initially introduces the instruction, a later patch will
follow to add combines and legalization for each instruction.
2025-07-09 18:56:17 +01:00
Philip Reames
4a66ba2a4d
[IA] Support deinterleave intrinsics w/ fewer than N extracts (#147572)
For the fixed vector cases, we already support this, but the
deinterleave intrinsic cases (primary used by scalable vectors) didn't.
Supporting it requires plumbing through the Factor separately from the
extracts, as there can now be fewer extracts than the Factor. Note that
the fixed vector path handles this slightly differently - it uses the
shuffle and indices scheme to achieve the same thing.
2025-07-09 09:41:07 -07:00
Akshat Oke
b33d95fb8a
[CodeGen][NPM] Port InitUndef to NPM (#138495) 2025-07-09 15:31:31 +05:30
Matt Arsenault
d3d4066409
DAG: Remove dead declaration of ExpandSinCosLibCall (#147673) 2025-07-09 18:47:49 +09:00
Matt Arsenault
dc69b00b0a
RuntimeLibcalls: Remove table of soft float compare cond codes (#146082)
Previously we had a table of entries for every Libcall for
the comparison to use against an integer 0 if it was a soft
float compare function. This was only relevant to a handful of
opcodes, so it was wasteful. Now that we can distinguish the
abstract libcall for the compare with the concrete implementation,
we can just directly hardcode the comparison against the libcall
impl without this configuration system.
2025-07-09 17:13:58 +09:00
Matt Arsenault
ed1ee9a9bf
AtomicExpand: Stop using report_fatal_error (#147300)
Emit a context error and delete the instruction. This
allows removing the AMDGPU hack where some atomic libcalls
are falsely added. NVPTX also later copied the same hack,
so remove it there too.

For now just emit the generic error, which is not good. It's
missing any useful context information (despite taking the instruction).
It's also confusing in the failed atomicrmw case, since it's reporting
failure at the intermediate failed cmpxchg instead of the original
atomicrmw.
2025-07-09 15:28:10 +09:00
Akshat Oke
337bc91643
[NPM] StackColoring: Preserve function analyses (#147500) 2025-07-09 11:17:07 +05:30
Fangrui Song
68494ae072 [XRay] xray_fn_idx: fix alignment directive
Use `emitValueToAlignment` as the section does not contain code.
`emitCodeAlignment` would lead to ALIGN relocations on RISC-V and
LoongArch with linker relaxation.

In addition, change the alignment to wordsize, sufficient for the
runtime requirement (`XRayFunctionSledIndex`).

Related to #147322
2025-07-08 21:52:53 -07:00
Craig Topper
5776915d0f
[InterleavedAccessPass] Add skipFunction check for opt-bisect-limit (#147629) 2025-07-08 21:46:34 -07:00
Sam Elliott
bccd34f323
[SelectionDAG] Correctly Mark Required Analyses (#147649)
llvm/llvm-project#147560 changed when the legacy SelectionDAG pass needs
TargetTransformInfoWrapperPass to always require it (rather than only
when assertions are enabled). `SelectionDAGISelLegacy::getAnalysisUsage`
was not updated in that PR, which was causing crashes on
assertions-disabled builds, which are hard to track down.

This makes the required update, which should avoid crashes being seen on
some buildbots and by some users.
2025-07-08 21:40:29 -07:00
alex-t
9293b65a61
[AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (#147560)
This is the next attempt to upstream this:
https://github.com/llvm/llvm-project/pull/144947
The las one caused build errors in AArch64.
Issue was resolved.
2025-07-09 00:06:58 +02:00
Matt Arsenault
3697d6dd98
DAG: Fall back to separate sin and cos when softening sincos (#147468)
Fix asserting in the error case.
2025-07-09 01:52:46 +09:00
Philip Reames
f00a7a49bd
[DAG] Fold insert_subvector (splat X), (splat X), N2 - > splat X (#147380)
If we're inserting a splat into a splat of the same value, then
regardless of the index, the result is simply a splat of that value.
2025-07-08 08:50:01 -07:00
Dominik Steenken
acdf1c7526
[DAG] Add generic expansion for ISD::FCANONICALIZE nodes (#142105)
This PR takes the work previously done by @pawan-nirpal-031 on X86 in
#106370, and makes it available in common code. This should enable all
targets to use `__builtin_canonicalize` for all `f(16|32|64|128)` data
types.

Canonicalization is implemented here as multiplication by `1.0`, as
suggested in [the
docs](https://llvm.org/docs/LangRef.html#llvm-canonicalize-intrinsic).
2025-07-08 16:12:17 +01:00
woruyu
b0790e04a3
[DAG] combineVSelectWithAllOnesOrZeros - fold select Cond, 0, x -> and not(Cond), x (#147472)
### Summary
This patch extends the work from
[#145298](https://github.com/llvm/llvm-project/pull/145298) by removing
the now-unnecessary X86-specific combineVSelectWithLastZeros logic. That
combine is now correctly and more generally handled in the
target-independent combineVSelectWithAllOnesOrZeros.

This simplifies the X86 DAG combine logic and avoids duplication.

Fixes: [#144513](https://github.com/llvm/llvm-project/issues/144513)
Related for reference:
[#146831](https://github.com/llvm/llvm-project/pull/146831)
2025-07-08 14:45:40 +01:00
Matt Arsenault
a79acbd92f DAG: Remove leftover debugging assert
Accidentally added in b5401624e1f19fc1f65499179403d0c7ed3ac6eb
2025-07-08 10:26:51 +09:00
Kazu Hirata
6b2cd08d4f [AsmPrinter] Fix a warning
This patch fixes:

  llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3575:44: error:
  missing field 'Cases' initializer
  [-Werror,-Wmissing-field-initializers]
2025-07-07 14:22:51 -07:00
sivadeilra
9923565fb8
Add CodeView S_LABEL32 symbols for jump table targets (for Windows debugging) (#146121)
This PR provides more information to debuggers and analysis tools on
Windows. It adds `S_LABEL32` symbols for each target BB of each jump
table. This allows debuggers to insert symbolic labels when
disassembling code. `S_LABEL32` symbol records indicate that a location
is definitely code, and can optionally associate a string label with the
code location. BBs generated for jump tables may or may not have string
labels, so it is acceptable for the "name" field within `S_LABEL32`
symbols to be an empty string.

More importantly, this PR allows Windows analysis tools, such as those
that generate hot-patches for the Windows kernel, to use these labels to
distinguish code basic blocks from data blocks. Microsoft's analysis
tools (similar to Bolt) rely on being able to identify all code blocks,
so that the tools can traverse all instructions and verify that
important requirements for hot-patching are met.

This PR has no effect on code generation. It only affects the CodeView
symbols that are emitted into OBJ files, which the linker then
repackages into PDB files.
2025-07-07 12:26:30 -07:00
DeanSturtevant1
ace3d3002f
Add #ifndef NDEBUG/#endif around debug-only code. (#147356) 2025-07-07 10:45:29 -07:00
Matt Arsenault
1121034dd1 Triple: Record default exception handling type
Currently the default exception handling type is scattered
across the backends in MCAsmInfo constructors. Allow this
to be computed from the triple so the IR can centrally determine
the set of ABI calls.

Manually submitting, closes #147225
2025-07-08 00:13:19 +09:00
woruyu
c80fa2364b
[DAG] SDPatternMatch m_Zero/m_One/m_AllOnes have inconsistent undef h… (#147044)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/146871 
This PR resolves https://github.com/llvm/llvm-project/issues/140745

Refactor m_Zero/m_One/m_AllOnes all use struct template function to
match and AllowUndefs=false as default.
2025-07-07 15:04:54 +01:00
Benjamin Maxwell
3277f62344
[SDAG] Remove invalid check (NFC) (#146899)
It does not make sense to do !LC. LC is an RTLIB::Libcall enum, and zero
is a valid value.
2025-07-07 14:42:30 +01:00
Matt Arsenault
b5401624e1
DAG: Add RTLIB::getPOW helper (#147274)
Co-authored-by: Paul Walker <paul.walker@arm.com>
2025-07-07 21:31:49 +09:00
Simon Pilgrim
52383956f8
[DAG] Replace DAGCombiner::ConstantFoldBITCASTofBUILD_VECTOR with SelectionDAG::FoldConstantBuildVector (#147037)
DAGCombiner can already constant fold build vectors of constants/undefs
to a new vector type, but it has to be incredibly careful after
legalization to not affect a target's canonicalized constants.

This patch proposes we move the implementation inside SelectionDAG to
make it easier for targets to manually use the constant folding whenever
it deems it safe to do so.

I've also altered the method to take the BuildVectorSDNode input
directly and consistently use the same SDLoc.
2025-07-07 10:44:03 +01:00
Matt Arsenault
465f2b0571
DAG: Fix asserting in error case for frexp softening (#147236) 2025-07-07 18:37:37 +09:00
Matt Arsenault
08defcb6d3
DAG: Fix asserting in error case for powi softening (#147237) 2025-07-07 18:13:11 +09:00
Matt Arsenault
d8ef156379
DAG: Remove verifyReturnAddressArgumentIsConstant (#147240)
The intrinsic argument is already marked with immarg so non-constant
values are rejected by the IR verifier.
2025-07-07 16:28:47 +09:00
Tomer Shafir
721adc18b7
[CodeGen] Fix stale comment about register coalescing order (#146762)
The register coalescer collects the copies forward, the stale comment
wasn't addressed back then by:
75961ecc1a.
This change updates the coment and also adds a similar one to the other
branch.
2025-07-07 09:54:24 +03:00
AZero13
91cc33f321
[TargetLowering] hasAndNotCompare should be checking for X, not Y (#146935)
Y is the one being bitwise-not, so it should not be passed, as the other
one should be passed instead.
2025-07-07 14:54:29 +09:00
Simon Pilgrim
ba7d78ac45
[DAG] foldABSToABD - fallback to value tracking if the (ABS (SUB LHS, RHS)) operands aren't extended (#147053)
ISD::ABDS can be used if the signed subtraction will not overwrap (this
is an extension to handle cases where the NSW flag has been lost)

ISD::ABDU can be used if both operands have at least 1 zero sign bit.

Fixes #147049
2025-07-06 08:36:46 +01:00
Kazu Hirata
16435a87b6
[CodeGen] Remove an unnecessary cast (NFC) (#147155)
Offset is already of int64_t.
2025-07-05 12:26:35 -07:00
David Green
3448e9c075
[AArch64][GlobalISel] Fix lowering of i64->f32 itofp. (#132703)
This is a GISel equivalent of #130665, preventing a double-rounding
issue in sitofp/uitofp by scalarizing i64->f32 converts. Most of the
changes are made in the ActionDefinitionsBuilder for G_SITOFP/G_UITOFP.
Because it is legal to convert i64->f16 itofp without double-rounding,
but not a fpround f64->f16, that variant is lowered to build the two
extends.
2025-07-05 18:13:19 +01:00
Guy David
a38cf85738
[MachineLICM] Let targets decide if copy instructions are cheap (#146599)
When checking whether it is profitable to hoist an instruction, the pass
may override a target's ruling because it assumes that all COPY
instructions are cheap, and that may not be the case for all
micro-architectures (especially for when copying between different
register classes).

On AArch64 there's 0% difference in performance in LLVM's test-suite
with this change. Additionally, very few tests were affected which shows
how it is not so useful to keep it.

x86 performance is slightly better (but maybe that's just noise) for an
A/B comparison consisting of five iterations on LLVM's test suite (Ryzen
5950X on Ubuntu):
```
$ ./utils/compare.py build-a/results* vs build-b/results* --lhs-name base --rhs-name patch --absolute-diff
Tests: 3341
Metric: exec_time

Program                                       exec_time                 
                                              base      patch     diff  
LoopVector...meChecks4PointersDBeforeA/1000   824613.68 825394.06 780.38
LoopVector...timeChecks4PointersDBeforeA/32    18763.60  19486.02 722.42
LCALS/Subs...test:BM_MAT_X_MAT_LAMBDA/44217    37109.92  37572.52 462.60
LoopVector...ntimeChecks4PointersDAfterA/32    14211.35  14562.14 350.79
LoopVector...timeChecks4PointersDEqualsA/32    14221.44  14562.85 341.40
LoopVector...intersAllDisjointIncreasing/32    14222.73  14562.20 339.47
LoopVector...intersAllDisjointDecreasing/32    14223.85  14563.17 339.32
LoopVector...nLoopFrom_uint32_t_To_uint8_t_      739.60    807.45  67.86
harris/har...est:BENCHMARK_HARRIS/2048/2048    15953.77  15998.94  45.17
LoopVector...nLoopFrom_uint8_t_To_uint16_t_      301.94    331.21  29.27
LCALS/Subs...Raw.test:BM_DISC_ORD_RAW/44217      616.35    637.13  20.78
LCALS/Subs...Raw.test:BM_MAT_X_MAT_RAW/5001     3814.95   3833.70  18.75
LCALS/Subs...Raw.test:BM_HYDRO_2D_RAW/44217      812.98    830.64  17.66
LCALS/Subs...test:BM_IMP_HYDRO_2D_RAW/44217      811.26    828.13  16.87
ImageProce...ENCHMARK_BILATERAL_FILTER/64/4      714.77    726.23  11.46
           exec_time                            
l/r             base          patch         diff
count  3341.000000    3341.000000    3341.000000
mean   903.866450     899.732349    -4.134101   
std    20635.900959   20565.289417   115.346928 
min    0.000000       0.000000      -3380.455787
25%    0.000000       0.000000       0.000000   
50%    0.000000       0.000000       0.000000   
75%    1.806500       1.836397       0.000100   
max    824613.680801  825394.062500  780.381699
```
2025-07-05 14:06:33 +03:00
Rahul Joshi
b38de6c18e
[NFCI][LLVM] Adopt ArrayRef::consume_front() in a few places (#146793) 2025-07-04 10:42:14 -07:00
Simon Pilgrim
740da004af [DAG] Fix static analyzer warning about mismatched argument comments in isConstOrConstSplat. NFC. 2025-07-04 15:00:08 +01:00
Adrian Vogelsgesang
de3c8410d8
[debuginfo][coro] Emit debug info labels for coroutine resume points (#141937)
RFC on discourse:
https://discourse.llvm.org/t/rfc-debug-info-for-coroutine-suspension-locations-take-2/86606

With this commit, we add `DILabel` debug infos to the resume points of a
coroutine. Those labels can be used by debugging scripts to figure out
the exact line and column at which a coroutine was suspended by looking
up current `__coro_index` value inside the coroutines frame, and then
searching for the corresponding label inside the coroutine's resume
function.

The DWARF information generated for such a label looks like:

```
0x00000f71:     DW_TAG_label
                  DW_AT_name    ("__coro_resume_1")
                  DW_AT_decl_file       ("generator-example.cpp")
                  DW_AT_decl_line       (5)
                  DW_AT_decl_column     (3)
                  DW_AT_artificial      (true)
                  DW_AT_LLVM_coro_suspend_idx   (0x01)
                  DW_AT_low_pc  (0x00000000000019be)
```

The labels can be mapped to their corresponding `__coro_idx` values
either via their naming convention `__coro_resume_<N>` or using the new
`DW_AT_LLVM_coro_suspend_idx` attribute. In gdb, those line numebrs can
be looked up using `info line -function my_coroutine -label
__coro_resume_1`. LLDB unfortunately does not understand DW_TAG_label
debug information, yet.

Given this is an artificial compiler-generated label, I did apply the
DW_AT_artificial tag to it. The DWARFv5 standard only allows that tag on
type and variable definitions, but this is a natural extension and was
also blessed in the RFC on discourse.

Also, this commit adds `DW_AT_decl_column` to labels, not only for
coroutines but also for normal C and C++ labels. While not strictly
necessary, I am doing so now because it would be harder to do so later
without breaking the binary LLVM-IR format

Drive-by fixes: While reading the existing test cases to understand how
to write my own test case, I did a couple of small typo fixes and
comment improvements
2025-07-04 10:44:35 +02:00
Austin
a550fef906
[llvm] Use llvm::fill instead of std::fill(NFC) (#146911)
Use llvm::fill instead of std::fill
2025-07-04 14:10:28 +08:00
Florian Hahn
bfd457588a
Revert "[AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (#144947)"
This reverts commit 8ac7210b7f0ad49ae7809bf6a9faf2f7433384b0.

This breaks the building the AArch64 backend, e.g. see
https://github.com/llvm/llvm-project/pull/144947

Revert to unbreak the build.

Also reverts follow-up commits 1e76f012db3ccfaa05e238812e572b5b6d12c17e.
2025-07-03 19:25:01 +01:00
alex-t
8ac7210b7f
[AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (#144947)
If a kernel is known to be executing only a single lane, IR
UniformityAnalysis will take note of that (via
GCNTTIImpl::hasBranchDivergence) and report that all values are uniform.
SelectionDAG's built-in divergence tracking should do the same.
2025-07-03 18:37:37 +02:00
Stephen Tozer
4f047bc595
[DLCov] Origin-Tracking: Collect stack traces in DebugLoc (#146678)
This patch is part of a series that adds origin-tracking to the debugify
source location coverage checks, allowing us to report symbolized stack
traces of the point where missing source locations appear.

This patch adds the logic for collecting stack traces in DebugLoc
instances. We do not symbolize the stack traces in this patch - that
only happens when we decide to actually print them, which will be the
responsibility of debugify. The collection happens in the constructor of
a DebugLoc that has neither a valid location nor an annotation; we also
collect an extra stack trace every time we call setDebugLoc, as
sometimes the more interesting point is not where the DebugLoc was
constructed, but where it was applied to an instruction. This takes the
form of a getCopied() method on DebugLoc, which is the identity function
in normal builds, but adds an extra stack trace in origin-tracking
builds.
2025-07-03 14:59:34 +01:00
Guy David
76274eb2b3
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
Reverting because mis-compiles:
- https://github.com/llvm/llvm-project/pull/131837
- https://github.com/llvm/llvm-project/pull/146320
- https://github.com/llvm/llvm-project/pull/146337
2025-07-03 07:48:08 -04:00
Simon Pilgrim
c79fcfee41 [DAG] combineVSelectWithAllOnesOrZeros - reusing existing VT. NFC. 2025-07-03 10:57:55 +01:00
Philip Reames
220a002396
[SDAG] Prefer scalar for prefix of vector GEP expansion (#146719)
When generating SDAG for a getelementptr with a vector result, we were
previously generating splats for each scalar operand. This essentially
has the effect of aggressively vectorizing the sequence, and leaving it
later combines to scalarize if profitable.

Instead, we can keep the accumulating address as a scalar for as long as
the prefix of operands allows before lazily converting to vector on the
first vector operand. This both better fits hardware which frequently
has a scalar base on the scatter/gather instructions, and reduces the
addressing cost even when not as otherwise we end up with a scalar to
vector domain crossing for each scalar operand.

Note that constant splat offsets are treated as scalar for the above,
and only variable offsets can force a conversion to vector.

---------

Co-authored-by: Craig Topper <craig.topper@sifive.com>
2025-07-02 18:16:27 -07:00
Rahman Lavaee
6b623a6622
[SHT_LLVM_BB_ADDR_MAP] Remove support for versions 1 and 0 (SHT_LLVM_BB_ADDR_MAP_V0). (#146186)
Version 2 was added more than two years ago
(6015a045d7).
So it should be safe to deprecate older versions.
2025-07-02 10:31:52 -07:00
Craig Topper
b62826cc05
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
This is alternative to #145965 that allows RegisterSDNode to be handled
without making a special case.
2025-07-02 09:44:54 -07:00