This PR fixes incorrect alignment when lowering `set` and `getBitField`
operations to LLVM IR. The issue occurred because during lowering, the
function was being called with an alignment of 0, which caused it to
default to the alignment of the packed member. For example, if the
bitfield was packed inside a `u64i`, it would use an alignment of 8.
With this change, the generated code now matches what the classic
codegen produces.
In the assembly format, I changed to be similar to how it's done in
loadOp. If there's a better approach, please feel free to point it out.
This PR upstreams the `set_bitfield` operation used to assign values to
bitfield members in C and C++ struct types.
Handling of AAPCS-specific volatile bitfield semantics will be addressed
in a future PR.
This PR adds support for loading bit-field members from structs using
the `get_bitfield` operation.
It enables retrieving the address of the bitfield-packed member but does
**not** yet support volatile bitfields this will be addressed in a
future PR.
