155 Commits

Author SHA1 Message Date
Akshay Khadse
15f15ab2c8 [x86][MC] Fix movdir64b addressing
This patch is to fix the [[ https://github.com/llvm/llvm-project/issues/63045 | issue 63045]].

Look at the following code:
```
int main(int argc, char *argv[]) {
    int arr[1000];
    __asm movdir64b rax, ZMMWORD PTR [arr]
    return 0;
}
```
Compiling this code using `clang -O0 -fasm-blocks bug.c` gives the a linker error.

The problem seems to be in the generated assembly. Following is the out put of `clang -S -O0 -fasm-blocks bug.c`:
```
movq %rsi, -16(%rbp)
#APP

movdir64b arr, %rax

#NO_APP
xorl %eax, %eax
```
The symbol `arr` should be replaced with some address like `-4(%rbp)`.

This makes me believe that issue is not in the linker, but with the ASM parser.

This issue originates with patch [D145893](https://reviews.llvm.org/D145893). And that's why reverting it fixes the issue. More specifically, the function [isMem512_GR64()](ff471dcf76/llvm/lib/Target/X86/AsmParser/X86Operand.h (L404)) within the [llvm/lib/Target/X86/AsmParser/X86Operand.h](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/X86/AsmParser/X86Operand.h) file.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D151863
2023-06-08 22:41:00 +08:00
Fangrui Song
053bf8640a MS inline asm: remove obsolete code adding AOK_SizeDirective (e.g. dword ptr)
The AOK_SizeDirective part from 5b37c181291210bedfbb7a6af5d51229f3652ef0
(2014-08) seems unneeded nowadays (the root cause has likely been fixed
elsewhere). The part abuses that `call dword ptr foo` assembles the same way as `call
foo` in Intel syntax, which is going to be fixed (changed) by D149579.

The generated object files for
CodeGen/ms-inline-asm{,-functions,-variables,-static-variable}.c and
CodeGenCXX/ms-inline-asm-fields.cpp are unchanged
(-mno-incremental-linker-compatible) with just this patch. When D149579 is
subsequently applied, the FIXME part of `kptr` in
CodeGen/ms-inline-asm-functions.c will be fixed.

Differential Revision: https://reviews.llvm.org/D149695
2023-05-04 09:42:25 -07:00
Nikita Popov
39db5e1ed8 [CodeGen] Convert tests to opaque pointers (NFC)
Conversion performed using the script at:
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34

These are only tests where no manual fixup was required.
2022-10-07 14:22:00 +02:00
Nikita Popov
532dc62b90 [OpaquePtrs][Clang] Add -no-opaque-pointers to tests (NFC)
This adds -no-opaque-pointers to clang tests whose output will
change when opaque pointers are enabled by default. This is
intended to be part of the migration approach described in
https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322/9.

The patch has been produced by replacing %clang_cc1 with
%clang_cc1 -no-opaque-pointers for tests that fail with opaque
pointers enabled. Worth noting that this doesn't cover all tests,
there's a remaining ~40 tests not using %clang_cc1 that will need
a followup change.

Differential Revision: https://reviews.llvm.org/D123115
2022-04-07 12:09:47 +02:00
Aaron Ballman
adc402bf3d Use functions with prototypes when appropriate; NFC
A significant number of our tests in C accidentally use functions
without prototypes. This patch converts the function signatures to have
a prototype for the situations where the test is not specific to K&R C
declarations. e.g.,

  void func();

becomes

  void func(void);

This is the eleventh batch of tests being updated (there are a
significant number of other tests left to be updated).
2022-02-15 16:06:43 -05:00
hyeongyu kim
1b1c8d83d3 [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default.

Test updates are made as a separate patch: D108453

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 18:54:17 +09:00
Nikita Popov
e8b98a5216 [CodeGen] Emit elementtype attributes for indirect inline asm constraints
This implements the clang side of D116531. The elementtype
attribute is added for all indirect constraints (*) and tests are
updated accordingly.

Differential Revision: https://reviews.llvm.org/D116666
2022-01-06 09:29:22 +01:00
hyeongyu kim
fd9b099906 Revert "[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default"
This reverts commit aacfbb953eb705af2ecfeb95a6262818fa85dd92.

Revert "Fix lit test failures in CodeGenCoroutines"

This reverts commit 63fff0f5bffe20fa2c84a45a41161afa0043cb34.
2021-11-09 02:15:55 +09:00
hyeongyukim
aacfbb953e [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default.

Test updates are made as a separate patch: D108453

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105169

[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default (2)

This patch updates test files after D105169.
Autogenerated test codes are changed by `utils/update_cc_test_checks.py,` and non-autogenerated test codes are changed as follows:

(1) I wrote a python script that (partially) updates the tests using regex: {F18594904} The script is not perfect, but I believe it gives hints about which patterns are updated to have `noundef` attached.

(2) The remaining tests are updated manually.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D108453

Resolve lit failures in clang after 8ca4b3e's land

Fix lit test failures in clang-ppc* and clang-x64-windows-msvc

Fix missing failures in clang-ppc64be* and retry fixing clang-x64-windows-msvc

Fix internal_clone(aarch64) inline assembly
2021-11-06 19:19:22 +09:00
Juneyoung Lee
89ad2822af Revert "[Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default"
This reverts commit 7584ef766a7219b6ee5a400637206d26e0fa98ac.
2021-11-06 15:39:19 +09:00
Juneyoung Lee
7584ef766a [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default.

Test updates are made as a separate patch: D108453

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105169
2021-11-06 15:36:42 +09:00
Juneyoung Lee
f193bcc701 Revert D105169 due to the two-stage failure in ASAN
This reverts the following commits:
37ca7a795b277c20c02a218bf44052278c03344b
9aa6c72b92b6c89cc6d23b693257df9af7de2d15
705387c5074bcca36d626882462ebbc2bcc3bed4
8ca4b3ef19fe82d7ad6a6e1515317dcc01b41515
80dba72a669b5416e97a42fd2c2a7bc5a6d3f44a
2021-10-18 23:52:46 +09:00
Juneyoung Lee
8ca4b3ef19 [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default (2)
This patch updates test files after D105169.
Autogenerated test codes are changed by `utils/update_cc_test_checks.py,` and non-autogenerated test codes are changed as follows:

(1) I wrote a python script that (partially) updates the tests using regex: {F18594904} The script is not perfect, but I believe it gives hints about which patterns are updated to have `noundef` attached.

(2) The remaining tests are updated manually.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D108453
2021-10-16 12:01:41 +09:00
Fangrui Song
c2d4fe51bb [X86] Remove little support we had for MPX
GCC 9.1 removed Intel MPX support. Linux kernel removed MPX in 2019.
glibc 2.35 will remove MPX.

Our support is limited: we support assembling of bndmov but not bnd.
Just remove it.

Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D111517
2021-10-12 16:18:51 -07:00
Freddy Ye
1edb76cc91 [X86] merge "={eax}" and "~{eax}" into "=&eax" for MSInlineASM
Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D94466
2021-01-27 22:54:17 +08:00
Fangrui Song
6b3351792c [test] Add {{.*}} to make tests immune to dso_local/dso_preemptable/(none) differences
For a definition (of most linkage types), dso_local is set for ELF -fno-pic/-fpie
and COFF, but not for Mach-O.  This nuance causes unneeded binary format differences.

This patch replaces (function) `define ` with `define{{.*}} `,
(variable/constant/alias) `= ` with `={{.*}} `, or inserts appropriate `{{.*}} `
if there is an explicit linkage.

* Clang will set dso_local for Mach-O, which is currently implied by TargetMachine.cpp. This will make COFF/Mach-O and executable ELF similar.
* Eventually I hope we can make dso_local the textual LLVM IR default (write explicit "dso_preemptable" when applicable) and -fpic ELF will be similar to everything else. This patch helps move toward that goal.
2020-12-30 20:52:01 -08:00
Eric Astor
4a7aa252a3 [X86][AsmParser] re-introduce 'offset' operator
Summary:
Amend MS offset operator implementation, to more closely fit with its MS counterpart:

    1. InlineAsm: evaluate non-local source entities to their (address) location
    2. Provide a mean with which one may acquire the address of an assembly label via MS syntax, rather than yielding a memory reference (i.e. "offset asm_label" and "$asm_label" should be synonymous
    3. address PR32530

Based on http://llvm.org/D37461

Fix broken test where the break appears unrelated.

- Set up appropriate memory-input rewrites for variable references.

- Intel-dialect assembly printing now correctly handles addresses by adding "offset".

- Pass offsets as immediate operands (using "r" constraint for offsets of locals).

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D71436
2019-12-30 14:35:26 -05:00
Eric Astor
dc5b614fa9 [ms] [X86] Use "P" modifier on operands to call instructions in inline X86 assembly.
Summary:
This is documented as the appropriate template modifier for call operands.
Fixes PR44272, and adds a regression test.

Also adds support for operand modifiers in Intel-style inline assembly.

Reviewers: rnk

Reviewed By: rnk

Subscribers: merge_guards_bot, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D71677
2019-12-22 09:16:34 -05:00
Craig Topper
188d92b947 [X86] Don't treat mxcsr as a register name when parsing MS inline assembly.
No instruction takes mxcsr as a an operand so we should always
treat it as an identifier name.
2019-11-13 15:26:18 -08:00
Pengfei Wang
af3a7de20c [X86] add mayRaiseFPException flag and FPCW registers for X87 instructions
Summary:
This patch adds flag "mayRaiseFPException"  , FPCW and FPSW for X87 instructions which could raise
float exception.

Reviewers: pengfei, RKSimon, andrew.w.kaylor, uweigand, kpn, spatel, cameron.mcinally, craig.topper

Reviewed By: craig.topper

Subscribers: thakis, hiraditya, llvm-commits

Patch by LiuChen.

Differential Revision: https://reviews.llvm.org/D68854
2019-11-01 21:12:43 -07:00
Craig Topper
298e1712d8 [X86] Add test case for llvm change r329734
This test ensures the popfd instruction in MS inline assembly can properly find a clobber name for the dirflag register. Previously the register was named 'DF', but it needs to be named 'dirflag' to match the name in the GCC register name list.

llvm-svn: 329738
2018-04-10 18:43:44 +00:00
Nirav Dave
61ffc9c0eb Avoid unecessary opsize byte in segment move to memory
Segment moves to memory are always 16-bit. Remove invalid 32 and 64
bit variants.

Recommiting with missing clang inline assembly test change.

Fixes PR34478.

Reviewers: rnk, craig.topper

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D39847

llvm-svn: 318797
2017-11-21 19:28:13 +00:00
Coby Tayree
afdaa6704f [x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blob
Differential Revision: https://reviews.llvm.org/D38445

llvm-svn: 318739
2017-11-21 08:50:10 +00:00
Coby Tayree
cfa3810aa0 Fixups to FE tests affected by D36793
Differential Revision: https://reviews.llvm.org/D36794

llvm-svn: 311640
2017-08-24 08:47:26 +00:00
Coby Tayree
7d442fc6d4 [X86][Asm] Allow negative immediate to appear before bracketed expression
Currently, only non-negative immediate is allowed prior to a brac expression (memory reference).
MASM / GAS does not have any problem cope with the left side of the real line, so we should be able to as well.

llvm: D36229

Differential Revision: https://reviews.llvm.org/D36230

llvm-svn: 310529
2017-08-09 21:50:22 +00:00
Coby Tayree
69eb696112 [X86][Ms-InlineAsm] Extend MS Dot operator to accept "this" + struct/class pointers aliases
MS InlineAsm Dot operator accepts "Bases" such as "this" (cpp) and class/struct pointer typedef.
This patch enhance its implementation with this behavior.

Differential Revision: https://reviews.llvm.org/D36450

llvm-svn: 310472
2017-08-09 13:31:41 +00:00
Coby Tayree
d2bb48f0bd [x86][inline-asm]Allow a pack of Control Debug to be properly picked
Allows the incorporation of legit (x86) Debug Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D36074

llvm-svn: 309672
2017-08-01 10:51:09 +00:00
Coby Tayree
e7b7290a9f [x86][inline-asm][ms-compat] legalize the use of "jc/jz short <op>"
MS ignores the keyword "short" when used after a jc/jz instruction, LLVM ought to do the same.
llvm: D35892

Differential Revision: https://reviews.llvm.org/D35893

llvm-svn: 309510
2017-07-30 11:13:46 +00:00
Coby Tayree
5ac75b5744 [x86][inline-asm]Allow a pack of Control Regs to be properly picked
Allows the incorporation of legit (x86) Control Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D35903

llvm-svn: 309508
2017-07-30 10:19:10 +00:00
Eric Christopher
cf94152f27 Revert "This patch enables the usage of constant Enum identifiers within Microsoft style inline assembly statements." as it is causing msan failures.
This reverts commits r308985 and r308965

llvm-svn: 309004
2017-07-25 19:17:32 +00:00
Matan Haroush
b4b8d10355 This patch enables the usage of constant Enum identifiers within Microsoft style inline assembly statements.
Differential Revision:
https://reviews.llvm.org/D33277
https://reviews.llvm.org/D33278

llvm-svn: 308965
2017-07-25 10:43:43 +00:00
Marina Yatsina
9f316db6ab [inline asm] dot operator while using imm generates wrong ir + asm - clang part
Inline asm dot operator while using imm generates wrong ir and asm
This is the test for the llvm changes committed in revision 306300

This also fixes bugzilla 32987:
https://bugs.llvm.org//show_bug.cgi?id=32987

The llvm part of the review that contains the test can be found here:
https://reviews.llvm.org/D33039

commit on behald of zizhar

Differential Revision:
https://reviews.llvm.org/D33040

llvm-svn: 306301
2017-06-26 16:09:55 +00:00
Reid Kleckner
6d2ea6ec80 [ms-inline-asm] Use the frontend size only for ambiguous instructions
This avoids problems on code like this:
  char buf[16];
  __asm {
    movups xmm0, [buf]
    mov [buf], eax
  }

The frontend size in this case (1) is wrong, and the register makes the
instruction matching unambiguous. There are also enough bytes available
that we shouldn't complain to the user that they are potentially using
an incorrectly sized instruction to access the variable.

Supersedes D32636 and D26586 and fixes PR28266

llvm-svn: 302179
2017-05-04 18:19:52 +00:00
Coby Tayree
665b89bac5 [X86][MS-compatability][clang] allow MS TYPE/SIZE/LENGTH operators as a part of a compound expression
This patch introduces X86AsmParser with the ability to handle the aforementioned ops within compound "MS" arithmetical expressions.
Currently - only supported as a stand alone Operand, e.g.:
"TYPE X"
now allowed :
"4 + TYPE X * 128"

LLVM side: https://reviews.llvm.org/D31173
Differential Revision: https://reviews.llvm.org/D31174

llvm-svn: 298426
2017-03-21 19:33:32 +00:00
Reid Kleckner
fb9f647e5f MS inline asm: Filter MXCSR out of the inferred clobber list
Since r295004, LLVM has started modelling this new register, but we
don't have GCC constraint inline asm spellings for it yet.

llvm-svn: 295107
2017-02-14 21:38:17 +00:00
Coby Tayree
c0fb36f442 [X86][MS]Adjacent comments within multi-line inline assembly statement
Allowing adjacent comments within MS inline assembly multi-line statement

Differential Revision: https://reviews.llvm.org/D28989

llvm-svn: 294120
2017-02-05 10:23:06 +00:00
Reid Kleckner
fec0f32ea9 Use ${:uid} to generate unique MS asm labels, not {:uid}
llvm-svn: 288093
2016-11-29 00:39:37 +00:00
Reid Kleckner
08ebbcebb9 [MS] Mangle a unique ID into all MS inline asm labels
This solves PR23715 in a way that is compatible with LTO.

MSVC supports jumping to source-level labels and between inline asm
blocks, but we don't.

Also revert the old solution, r255201, which was to mark these calls as
noduplicate.

llvm-svn: 288059
2016-11-28 20:52:19 +00:00
Michael Zuckerman
387530ffe3 [x86][ms-inline-asm] use of "jmp short" in asm is not supported
Test linked to: https://reviews.llvm.org/D24957

Committing in the name of Ziv Izhar: After check-all and LGTM .

Differential Revision: https://reviews.llvm.org/D24958

llvm-svn: 284213
2016-10-14 08:13:27 +00:00
Yunzhong Gao
f4903a3675 (clang part) Implement MASM-flavor intel syntax behavior for inline MS asm block.
Clang tests for verifying the following syntaxes:
1. 0xNN and NNh are accepted as valid hexadecimal numbers, but 0xNNh is not.     
   0xNN and NNh may come with optional U or L suffix.                            
2. NNb is accepted as a valid binary (base-2) number, but 0bNN is not.           
   NNb may come with optional U or L suffix.                                     
                                                                                 
Differential Revision: https://reviews.llvm.org/D22112

llvm-svn: 280556
2016-09-02 23:16:06 +00:00
Marina Yatsina
5f77679356 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the clang part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17766

llvm-svn: 262842
2016-03-07 18:10:25 +00:00
Marina Yatsina
146d2ec06d [ms-inline-asm] Fixing bug in single asm statement support
Fixing a crash caused by trying to merge a single-line asm statement with an asm block that follows it, e.g:
asm int 4
asm {
  int 5
}

Now, only adjacent single-line asm statements that are not surrounded by braces will be merged into one asm call.

Differential Revision: http://reviews.llvm.org/D17496

llvm-svn: 261618
2016-02-23 08:53:45 +00:00
Marina Yatsina
afb72f38f8 [ms inline asm] Add support for label names with '$' chars
In MS inline asm syntax a label with '$' char produces an error, while in AT&T it does not.
In AT&T inline asm syntax Clang escapes the '$' char and replaces it with "$$". Adopted same approach for MS syntax.

Differential Revision: http://reviews.llvm.org/D15795

llvm-svn: 256545
2015-12-29 08:49:34 +00:00
Marina Yatsina
59d35f1415 [X86][ms-inline asm] Test case for adding support for memory operands that include structs
Test case for commit 256381

Differential Revision: http://reviews.llvm.org/D15749

llvm-svn: 256382
2015-12-24 12:11:40 +00:00
Marina Yatsina
71ebc691f6 [ms-inline-asm] Add support for composite structs in MS inline asm
Add MS inline asm support for structs that contain fields that are also structs.

Differential Revision: http://reviews.llvm.org/D15578

llvm-svn: 255890
2015-12-17 12:51:51 +00:00
Hans Wennborg
2edb8fcf0d Mark MS inline ASM 'nodplicate' it it has labels (PR23715)
Duplicating it can lead to labels being defined twice.

Differential revision: http://reviews.llvm.org/D15399

llvm-svn: 255201
2015-12-10 01:38:04 +00:00
Reid Kleckner
14e96b4930 [ms-inline-asm] Add field access to MS inline asm identifier lookup
Now we can parse code like this:
  struct A {
    int field;
  };
  int f(A o) {
    __asm mov eax, o.field
  }

Fixes PR19117.

llvm-svn: 246088
2015-08-26 21:57:20 +00:00
Michael Kuperstein
2229ca71fd [X86] Recognize "flags" as an identifier, not a register in Intel-syntax inline asm
This contains the test-case for r243630.

Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11513

llvm-svn: 243632
2015-07-30 10:10:47 +00:00
Michael Kuperstein
ce1ce989e2 Add test for parsing the XOR operator in Intel syntax inline assembly.
LLVM side of the patch was committed as r239695.

Differential Revision: http://reviews.llvm.org/D10384
Patch by marina.yatsina@intel.com

llvm-svn: 239696
2015-06-14 13:03:27 +00:00
David Blaikie
a953f2825b Update Clang tests to handle explicitly typed load changes in LLVM.
llvm-svn: 230795
2015-02-27 21:19:58 +00:00