Dmitry Preobrazhensky
d8ac03f15e
[AMDGPU][GFX9][DOC][NFC] Update assembler syntax description
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Summary of changes:
- Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205 ).
- Enable omod modifiers for v_max3_f16, v_min3_f16, etc. (https://reviews.llvm.org/D139469 ).
- Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900 ).
- Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet).
- Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783 ).
- Enable image_gather4h (https://reviews.llvm.org/D130764 ).
- Minor corrections and improvements.
2022-12-13 14:01:17 +03:00
Dmitry Preobrazhensky
424fe903d4
[AMDGPU][MC][GFX9][NFC][DOC] Updated AMD GPU assembler syntax description.
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Fixed bugs 48639, 49447, 49448, 49449.
2021-07-23 12:59:42 +03:00
Dmitry Preobrazhensky
3f7985e6ec
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
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Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
2020-08-21 14:25:14 +03:00
Dmitry Preobrazhensky
b9683d3c53
[AMDGPU][MC][DOC] Updated AMD GPU assembler description.
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Summary of changes:
- Updated to reflect recent changes in assembler;
- Minor bugfixing and improvements.
llvm-svn: 372857
2019-09-25 12:38:35 +00:00
Dmitry Preobrazhensky
1fa7aaf5a7
[AMDGPU][MC][DOC] A fix for build failure in r349370
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llvm-svn: 349375
2018-12-17 18:53:10 +00:00
Dmitry Preobrazhensky
47eb63684d
[AMDGPU][MC][DOC] Updated AMD GPU assembler description
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Stage 2: added detailed description of operands
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572
llvm-svn: 349368
2018-12-17 17:38:11 +00:00
