1955 Commits

Author SHA1 Message Date
eopXD
e1f224a647 [4/8][RISCV] Add rounding mode control variant for vfmacc, vfnmacc, vfmsac, vfnmsac, vfmadd, vfnmadd, vfmsub, vfnmsub
Depends on D154631

For the cover letter of the patch-set, please checkout D154628.

This is the 4th patch of the patch-set.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154632
2023-07-13 00:47:27 -07:00
eopXD
1a905e8238 [3/8][RISCV] Add rounding mode control variant for vfmul, vfdiv, vfrdiv, vfwmul
Depends on D154629

For the cover letter of the patch-set, please checkout D154628.

This is the 3rd patch of the patch-set.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154631
2023-07-13 00:43:54 -07:00
eopXD
00093667b1 [2/8][RISCV] Add rounding mode control variant for vfwadd, vfwsub
Depends on D154628

For the cover letter of the patch-set, please checkout D154628.

This is the 2nd patch of the patch-set.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154629
2023-07-13 00:42:00 -07:00
eopXD
474e37c113 [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub
Depends on D152996.

This patch-set aims to add a variant for the RVV floating-point
intrinsics that controls the rounding mode (`frm`). The rounding mode
variant appends `_rm` before the policy suffix to distinguish from
those without them.

Specification PR: riscv-non-isa/rvv-intrinsic-doc#226

This is the 1st patch of the patch-set.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154628
2023-07-13 00:35:36 -07:00
eopXD
76482078cd [RISCV][POC] Model frm control for vfadd
Depends on D152879.

Specification PR: riscv-non-isa/rvv-intrinsic-doc#226

This patch adds variant of `vfadd` that models the rounding mode control.
The added variant has suffix `_rm` appended to differentiate from the
existing ones that does not alternate `frm` and uses whatever is inside.

The value `7` is used to indicate no rounding mode change. Reusing the
semantic from the rounding mode encoding for scalar floating-point
instructions.

Additional data member `HasFRMRoundModeOp` is added so we can append
`_rm` suffix for the fadd variants that models rounding mode control.

Additional data member `IsRVVFixedPoint` is added so we can define
pseudo instructions with rounding mode operand and distinguish the
instructions between fixed-point and floating-point.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D152996
2023-07-13 00:34:00 -07:00
eopXD
5704630ec4 [RISCV] Remove redundant _ta suffix in RVV intrinsics builtins. NFC
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154693
2023-07-09 08:40:36 -07:00
Timm Bäder
381e8052d0 [clang][Sema][NFC] Make worklist in CheckForIntOverflow const 2023-07-02 06:49:55 +02:00
Lucile Nihlen
b776e2a0b0 [clang] detect integer overflow through temporary values
Fixes #63629.

Differential Revision: https://reviews.llvm.org/D154253
2023-06-30 23:19:04 +00:00
serge-sans-paille
dc6f5c9b58
[Clang][Sema] Do not try to analyze dependent alignment during -Wcast-align
Fix #63007

Differential Revision: https://reviews.llvm.org/D151753
2023-06-27 10:29:09 +02:00
eopXD
3b85be3df2 [Clang][RISCV] Check type support for local variable declaration of RVV type
Guard local variable declaration for RVV intrinsic types.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D153510
2023-06-26 01:59:40 -07:00
Elliot Goodrich
b0abd4893f [llvm] Add missing StringExtras.h includes
In preparation for removing the `#include "llvm/ADT/StringExtras.h"`
from the header to source file of `llvm/Support/Error.h`, first add in
all the missing includes that were previously included transitively
through this header.
2023-06-25 15:42:22 +01:00
Matt Arsenault
9d84f8dc94 clang: Add __builtin_elementwise_rint and nearbyint
These are basically the same thing and only differ for strictfp,
so add both for future proofing. Note all the elementwise functions are
currently broken for strictfp, and use non-constrained ops. Add a test
that demonstrates this, but doesn't attempt to fix it.
2023-06-23 19:52:06 -04:00
eopXD
9ed668ad93 [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu
Depends on D151397.

This patch follows the patch-set of D151395. This patch seeks to
update all the remaining fixed-point intrinsics to model vxrm
control, adding rounding mode control for `vsmul`, `vssra`,
`vssrl`, `vnclip`, and `vnclipu`.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D152879
2023-06-20 11:09:24 -07:00
eopXD
5510f0b8f4 [3/3][RISCV][POC] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd, vasub
Depends on D151396.

This is the 3rd patch of the patch-set. For the cover letter of the
patch-set, please checkout D151395.

This commit consists of change in both clang front-end and RISC-
back-end.

In the front-end, this commit adds an additional operand to the C
intrinsics of `vaadd`, `vaaddu`, `vasub`, and `vasubu`, that models
the control of the rounding mode.

In the back-end, using `vaadd` as an example, this commit replaces the
existing `int.riscv.vaadd.*` with `int.riscv.vaadd.rm.*` that was
introduced in the previous patch, with the extra operand that models
the control of the rounding mode (`vxrm`) for RVV fixed-point
intrinsics.

Note: The first 3 commit of the patch-set shows the intent to model the
rounding mode for fixed-point intrinsics by applying change to
`vaadd`, `vaaddu`, `vasub`, and `vasubu`. The proceeding patch will
apply the change to the rest of the other fixed-point instructions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D151397
2023-06-20 11:08:09 -07:00
Matt Arsenault
2a488b4443 clang: Add __builtin_elementwise_round 2023-06-19 11:32:56 -04:00
Serge Pavlov
7dd387d297 [clang] Add __builtin_isfpclass
A new builtin function __builtin_isfpclass is added. It is called as:

    __builtin_isfpclass(<floating point value>, <test>)

and returns an integer value, which is non-zero if the floating point
argument falls into one of the classes specified by the second argument,
and zero otherwise. The set of classes is an integer value, where each
value class is represented by a bit. There are ten data classes, as
defined by the IEEE-754 standard, they are represented by bits:

    0x0001 (__FPCLASS_SNAN)         - Signaling NaN
    0x0002 (__FPCLASS_QNAN)         - Quiet NaN
    0x0004 (__FPCLASS_NEGINF)       - Negative infinity
    0x0008 (__FPCLASS_NEGNORMAL)    - Negative normal
    0x0010 (__FPCLASS_NEGSUBNORMAL) - Negative subnormal
    0x0020 (__FPCLASS_NEGZERO)      - Negative zero
    0x0040 (__FPCLASS_POSZERO)      - Positive zero
    0x0080 (__FPCLASS_POSSUBNORMAL) - Positive subnormal
    0x0100 (__FPCLASS_POSNORMAL)    - Positive normal
    0x0200 (__FPCLASS_POSINF)       - Positive infinity

They have corresponding builtin macros to facilitate using the builtin
function:

    if (__builtin_isfpclass(x, __FPCLASS_NEGZERO | __FPCLASS_POSZERO) {
      // x is any zero.
    }

The data class encoding is identical to that used in llvm.is.fpclass
function.

Differential Revision: https://reviews.llvm.org/D152351
2023-06-18 22:53:32 +07:00
Aaron Ballman
3632e2f517 Diagnose incorrect use of scoped enumerations in format strings
Scoped enumerations in C++ do not undergo conversion to their
underlying type as part of default argument promotion, and so these
uses are UB. GCC correctly diagnoses them, and now Clang matches.

Fixes https://github.com/llvm/llvm-project/issues/38717
2023-06-16 15:03:38 -04:00
Krishna Narayanan
20e81a80e9 Update with warning message for comparison to NULL pointer
The tautological comparison warning was not properly looking through
parenthesized expressions, which is now fixed.

Fixes https://github.com/llvm/llvm-project/issues/42992
Differential Revision: https://reviews.llvm.org/D149000
2023-06-14 08:28:35 -04:00
Artem Dergachev
bb209ce138 [-Wtcb-enforcement] Disable on unevaluated code.
It doesn't make sense for this warning to warn about things
that don't impact runtime behavior.
2023-06-13 14:36:51 -07:00
Paulo Matos
55aeb23fe0 [clang][WebAssembly] Implement support for table types and builtins
This commit implements support for WebAssembly table types and
respective builtins. Table tables are WebAssembly objects to store
reference types. They have a large amount of semantic restrictions
including, but not limited to, only being allowed to be declared
at the top-level as static arrays of zero-length. Not being arguments
or result of functions, not being stored ot memory, etc.

This commit introduces the __attribute__((wasm_table)) to attach to
arrays of WebAssembly reference types. And the following builtins to
manage tables:

* ref   __builtin_wasm_table_get(table, idx)
* void  __builtin_wasm_table_set(table, idx, ref)
* uint  __builtin_wasm_table_size(table)
* uint  __builtin_wasm_table_grow(table, ref, uint)
* void  __builtin_wasm_table_fill(table, idx, ref, uint)
* void  __builtin_wasm_table_copy(table, table, uint, uint, uint)

This commit also enables reference-types feature at bleeding-edge.

This is joint work with Alex Bradbury (@asb).

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D139010
2023-06-10 15:53:13 +02:00
Corentin Jabot
6dc1636815 [Clang] Check for abstract parameters only when functions are defined.
The C++ standard allows abstract parameters in deleted functions
and in function declarations

> The type of a parameter or the return type for a function definition
> shall not be a (possibly cv-qualified) class type that is
> incomplete or abstract within the function body
> unless the function is deleted.

Fixes https://github.com/llvm/llvm-project/issues/63012

Reviewed By: #clang-language-wg, aaron.ballman

Differential Revision: https://reviews.llvm.org/D152096
2023-06-07 21:44:14 +02:00
Yaxun (Sam) Liu
00448a548c [clang] Allow fp in atomic fetch max/min builtins
LLVM IR already allows floating point type in atomicrmw.
Update clang atomic fetch max/min builtins to accept
floating point type like we did for fetch add/sub.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D150985

Fixes: SWDEV-401056
2023-05-31 15:19:31 -04:00
Luke Drummond
e3fbede7f3 [HIP] Add missing __hip_atomic_fetch_sub support
The rest of the fetch/op intrinsics were added in e13246a2ec3 but sub
was conspicuous by its absence.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D151701
2023-05-30 22:22:43 +01:00
Bryan Chan
9f6250f591 [Clang][AArch64][SME] Add vector load/store (ld1/st1) intrinsics
This patch adds support for the following SME ACLE intrinsics (as defined
in https://arm-software.github.io/acle/main/acle.html):

  - svld1_hor_za8      // also for _za16, _za32, _za64 and _za128
  - svld1_hor_vnum_za8 // also for _za16, _za32, _za64 and _za128
  - svld1_ver_za8      // also for _za16, _za32, _za64 and _za128
  - svld1_ver_vnum_za8 // also for _za16, _za32, _za64 and _za128
  - svst1_hor_za8      // also for _za16, _za32, _za64 and _za128
  - svst1_hor_vnum_za8 // also for _za16, _za32, _za64 and _za128
  - svst1_ver_za8      // also for _za16, _za32, _za64 and _za128
  - svst1_ver_vnum_za8 // also for _za16, _za32, _za64 and _za128

SveEmitter.cpp is extended to generate arm_sme.h (currently named
arm_sme_draft_spec_subject_to_change.h) and other SME definitions from
arm_sme.td, which is modeled after arm_sve.td. Common TableGen definitions
are moved into arm_sve_sme_incl.td.

Co-authored-by: Sagar Kulkarni <sagar.kulkarni1@huawei.com>

Reviewed By: sdesmalen, kmclaughlin

Differential Revision: https://reviews.llvm.org/D127910
2023-05-28 21:08:13 -04:00
Craig Topper
6006d43e2d LLVM_FALLTHROUGH => [[fallthrough]]. NFC
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D150996
2023-05-24 12:40:10 -07:00
eopXD
61346ed51f [11/11][POC][Clang][RISCV] Define vset for tuple type
For the cover letter of this patch-set, please checkout D146872.

Depends on D147916.

This is the 11th patch of the patch-set.

This patch is a proof-of-concept and will be extended to full coverage
in the future. Only vset for tuple type of NF=2, EEW=32, LMUL=1 is
defined now.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D147917
2023-05-22 04:32:43 -07:00
eopXD
6a097e279c [10/11][POC][Clang][RISCV] Define vget for tuple type
For the cover letter of this patch-set, please checkout D146872.

Depends on D147915.

This is the 10th patch of the patch-set.

This patch is a proof-of-concept and will be extended to full coverage
in the future. Only vget for tuple type of NF=2, EEW=32, LMUL=1 is
defined now.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D147916
2023-05-22 04:29:28 -07:00
Artem Belevich
6963c61f0f [NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*
The optional argument is needed for CUDA-11+ headers when we're compiling for
sm_80+ GPUs.

Differential Revision: https://reviews.llvm.org/D150820
2023-05-19 10:59:36 -07:00
Artem Belevich
0e43eb24bd Revert "[NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*"
Breaks MLIR which happens to be using the intrinsics.

This reverts commit e7b9c2f00fa04ef8d9b69ee0e36d7775823dbe6b.
2023-05-18 11:45:06 -07:00
Artem Belevich
e7b9c2f00f [NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*
The optional argument is needed for CUDA-11+ headers when we're compiling for
sm_80+ GPUs.

Differential Revision: https://reviews.llvm.org/D150820
2023-05-18 11:05:44 -07:00
Kazu Hirata
ed1539c6ad Migrate {starts,ends}with_insensitive to {starts,ends}_with_insensitive (NFC)
This patch migrates uses of StringRef::{starts,ends}with_insensitive
to StringRef::{starts,ends}_with_insensitive so that we can use names
similar to those used in std::string_view.

Note that the llvm/ directory has migrated in commit
6c3ea866e93003e16fc55d3b5cedd3bc371d1fde.

I'll post a separate patch to deprecate
StringRef::{starts,ends}with_insensitive.

Differential Revision: https://reviews.llvm.org/D150506
2023-05-16 10:12:42 -07:00
Qiu Chaofan
fa1f88cdec Reland "[PowerPC] Add target feature requirement to builtins"
This relands D143467 after fixing build failure with GCC.
2023-05-10 15:43:52 +08:00
Vitaly Buka
af88d34f05 Revert "[PowerPC] Add target feature requirement to builtins"
Breaks PPC bots, see D143467.

This reverts commit 651b0e2e7afca926c3d4f8d7f988db40b9832676.
2023-05-08 11:16:55 -07:00
Qiu Chaofan
651b0e2e7a [PowerPC] Add target feature requirement to builtins
Clang has mechanism to specify required target features of a built-in
function. This patch adds such definitions to Altivec, VSX, HTM,
PairedVec and MMA builtins.

This will help frontend to detect incompatible target features of
bulitin when using target attribute syntax.

Reviewed By: nemanjai, kamaub

Differential Revision: https://reviews.llvm.org/D143467
2023-05-08 17:53:25 +08:00
Rishabh Bali
0b3d737877 Check if First argument in _builtin_assume_aligned_ is of pointer type
Currently clang doesn't verify if the first argument in
`_builtin_assume_aligned` is of pointer type. This leads to an
assertion build failure. This patch aims to add a check if the first
argument is of pointer type or not and diagnose it with
diag::err_typecheck_convert_incompatible if its not of pointer type.

Fixes https://github.com/llvm/llvm-project/issues/62305
Differential Revision: https://reviews.llvm.org/D149514
2023-05-05 13:11:16 -04:00
Nelson Chu
8ed9cf06e9 [SiFive][RISCV][clang] Support C intrinsics for xsfvcp extension.
Depends on D147934 and D147935

Differential Revision: https://reviews.llvm.org/D148223
2023-05-02 05:40:13 -07:00
Craig Topper
42e79d9771 [RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.
This allows the user to set the size of the scalable vector so they
can be used in structs and as the type of global variables. This works
by representing the type as a fixed vector instead of a scalable vector
in IR. Conversions to and from scalable vectors are made where necessary
like function arguments/returns and intrinsics.

This features has been requested here
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/176
I know arm_sve_vector_bits is used by the Eigen library so this
could be used to port Eigen to RVV.

This patch adds a new preprocessor define `__riscv_v_fixed_vlen` that
is set when -mrvv_vector_bits is passed on the command line.

The code is largely based on the AArch64 code. A lot of code was
copy/pasted and then modiied to RVV. There may be some opportunities
for sharing.

This first patch only supports the LMUL=1 types. Additional changes
will be needed to support other LMULs. I have also not supported
mask vectors.

Differential Revision: https://reviews.llvm.org/D145088
2023-04-28 15:41:17 -07:00
Piyou Chen
8a3950510f [RISCV] Support scalar/fix-length vector NTLH intrinsic with different domain
This commit implements the two NTLH intrinsic functions.

```
type __riscv_ntl_load (type *ptr, int domain);
void __riscv_ntl_store (type *ptr, type val, int domain);

```

```
enum {
  __RISCV_NTLH_INNERMOST_PRIVATE = 2,
  __RISCV_NTLH_ALL_PRIVATE,
  __RISCV_NTLH_INNERMOST_SHARED,
  __RISCV_NTLH_ALL
};
```

We encode the non-temporal domain into MachineMemOperand flags.

1. Create the RISC-V built-in function with custom semantic checking.
2. Assume the domain argument is a compile time constant,
and make it as LLVM IR metadata (nontemp_node).
3. Encode domain value as two bits MachineMemOperand TargetMMOflag.
4. According to MachineMemOperand TargetMMOflag, select corrsponding ntlh instruction.

Currently, it supports scalar type and fixed-length vector type.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D143364
2023-04-24 20:15:14 -07:00
Ilya Biryukov
f27b77e5c5 [Sema] Populate declarations inside TypeLocs for some invalid types
This also reverts 282cae0b9a602267ad7ef622f770066491332a11 as the
particular crash is now handled by the new code.

Before this change Clang would always leave declarations inside the
type-locs as `null` if the declarator had an invalid type. This patch
populates declarations even for invalid types if the structure of the
type and the type-locs match.

There are certain cases that may still cause crashes. These happen when
Clang recovers the type in a way that is not reflected in the
declarator's structure, e.g. adding a pointer when it was not present in
the code for ObjC interfaces or ignoring pointers written in the code
in C++ with auto return type (`auto* foo() -> int`). Those cases look
fixable with a better recovery strategy and I plan to follow up with
more patches to address those.

The first attempt caused 31 tests from `check-clang` to crash due to
different structure of the types and type-locs after certain errors. The
good news is that the failure is localized and mismatch in structures is
discovered by assertions inside `DeclaratorLocFiller`. Some notable
cases caught by existing tests:
- Invalid chunks when type is fully ignored and replace with int or now.
  Crashed in `C/C2x/n2838.c`.
- Invalid return types in lambdas. Crashed in `CXX/drs/dr6xx.cpp`.
- Invalid member pointers. Crashed in `CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp`
- ObjC recovery that adds pointers. Crashed in `SemaObjC/blocks.m`

This change also updates the output of `Index/complete-blocks.m`.
Not entirely sure what causes the change, but the new function signature
is closer to the source code, so this seems like an improvement.

Reviewed By: aaron.ballman, erichkeane

Differential Revision: https://reviews.llvm.org/D146971
2023-04-06 19:02:41 +02:00
David Blaikie
e5144d9d2d Fix a few clang-tidy warnings (container empty checks, function decl/def param naming) 2023-04-05 01:06:41 +00:00
Xiang1 Zhang
038b7e6b76 [X86] Support AMX Complex instructions
Reviewed By: Wang Pengfei

Differential Revision: https://reviews.llvm.org/D147420
2023-04-04 09:54:46 +08:00
Aditya Singh
dedd7b6548 Added checking for completeness of lvalue in conditional operator
Given:
```
struct x y;
int main(void)
{
    (void)(1 ? y : y);
}
struct x {int i;};
```
The conditional operator(?:) requires the second and third operands to
be of compatible types. To be compatible, they also need to be
complete (however, both can be void). Therefore, the expected response
from clang after running the above code as a C program should be error
dialogue pointing out that both the types are incomplete hence
incompatible, but the code compiled without any errors.

The patch ensures the completeness in the CheckCondtionalOperand
function present in llvm-project/clang/lib/Sema/SemaChecking.cpp.

Fixes https://github.com/llvm/llvm-project/issues/59718
Differential Revision: https://reviews.llvm.org/D144358
2023-03-27 14:47:08 -04:00
Ilya Biryukov
282cae0b9a [Sema] Fix crash on __fp16 parameters in template instantiations
Fixes #61441.

Currently, Clang stores `nullptr` in the parameter lists inside
`FunctionProtoTypeLoc` if `__fp16` is used without pointer qualifiers.

Any code path that calls `Declarator::setInvalidType()` before
`GetFullTypeForDeclarator` will lead to the same problem downstream.

The relevant code is:
```cpp
if (D.isInvalidType())
  return Context.getTrivialTypeSourceInfo(T);

return GetTypeSourceInfoForDeclarator(state, T, TInfo);
```

`GetTypeSourceInfoForDeclarator` sets the parameter `Decl`, but we can't
call it when `isInvalidType() == true` as this causes other assertion
failures that seem harder to fix.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D146426
2023-03-21 14:06:46 +01:00
Paulo Matos
8d0c889752 [clang][WebAssembly] Initial support for reference type funcref in clang
This is the funcref counterpart to 890146b. We introduce a new attribute
that marks a function pointer as a funcref. It also implements builtin
__builtin_wasm_ref_null_func(), that returns a null funcref value.

Differential Revision: https://reviews.llvm.org/D128440
2023-03-17 18:31:44 +01:00
jinge90
b38aa29717 Add __builtin_set_flt_rounds
This builtin will be converted to llvm.set.rounding intrinsic
in IR level and should be work with "#pragma STDC FENV_ACCESS ON"
since it changes default FP environment. Users can change rounding
mode via this builtin without introducing libc dependency.

Reviewed by: andrew.w.kaylor, rjmccall, sepavloff, aaron.ballman
Differential Revision: https://reviews.llvm.org/D145765
Signed-off-by: jinge90 <ge.jin@intel.com>
2023-03-15 11:13:55 +08:00
Joshua Batista
4c82050c56 Add codegen for llvm exp/exp2 elementwise builtins
Add codegen for llvm exp/exp2 elementwise builtin
The exp/exp2 elementwise builtins are necessary for HLSL codegen.
Tests were added to make sure that the expected errors are encountered when these functions are given inputs of incompatible types.
The new builtins are restricted to floating point types only.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D145270
2023-03-09 12:14:59 -08:00
Aaron Ballman
feec067982 Revert "Add __builtin_set_flt_rounds"
This reverts commit 24b823554acd25009731b2519880aa18c7263550.

These changes broke the PPC build bot.
2023-03-09 08:02:31 -05:00
jinge90
24b823554a Add __builtin_set_flt_rounds
This builtin will be converted to llvm.set.rounding intrinsic
in IR level and should be work with "#pragma STDC FENV_ACCESS ON"
since it changes default FP environment. Users can change rounding
mode via this builtin without introducing libc dependency.

Reviewed by: andrew.w.kaylor, rjmccall, sepavloff
Differential Revision: https://reviews.llvm.org/D144454
Signed-off-by: jinge90 <ge.jin@intel.com>
2023-03-09 11:52:52 +08:00
Matt Arsenault
8709bcacfb clang: Add __builtin_elementwise_fma
I didn't understand why the other builtins have promotion logic,
or how it would apply for a ternary operation. Implicit conversions
are evil to begin with,  and even more so when the purpose is to get
an exact IR intrinsic. This checks all the arguments have the same type.
2023-02-24 21:55:08 -04:00
Yaxun (Sam) Liu
8cda128c1e [clang]Fix warning for signed conversion on LP64
Currently clang emits warning with -Wconversion for the following code
on LP64 system e.g. x86_64-unknown-linux-gnu:

long foo(long x) {
  return 1LL<<x;
}
warning: implicit conversion changes signedness: 'long long' to 'long' [-Wsign-conversion]

return 1ll << x;
~~~~~~ ~~~~^~~~
This does not make sense since all operands are signed.

This patch fixes that to match -m32 and GCC behaviour.

Reviewed by: Fangrui Song

Differential Revision: https://reviews.llvm.org/D144011
2023-02-21 12:43:42 -05:00