9 Commits

Author SHA1 Message Date
Luke Lau
2c213c4504 [Clang] Fix reference to sve in rvv driver test comment. NFC 2024-01-08 16:04:33 +07:00
Fangrui Song
f39c399d9d [Driver] -###: exit with code 1 if hasErrorOccurred
The exit code for -### is inconsistent. Unrecognized options lead to
exit code 1, as expected. However, most others errors (including invalid
option value) lead to exit code 0, differing from GCC and most utilities.

This is a longstanding quirk of -###, and we didn't fix it because many
driver tests need adjustment.

Change -### to be similar to -fdriver-only -v and exit with code 1.

This requires fixing many driver tests, but the end result gives us
stronger tests.

* Existing `RUN: %clang -### ...` tests usually don't use `CHECK-NOT: error:` or `--implicit-check-not=error:`.
  If a change introduces an error, such a change usually cannot be detected.
* Many folks contributing new tests don't know `-fdriver-only -v`.
  To test no driver error/warning for new tests, they can use the familiar `-### -Werror`
  instead of `-fdriver-only -v -Werror`.

An incomplete list of prerequisite test improvement:

* 2f79bb10461d114783a1548201928549ace09755: add -nogpulib to some AMDGPU tests
* 9155e517e6e1cda474d0d0fa82f71696c325bc10: add --cuda-path= (test w/ and w/o /usr/local/cuda)
* 80765ede5bbcca1364c2d4ae06127011eaba6389: -mcpu=native may return either 0 or 1, depending on whether `--target=` specifies a native target
* abae53f43f0d1da8d8e421f4a628d7ec64d6e365: fix -fuse-ld=lld misuses (test w/o and w/o /usr/local/bin/ld.lld)
* ab68df505e5bb8808ee44f53044b50ca7575098e: add -resource-dir= and -fvisibility=hidden
 to some -fsanitize=cfi tests
* d5ca1602f64114f612ad5630f04e4aa90591c78d: --rtlib=platform without --unwindlib= may fail if CLANG_DEFAULT_UNWINDLIB=unwindlib

Reviewed By: jhuber6, yaxunl, dblaikie

Differential Revision: https://reviews.llvm.org/D156363
2023-08-01 13:23:51 -07:00
Fangrui Song
662c9ef180 Revert D156363 "[Driver] -###: exit with code 1 if hasErrorOccurred"
This reverts commit 8c3550b1a78fde7bf28f420da8447d9fde37017f.

clang/test/Driver/fsanitize.c has a mysterious failure worth
investigation.
2023-07-30 19:52:26 -07:00
Fangrui Song
8c3550b1a7 [Driver] -###: exit with code 1 if hasErrorOccurred
The exit code for -### is inconsistent. Unrecognized options lead to
exit code 1, as expected. However, most others errors (including invalid
option value) lead to exit code 0, differing from GCC and most utilities.

This is a longstanding quirk of -###, and we didn't fix it because many
driver tests need adjustment.

Change -### to be similar to -fdriver-only -v and exit with code 1.

This requires fixing many driver tests, but the end result gives us
stronger tests.

* Existing `RUN: %clang -### ...` tests usually don't use `CHECK-NOT: error:` or `--implicit-check-not=error:`.
  If a change introduces an error, such a change usually cannot be detected.
* Many folks contributing new tests don't know `-fdriver-only -v`.
  To test no driver error/warning for new tests, they can use the familiar `-### -Werror`
  instead of `-fdriver-only -v -Werror`.

An incomplete list of prerequisite test improvement:

* 2f79bb10461d114783a1548201928549ace09755: add -nogpulib to some AMDGPU tests
* 9155e517e6e1cda474d0d0fa82f71696c325bc10: add --cuda-path= (test w/ and w/o /usr/local/cuda)
* 80765ede5bbcca1364c2d4ae06127011eaba6389: -mcpu=native may return either 0 or 1, depending on whether `--target=` specifies a native target
* abae53f43f0d1da8d8e421f4a628d7ec64d6e365: fix -fuse-ld=lld misuses (test w/o and w/o /usr/local/bin/ld.lld)

Reviewed By: jhuber6, yaxunl, dblaikie

Differential Revision: https://reviews.llvm.org/D156363
2023-07-29 20:04:00 -07:00
Fangrui Song
2f372aecb5 Revert D156363 "[Driver] -###: exit with code 1 if hasErrorOccurred"
This reverts commit e39bf32b3bc2f0cc21d783ba789bd82553493875.

Some tests have different behaviors depent on whether certain directories/files are present on the host.
An incomplete list from https://lab.llvm.org/buildbot/#/builders/109/builds/70149

csky-toolchain.c
riscv*-toolchain.c
fuchsia.*
hip-*
ohos.c
2023-07-28 21:43:42 -07:00
Fangrui Song
e39bf32b3b [Driver] -###: exit with code 1 if hasErrorOccurred
The exit code for -### is inconsistent. Unrecognized options lead to
exit code 1, as expected. However, most others errors (including invalid
option value) lead to exit code 0, differing from GCC and most utilities.

This is a longstanding quirk of -###, and we didn't fix it because many
driver tests need adjustment.

Change -### to be similar to -fdriver-only -v and exit with code 1.

This requires fixing many driver tests, but the end result gives us
stronger tests.

* Existing `RUN: %clang -### ...` tests usually don't use `CHECK-NOT: error:` or `--implicit-check-not=error:`.
  If a change introduces an error, such a change usually cannot be detected.
* Many folks contributing new tests don't know `-fdriver-only -v`.
  To test no driver error/warning for new tests, they can use the familiar `-### -Werror`
  instead of `-fdriver-only -v -Werror`.

Reviewed By: jhuber6, yaxunl, dblaikie

Differential Revision: https://reviews.llvm.org/D156363
2023-07-28 20:31:39 -07:00
Craig Topper
72d23a2ec1 [RISCV] Support LMUL!=1 for __attribute__((riscv_rvv_vector_bits(N)))
The first patch supported only LMUL=1 types. This patch supports
LMUL!=1.

LMUL is length multiplier that allows multiple vector registers to
be treated as one large register or a fraction of a single vector
register. Supported values for LMUL are 1/8, 1/4, 1/2, 1, 2, 4, and 8.

An LMUL=2 type will be twice as large as an LMUL=1 type. An LMUL=1/2
type will be half the size as an LMUL=1 type.

Type name with "m2" is LMUL=2, "m4" is LMUL=4.
Type name with "mf2" is LMUL=1/2, "mf4" is LMUL=1/4.

For the LMUL!=1 types the user will need to scale __riscv_v_fixed_vlen
by the LMUL before passing to the attribute.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D150926
2023-06-08 09:13:43 -07:00
Craig Topper
42e79d9771 [RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.
This allows the user to set the size of the scalable vector so they
can be used in structs and as the type of global variables. This works
by representing the type as a fixed vector instead of a scalable vector
in IR. Conversions to and from scalable vectors are made where necessary
like function arguments/returns and intrinsics.

This features has been requested here
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/176
I know arm_sve_vector_bits is used by the Eigen library so this
could be used to port Eigen to RVV.

This patch adds a new preprocessor define `__riscv_v_fixed_vlen` that
is set when -mrvv_vector_bits is passed on the command line.

The code is largely based on the AArch64 code. A lot of code was
copy/pasted and then modiied to RVV. There may be some opportunities
for sharing.

This first patch only supports the LMUL=1 types. Additional changes
will be needed to support other LMULs. I have also not supported
mask vectors.

Differential Revision: https://reviews.llvm.org/D145088
2023-04-28 15:41:17 -07:00
Craig Topper
089bfedfb8 [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=
This option will control the vscale min/max.

I have left out the '+' support that SVE supports for now. We already
have minimum controlled by the Zvl*b extension so this didn't seem that
useful.

I've added "scalable" from SVE to allow the option to be cancelled later on
command line. Though this name might make less sense for RISC-V since
the word "scalable" does not appear in the V spec. Maybe something like
"unknown" or "runtime" or "variable" would be better?

In addition to "scalable", 64, 128, 256, 512, ..., 65536, I have added an extra
value "zvl" that will use the value from Zvl*b as the min and max.
This avoids repeating the numeric value in two places or to get
min/max from -mcpu.

The primary effect of this option today is simplification of stack
address calculations for RVV vectors and avoiding the use of
vrgatherei16 in some cases if we know there are less than 256 elements.

Future patches may add something similar to the arm_sve_vector_bits
attribute to allow RVV vectors to be used in structs and global
variables.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D142144
2023-02-02 10:32:14 -08:00