The recently announced IBM z17 processor implements the architecture
already supported as "arch15" in LLVM. This patch adds support for "z17"
as an alternate architecture name for arch15.
This patch also add the scheduler description for the z17 processor,
provided by Jonas Paulsson.
This patch adds support for the next-generation arch15
CPU architecture to the SystemZ backend.
This includes:
- Basic support for the new processor and its features.
- Detection of arch15 as host processor.
- Assembler/disassembler support for new instructions.
- Exploitation of new instructions for code generation.
- New vector (signed|unsigned|bool) __int128 data types.
- New LLVM intrinsics for certain new instructions.
- Support for low-level builtins mapped to new LLVM intrinsics.
- New high-level intrinsics in vecintrin.h.
- Indicate support by defining __VEC__ == 10305.
Note: No currently available Z system supports the arch15
architecture. Once new systems become available, the
official system name will be added as supported -march name.
This change does two kinds of splits:
- Splits each target into a different file. Some targets are left in the
same files, such as riscv32/64 and x86/_64 as these tests and lists are
very similar.
- Splits up the very long 'note:' lines which contain a list of CPUs,
using `CHECK-SAME`. There was a note about this not being possible
before, but with `{{^}}`, this is now possible -- I have
verified that this does the right thing if a single CPU anywhere in the
list is left out.
These tests had become quite annoying to change when adding a CPU, and I
believe this change makes these easier to maintain, and should cut down
on conflicts in these files (or at least makes conflicts easier to
resolve).
I apologise in advance for downstream conflicts, but hopefully that's a
small amount of short term pain, in return for fewer conflicts in
future.
