2 Commits

Author SHA1 Message Date
Momchil Velikov
962c4217bc
[MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506)
This change only applies to functions the can be reasonably expected to
use SVE registers.

Modifying vector length in the middle of a function might cause
incorrect stack deallocation if there are callee-saved SVE registers or
incorrect access to SVE stack slots.

Addresses (non-issue) https://github.com/llvm/llvm-project/issues/143670
2025-07-09 09:32:25 +01:00
Benjamin Maxwell
e280c287e4
[mlir] Add mlir_arm_runner_utils library for use in integration tests (#78583)
This adds a new `mlir_arm_runner_utils` library that contains utils
specific to Arm/AArch64. This is for use in MLIR integration tests.

This initial patch adds `setArmVLBits()` and `setArmSVLBits()`. This
allows changing vector length or streaming vector length at runtime (or
setting it to a known minimum, i.e. 128-bits).
2024-01-22 09:28:13 +00:00