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55 Commits

Author SHA1 Message Date
Owen Anderson
235c276442 Attempt to get Thumb2 branch fixups working properly. 
llvm-svn: 121593
 2010-12-10 23:02:28 +00:00
Owen Anderson
4743d75640 Fixups for Thumb2 vldr's need to have the effective PC aligned as well. 
llvm-svn: 121587
 2010-12-10 22:46:47 +00:00
Jim Grosbach
e119da1146 Thumb unconditional branch binary encoding. rdar://8754994 
llvm-svn: 121496
 2010-12-10 18:21:33 +00:00
Jim Grosbach
78485ad65e Thumb conditional branch binary encodings. rdar://8745367 
llvm-svn: 121493
 2010-12-10 17:13:40 +00:00
Owen Anderson
cb4d8f2e74 Use the new IsAligned fixup flag to improve fixup encodings for Thumb2 branches. This is still not perfect, 
but it gets many more of them correct than it did previously.

llvm-svn: 121414
 2010-12-09 21:34:47 +00:00
Owen Anderson
3ef19d9d48 Fix an issue in some Thumb fixups, where the effective PC address needs to be 4-byte aligned when calculating 
the offset.  Add a new fixup flag to represent this, and use it for the one fixups that I have a testcase for needing
this.  It's quite likely that the other Thumb fixups will need this too, and to have their fixup encoding logic
adjusted accordingly.

llvm-svn: 121408
 2010-12-09 20:27:52 +00:00
Jim Grosbach
68b27eb9d1 Rename CB/CBZ specific fixup accordingly. 
llvm-svn: 121404
 2010-12-09 19:50:12 +00:00
Owen Anderson
3e6ee1db3e Fix Thumb2 fixups for ldr. 
llvm-svn: 121350
 2010-12-09 01:51:07 +00:00
Owen Anderson
14e41271b7 Fix typo in Thumb2 branch fixup. 
llvm-svn: 121342
 2010-12-09 01:02:09 +00:00
Bill Wendling
c4d333f02a Attempt to make the bit-twiddling readable resulted in the binary value being 
overwritten.

llvm-svn: 121337
 2010-12-09 00:44:33 +00:00
Bill Wendling
3392bfc8f3 The BLX instruction is encoded differently than the BL, because why not? In 
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.

Attempt to get the encoding at slightly more correct with this.

llvm-svn: 121336
 2010-12-09 00:39:08 +00:00
Owen Anderson
302d5fd0d8 Fix Thumb2 BCC encoding and fixups. 
llvm-svn: 121329
 2010-12-09 00:27:41 +00:00
Bill Wendling
a7d6aa902a Support the "target" encodings for the CB[N]Z instructions. 
llvm-svn: 121308
 2010-12-08 23:01:43 +00:00
Jim Grosbach
3c68561453 Tweak ARM fixup value adjustments for Thumb to better handle the half-word 
ordering of thumb mode.

llvm-svn: 121280
 2010-12-08 20:32:07 +00:00
Owen Anderson
dae32fd206 Improve comment. 
llvm-svn: 121272
 2010-12-08 19:31:11 +00:00
Jim Grosbach
d18f98b969 Add initializer. 
llvm-svn: 121262
 2010-12-08 15:36:45 +00:00
Bill Wendling
8a6449c46e Add support for loading from a constant pool. 
llvm-svn: 121226
 2010-12-08 01:57:09 +00:00
Jim Grosbach
87055ed6f4 Let target asm backends see assembler flags as they go by. Use that to handle 
thumb vs. arm mode differences in WriteNopData().

llvm-svn: 121219
 2010-12-08 01:16:55 +00:00
Owen Anderson
72ce453c73 Simplify the byte reordering logic slightly. 
llvm-svn: 121216
 2010-12-08 00:21:33 +00:00
Owen Anderson
0f7142d808 VLDR fixups need special handling under Thumb. While the encoding is the same, 
the order of the bytes in the data stream is flipped around.

llvm-svn: 121215
 2010-12-08 00:18:36 +00:00
Bill Wendling
f09c44c7ab Cleanup in the Darwin end. No functionality change. 
llvm-svn: 121198
 2010-12-07 23:11:00 +00:00
Bill Wendling
721724e643 A bit of cleanup: early exit ApplyFixup and cache the Fixup offset. No 
functionality change.

llvm-svn: 121195
 2010-12-07 23:05:20 +00:00
Jim Grosbach
9e1994698d Add fixup for Thumb1 BL/BLX instructions. 
llvm-svn: 121072
 2010-12-06 23:57:07 +00:00
Rafael Espindola
0f30fec0bd Remove the instruction fragment to data fragment lowering since it was causing 
freed data to be read. I will open a bug to track it being reenabled.

llvm-svn: 121028
 2010-12-06 19:08:48 +00:00
Benjamin Kramer
eaa536a773 Remove unused variable. 
llvm-svn: 120836
 2010-12-03 19:55:37 +00:00
Jason W Kim
d5e6e5459f fix ARM::fixup_arm_branch, cleanup, and share more code between ELF and Darwin 
llvm-svn: 120832
 2010-12-03 19:40:23 +00:00
Jim Grosbach
ce2bd8d05f Add support for binary encoding of ARM 'adr' instructions referencing constant 
pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.

llvm-svn: 120635
 2010-12-02 00:28:45 +00:00
Jason W Kim
fc5c522864 fixing style nit: move class static to global static 
llvm-svn: 120619
 2010-12-01 22:46:50 +00:00
Owen Anderson
943fb60b1f Add correct encodings for STRD and LDRD, including fixup support. Additionally, update these to unified syntax. 
llvm-svn: 120589
 2010-12-01 19:18:46 +00:00
Jason W Kim
b5c9cc54d3 kill trailing space 
llvm-svn: 120586
 2010-12-01 19:07:22 +00:00
Jim Grosbach
7f5b475852 10 bits, not 12. 
llvm-svn: 120584
 2010-12-01 18:51:32 +00:00
Bill Wendling
901d4d07d8 Remove "comparison of integers of different signs" warning by making the 
variable unsigned.

llvm-svn: 120541
 2010-12-01 02:49:04 +00:00
Jason W Kim
29805961d8 ARM/MC/ELF relocation "hello world" for movw/movt. 
Lifted adjustFixupValue() from Darwin for sharing w ELF.
Test added
TODO:
  refactor ELFObjectWriter::RecordRelocation more.
  Possibly share more code with Darwin?
  Lots more relocations...

llvm-svn: 120534
 2010-12-01 02:40:06 +00:00
Jim Grosbach
2d3e5c1aec Fix handling of ARM negative pc-relative fixups for loads and stores. 
llvm-svn: 120480
 2010-11-30 22:40:36 +00:00
Daniel Dunbar
a5f50c16f7 MC/Mach-O: Switch to using MachOFormat.h. 
- I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).

llvm-svn: 120187
 2010-11-27 04:38:36 +00:00
Rafael Espindola
bf4a4e4ad9 Remove the unused TheTarget member. 
llvm-svn: 120168
 2010-11-26 04:24:21 +00:00
Rafael Espindola
7a2cd8b540 make isVirtualSection a virtual method on MCSection. Chris' suggestion. 
llvm-svn: 119547
 2010-11-17 20:03:54 +00:00
Chris Lattner
9fdd10dbce tidy up 
llvm-svn: 119462
 2010-11-17 05:41:32 +00:00
Daniel Dunbar
fe0c28f4db MC: Simplify Mach-O and ELF object writer implementations. 
- What was I thinking?????

llvm-svn: 118992
 2010-11-13 07:33:40 +00:00
Jim Grosbach
20b6fd7d5d Start of support for binary emit of 16-it Thumb instructions. 
llvm-svn: 118859
 2010-11-11 23:41:09 +00:00
Jim Grosbach
9d6d77a9f4 Encoding of destination fixup for ARM branch and conditional branch 
instructions.

llvm-svn: 118801
 2010-11-11 18:04:49 +00:00
Jim Grosbach
9b973490c9 ARM .word data fixups don't need an adjustment. 
llvm-svn: 118586
 2010-11-09 17:36:59 +00:00
Jim Grosbach
9098714f8b Add support for a few simple fixups to the ARM Darwin asm backend. This allows 
constant pool references and global variable refernces to resolve properly
for object file generation. For example,

int x;
void foo(unsigned a, unsigned *p) {
  p[a] = x;
}

can now be successfully compiled directly to an (ARM mode) object file.

llvm-svn: 118469
 2010-11-09 01:37:15 +00:00
Jim Grosbach
2bab7570f5 Enable MachO writing for ARM/Darwin. Lots of stuff still doesn't work 
(relocations, e.g.), but this will allow simple things to flow through.

llvm-svn: 118289
 2010-11-05 18:50:35 +00:00
Jim Grosbach
46c2acbcb4 Allow targets to specify the MachO CPUType/CPUSubtype information. 
llvm-svn: 118288
 2010-11-05 18:48:58 +00:00
Rafael Espindola
0ed1543d4e Add support for emitting ARM file attributes. 
llvm-svn: 117275
 2010-10-25 17:50:35 +00:00
Wesley Peck
1851090515 Making the e_machine configurable by the target backend in ELFObjectWriter. 
llvm-svn: 117099
 2010-10-22 15:52:49 +00:00
Rafael Espindola
4262a22225 Add a MCObjectFormat class so that code common to all targets that use a 
single object format can be shared.

This also adds support for

mov zed+(bar-foo), %eax

on ELF and COFF targets.

llvm-svn: 116675
 2010-10-16 18:23:53 +00:00
Jim Grosbach
7e872969ce Move getPointerSize() to the base class since it's not dependent on MachO 
vs. ELF

llvm-svn: 115180
 2010-09-30 17:45:51 +00:00
Jim Grosbach
5a5ddc402e Remove extraneous ';' 
llvm-svn: 115176
 2010-09-30 17:19:17 +00:00