3140 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
85393b28f9 [Hexagon] Add support for Hexagon V66
llvm-svn: 348415
2018-12-05 21:38:35 +00:00
Bruno Ricci
ac52954703 [Basic] Cleanups in IdentifierInfo following the removal of PTH
The Entry pointer in IdentifierInfo was only null for IdentifierInfo
created from a PTH. Now that PTH support has been removed we can remove
some PTH specific code in IdentifierInfo::getLength and
IdentifierInfo::getNameStart.

Also make the constructor of IdentifierInfo private to make sure that
they are only created by IdentifierTable, and move it to the header so
that it can be inlined in IdentifierTable::get and IdentifierTable::getOwn.

Differential Revision: https://reviews.llvm.org/D54866

Reviewed By: erichkeane

llvm-svn: 348384
2018-12-05 17:16:55 +00:00
Kristina Brooks
1051bb7463 [Haiku] Support __float128 for x86 and x86_64
This patch addresses a compilation error with clang when
running in Haiku being unable to compile code using
float128 (throws compilation error such as 'float128 is
not supported on this target').

Patch by kallisti5 (Alexander von Gluck IV)

Differential Revision: https://reviews.llvm.org/D54901

llvm-svn: 348368
2018-12-05 15:05:06 +00:00
Ulrich Weigand
88e0660bf2 [SystemZ] Do not support __float128
As of rev. 268898, clang supports __float128 on SystemZ.  This seems to
have been in error.  GCC has never supported __float128 on SystemZ,
since the "long double" type on the platform is already IEEE-128. (GCC
only supports __float128 on platforms where "long double" is some other
data type.)

For compatibility reasons this patch removes __float128 on SystemZ
again.  The test case is updated accordingly.

llvm-svn: 348247
2018-12-04 10:51:36 +00:00
Fangrui Song
2f55320741 [Basic] Move DiagnosticsEngine::dump from .h to .cpp
The two LLVM_DUMP_METHOD methods have a undefined reference on clang::DiagnosticsEngine::DiagStateMap::dump.

tools/clang/tools/extra/clangd/benchmarks/IndexBenchmark links in
clangDaemon but does not link in clangBasic explicitly, which causes a
linker error "undefined symbol" in !NDEBUG + -DBUILD_SHARED_LIBS=on builds.

Move LLVM_DUMP_METHOD methods to .cpp to fix IndexBenchmark. They should
be unconditionally defined as they are also used by non-dump-method #pragma clang __debug diag_mapping

llvm-svn: 348065
2018-12-01 01:43:05 +00:00
Kadir Cetinkaya
e9870c0c91 [clang] Fill RealPathName for virtual files.
Summary:
Absolute path information for virtual files were missing even if we
have already stat'd the files. This patch puts that information for virtual
files that can succesffully be stat'd.

Reviewers: ilya-biryukov

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D55054

llvm-svn: 348006
2018-11-30 17:10:11 +00:00
Kristina Brooks
77a4adc4f9 Add Hurd target to Clang driver (2/2)
This adds Hurd toolchain support to Clang's driver in addition
to handling translating the triple from Hurd-compatible form to
the actual triple registered in LLVM.

(Phabricator was stripping the empty files from the patch so I 
manually created them)

Patch by sthibaul (Samuel Thibault)

Differential Revision: https://reviews.llvm.org/D54379

llvm-svn: 347833
2018-11-29 03:49:14 +00:00
Tatyana Krasnukha
f8c264e02e [clang][ARC] Add ARCTargetInfo
Based-on-patch-by: Pete Couperus <petecoup@synopsys.com>

Differential Revision: https://reviews.llvm.org/D53100

llvm-svn: 347699
2018-11-27 19:52:10 +00:00
Craig Topper
5bb1bf6ff5 [X86] Add -march=cascadelake support in clang.
This is skylake-avx512 with the addition of avx512vnni ISA.

Patch by Jianping Chen

Differential Revision: https://reviews.llvm.org/D54792

llvm-svn: 347682
2018-11-27 18:05:14 +00:00
Sander de Smalen
44a2253a54 [AArch64] Add aarch64_vector_pcs function attribute to Clang
This is the Clang patch to complement the following LLVM patches:
  https://reviews.llvm.org/D51477
  https://reviews.llvm.org/D51479

More information describing the vector ABI and procedure call standard
can be found here:

https://developer.arm.com/products/software-development-tools/\
                          hpc/arm-compiler-for-hpc/vector-function-abi

Patch by Kerry McLaughlin.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D54425

llvm-svn: 347571
2018-11-26 16:38:37 +00:00
Sam McCall
e84385fef8 [FileManager] getFile(open=true) after getFile(open=false) should open the file.
Summary:
Old behavior is to just return the cached entry regardless of opened-ness.
That feels buggy (though I guess nobody ever actually needed this).

This came up in the context of clangd+clang-tidy integration: we're
going to getFile(open=false) to replay preprocessor actions obscured by
the preamble, but the compilation may subsequently getFile(open=true)
for non-preamble includes.

Reviewers: ilya-biryukov

Subscribers: ioeric, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D54691

llvm-svn: 347205
2018-11-19 13:37:46 +00:00
Aaron Ballman
c44c174246 Introduce the _Clang scoped attribute token.
Currently, we only accept clang as the scoped attribute identifier for double square bracket attributes provided by Clang, but this has the potential to conflict with user-defined macros. To help alleviate these concerns, this introduces the _Clang scoped attribute identifier as an alias for clang. It also introduces a warning with a fixit on the off chance someone attempts to use __clang__ as the scoped attribute (which is a predefined compiler identification macro).

llvm-svn: 346521
2018-11-09 17:19:45 +00:00
Patrick Lyster
7a2a27c4a4 Add support for 'atomic_default_mem_order' clause on 'requires' directive. Also renamed test files relating to 'requires'. Differntial review: https://reviews.llvm.org/D53513
llvm-svn: 345967
2018-11-02 12:18:11 +00:00
Reid Kleckner
4dc0b1ac60 Fix clang -Wimplicit-fallthrough warnings across llvm, NFC
This patch should not introduce any behavior changes. It consists of
mostly one of two changes:
1. Replacing fall through comments with the LLVM_FALLTHROUGH macro
2. Inserting 'break' before falling through into a case block consisting
   of only 'break'.

We were already using this warning with GCC, but its warning behaves
slightly differently. In this patch, the following differences are
relevant:
1. GCC recognizes comments that say "fall through" as annotations, clang
   doesn't
2. GCC doesn't warn on "case N: foo(); default: break;", clang does
3. GCC doesn't warn when the case contains a switch, but falls through
   the outer case.

I will enable the warning separately in a follow-up patch so that it can
be cleanly reverted if necessary.

Reviewers: alexfh, rsmith, lattner, rtrieu, EricWF, bollu

Differential Revision: https://reviews.llvm.org/D53950

llvm-svn: 345882
2018-11-01 19:54:45 +00:00
Reid Kleckner
14518f1d9b Add LLVM_FALLTHROUGH annotation after switch
This silences a -Wimplicit-fallthrough warning from clang. GCC does not
appear to warn when the case body ends in a switch.

This is a somewhat surprising but intended fallthrough that I pulled out
from my mechanical patch. The code intends to handle 'Yi' and related
constraints as the 'x' constraint.

llvm-svn: 345873
2018-11-01 18:53:02 +00:00
Li Jia He
bbaedf2ba1 [Clang][PowerPC] Support constraint 'wi' in asm
From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D53265

llvm-svn: 345809
2018-11-01 02:32:49 +00:00
Erik Pilkington
a7641d97a7 NFC: Merge KEYOBJC and KEYARC
We used to only define ARC keywords in -fobjc-arc mode, but now that we define
them in ObjC mode, there isn't any reason to keep them seperate.

llvm-svn: 345646
2018-10-30 20:51:28 +00:00
Erik Pilkington
fa98390b3c NFC: Remove the ObjC1/ObjC2 distinction from clang (and related projects)
We haven't supported compiling ObjC1 for a long time (and never will again), so
there isn't any reason to keep these separate. This patch replaces
LangOpts::ObjC1 and LangOpts::ObjC2 with LangOpts::ObjC.

Differential revision: https://reviews.llvm.org/D53547

llvm-svn: 345637
2018-10-30 20:31:30 +00:00
Bryan Chan
223307b3dc [AArch64] Implement FP16FML intrinsics
Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now).
Add two new type modifiers to NeonEmitter to handle the new prototypes.
Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the
intrinsics with the macro in arm_neon.h.

Based on a patch by Gao Yiling.

Differential Revision: https://reviews.llvm.org/D53633

llvm-svn: 345344
2018-10-25 23:47:00 +00:00
Erich Keane
19a8adc9bd Implement Function Multiversioning for Non-ELF Systems.
Similar to how ICC handles CPU-Dispatch on Windows, this patch uses the
resolver function directly to forward the call to the proper function.
This is not nearly as efficient as IFuncs of course, but is still quite
useful for large functions specifically developed for certain
processors.

This is unfortunately still limited to x86, since it depends on
__builtin_cpu_supports and __builtin_cpu_is, which are x86 builtins.

The naming for the resolver/forwarding function for cpu-dispatch was
taken from ICC's implementation, which uses the unmodified name for this
(no mangling additions).  This is possible, since cpu-dispatch uses '.A'
for the 'default' version.

In 'target' multiversioning, this function keeps the '.resolver'
extension in order to keep the default function keeping the default
mangling.

Change-Id: I4731555a39be26c7ad59a2d8fda6fa1a50f73284

Differential Revision: https://reviews.llvm.org/D53586

llvm-svn: 345298
2018-10-25 18:57:19 +00:00
Tim Renouf
632f35d495 Add gfx909 to GPU Arch
Subscribers: jholewinski, cfe-commits

Differential Revision: https://reviews.llvm.org/D53558

llvm-svn: 345198
2018-10-24 21:19:02 +00:00
Konstantin Zhuravlyov
06570954e2 AMDGPU: Handle gfx909 in AMDGPUTargetInfo::initFeatureMap
+ add required tests

llvm-svn: 345181
2018-10-24 19:07:56 +00:00
Aaron Ballman
ad672ffb64 Support accepting __gnu__ as a scoped attribute namespace that aliases to gnu.
This is useful in libstdc++ to avoid clashes with identifiers in the user's namespace.

llvm-svn: 345132
2018-10-24 12:26:23 +00:00
Yaxun Liu
83b5f35d85 Add gfx904 and gfx906 to GPU Arch
Differential Revision: https://reviews.llvm.org/D53472

llvm-svn: 344996
2018-10-23 02:05:31 +00:00
Craig Topper
9ad1e8a93b [X86] Remove 'rtm' feature from KNL.
I'm unsure if KNL has this feature, but the backend never thought it did, only clang did. The predefined-arch-macros test lost the check for __RTM__ on KNL when it was removed Skylake CPUs in r344117.

I think we want to drop it from KNL for consistency with Skylake anyway regardless of how we got here.

llvm-svn: 344978
2018-10-23 00:15:37 +00:00
Krzysztof Parzyszek
57e6706e56 [Hexagon] Remove support for V4
llvm-svn: 344786
2018-10-19 15:36:45 +00:00
Eli Friedman
39ceea326d [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.
"aarch64-none-elf" is commonly used for AArch64 baremetal toolchains.

Differential Revision: https://reviews.llvm.org/D53348

llvm-svn: 344710
2018-10-17 21:07:11 +00:00
Ulrich Weigand
2927071750 [SystemZ] Actually enable -mzvector keywords
It appears when initially committing the support for the IBM Z vector
extension language, one critical line was lost, causing the specific
keywords __vector, __bool, and vec_step to not actually be enabled.
(Note that this does not affect "vector" and "bool"!)

Unfortunately, this was not caught by any tests either.  (All existing
Z vector tests just use the regular "vector" and "bool" keywords ...)

Fixed by adding the missing line and updating the tests.

llvm-svn: 344611
2018-10-16 14:57:20 +00:00
Simon Atanasyan
db81c7b9c9 [mips] Fix handling of GNUABIN32 environment in a target triple
The `GNUABIN32` environment in a target triple implies using the N32
ABI. This patch adds support for this environment and switches on N32
ABI if necessary.

Patch by Patch by YunQiang Su.

Differential revision: https://reviews.llvm.org/D51464

llvm-svn: 344570
2018-10-15 22:43:23 +00:00
Patrick Lyster
3fe9e396f4 Add support for 'dynamic_allocators' clause on 'requires' directive. Differential Revision: https://reviews.llvm.org/D53079
llvm-svn: 344249
2018-10-11 14:41:10 +00:00
Jonas Devlieghere
fc51490baf Lift VFS from clang to llvm (NFC)
This patch moves the virtual file system form clang to llvm so it can be
used by more projects.

Concretely the patch:
 - Moves VirtualFileSystem.{h|cpp} from clang/Basic to llvm/Support.
 - Moves the corresponding unit test from clang to llvm.
 - Moves the vfs namespace from clang::vfs to llvm::vfs.
 - Formats the lines affected by this change, mostly this is the result of
   the added llvm namespace.

RFC on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2018-October/126657.html

Differential revision: https://reviews.llvm.org/D52783

llvm-svn: 344140
2018-10-10 13:27:25 +00:00
Craig Topper
153b53adfa [X86] Remove FeatureRTM from Skylake processor list
Summary:
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz

This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.

Matches https://reviews.llvm.org/D53041

Patch by Thiago Macieira

Reviewers: erichkeane, craig.topper

Reviewed By: craig.topper

Subscribers: lebedev.ri, cfe-commits

Differential Revision: https://reviews.llvm.org/D53042

llvm-svn: 344117
2018-10-10 07:43:45 +00:00
Ali Tamur
bc1cd929bf Introduce code_model macros
Summary:
gcc defines macros such as __code_model_small_ based on the user passed command line flag -mcmodel. clang accepts a flag with the same name and similar effects, but does not generate any macro that the user can use. This cl narrows the gap between gcc and clang behaviour.

However, achieving full compatibility with gcc is not trivial: The set of valid values for mcmodel in gcc and clang are not equal. Also, gcc defines different macros for different architectures. In this cl, we only tackle an easy part of the problem and define the macro only for x64 architecture. When the user does not specify a mcmodel, the macro for small code model is produced, as is the case with gcc.

Reviewers: compnerd, MaskRay

Reviewed By: MaskRay

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D52920

llvm-svn: 344000
2018-10-08 22:25:20 +00:00
Patrick Lyster
6bdf63bd32 [OPENMP] Add reverse_offload clause to requires directive
llvm-svn: 343711
2018-10-03 20:07:58 +00:00
Patrick Lyster
4a370b9f63 Add support for unified_shared_memory clause on requires directive
llvm-svn: 343472
2018-10-01 13:47:43 +00:00
Fangrui Song
1d38c13f6e Use the container form llvm::sort(C, ...)
There are a few leftovers of rC343147 that are not (\w+)\.begin but in
the form of ([-[:alnum:]>.]+)\.begin or spanning two lines. Change them
to use the container form in this commit. The 12 occurrences have been
inspected manually for safety.

llvm-svn: 343425
2018-09-30 21:41:11 +00:00
Craig Topper
6ad9220067 [X86] Add the movbe instruction intrinsics from icc.
These intrinsics exist in icc. They can be found on the Intel Intrinsics Guide website.

All the backend support is in place to pattern match a load+bswap or a bswap+store pattern to the MOVBE instructions. So we just need to get the frontend to emit the correct IR. The pointer arguments in icc are declared as void so I had to jump through a packed struct to forcing a specific alignment on the load/store. Same trick we use in the unaligned vector load/store intrinsics

Differential Revision: https://reviews.llvm.org/D52586

llvm-svn: 343343
2018-09-28 17:09:51 +00:00
Sam Parker
d476cd304b [ARM] Prevent DSP and SIM32 being set for v6m
My previous change (rL340911) set the two features for architectures
>= 6, which wrongly includes v6m. Now set to >= 6 and not Cortex-M.

Differential Revision: https://reviews.llvm.org/D52644

llvm-svn: 343309
2018-09-28 10:18:02 +00:00
Fangrui Song
55fab260ca llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.

Reviewers: rsmith, #clang, dblaikie

Reviewed By: rsmith, #clang

Subscribers: mgrang, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D52576

llvm-svn: 343147
2018-09-26 22:16:28 +00:00
Oliver Stannard
a30b48d020 [ARM/AArch64][v8.5A] Add Armv8.5-A target
This patch allows targetting Armv8.5-A from Clang. Most of the
implementation is in TargetParser, so this is mostly just adding tests.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52491

llvm-svn: 343111
2018-09-26 14:20:29 +00:00
Kelvin Li
1408f91a25 [OPENMP] Add support for OMP5 requires directive + unified_address clause
Add support for OMP5.0 requires directive and unified_address clause.
Patches to follow will include support for additional clauses.

Differential Revision: https://reviews.llvm.org/D52359

llvm-svn: 343063
2018-09-26 04:28:39 +00:00
Artem Belevich
44ecb0e3c2 [CUDA] Added basic support for compiling with CUDA-10.0
llvm-svn: 342924
2018-09-24 23:10:44 +00:00
Eric Liu
495847ad77 [VFS] Use llvm::StringMap instead of std::map. NFC
llvm-svn: 342889
2018-09-24 14:52:11 +00:00
Bruno Ricci
366ba73018 [AST] Various optimizations + refactoring in DeclarationName(Table)
Introduce the following optimizations in DeclarationName(Table):

 1. Store common kinds inline in DeclarationName instead of
    DeclarationNameExtra. Currently the kind of C++ constructor, destructor,
    conversion function and overloaded operator names is stored in
    DeclarationNameExtra. Instead store it inline in DeclarationName.
    To do this align IdentifierInfo, CXXSpecialName, DeclarationNameExtra
    and CXXOperatorIdName to 8 bytes so that we can use the lower 3 bits of
    DeclarationName::Ptr. This is already the case on 64 bits archs anyway.
    This also allow us to remove DeclarationNameExtra from CXXSpecialName
    and CXXOperatorIdName, which shave off a pointer from CXXSpecialName. 

 2. Synchronize the enumerations DeclarationName::NameKind,
    DeclarationName::StoredNameKind and Selector::IdentifierInfoFlag.
    This makes DeclarationName::getNameKind much more efficient since we can
    replace the switch table by a single comparison and an addition.

 3. Put the overloaded operator names inline in DeclarationNameTable to remove
    an indirection. This increase the size of DeclarationNameTable a little
    bit but this is not important since it is only used in ASTContext, and
    never copied nor moved from. This also get rid of the last dynamic
    allocation in DeclarationNameTable.

Altogether these optimizations cut the run time of parsing all of Boost by
about 0.8%. While we are at it, do the following NFC modifications:

 1. Put the internal classes CXXSpecialName, CXXDeductionGuideNameExtra,
    CXXOperatorIdName, CXXLiteralOperatorIdName and DeclarationNameExtra
    in a namespace detail since these classes are only meant to be used by
    DeclarationName and DeclarationNameTable. Make this more explicit by making
    the members of these classes private and friending DeclarationName(Table).

 2. Make DeclarationName::getFETokenInfo a non-template since every users are
    using it to get a void *. It was supposed to be used with a type to avoid
    a subsequent static_cast.

 3. Change the internal functions DeclarationName::getAs* to castAs* since when
    we use them we already know the correct kind. This has no external impact
    since all of these are private.

Reviewed By: erichkeane, rjmccall

Differential Revision: https://reviews.llvm.org/D52267

llvm-svn: 342729
2018-09-21 12:53:22 +00:00
Saleem Abdulrasool
6183c6316d Basic: correct __WINT_TYPE__ on Windows
Windows uses `unsigned short` for `wint_t`.  Correct the type definition as
vended by the compiler.  This type is defined in corecrt.h and is
unconditionally typedef'ed.  cl does not have an equivalent to `__WINT_TYPE__`
which is why this was never detected.

llvm-svn: 342557
2018-09-19 16:18:55 +00:00
Bruno Cardoso Lopes
e7240f024f [Modules] Add platform and environment features to requires clause
Allows module map writers to add build requirements based on
platform/os. This helps when target features and language dialects
aren't enough to conditionalize building a module, among other things,
it allow module maps for different platforms to live in the same file.

rdar://problem/43909745

Differential Revision: https://reviews.llvm.org/D51910

llvm-svn: 342499
2018-09-18 17:11:13 +00:00
Sam McCall
0ae00567ba [VFS] vfs::directory_iterator yields path and file type instead of full Status
Summary:
Most callers I can find are using only `getName()`. Type is used by the
recursive iterator.

Now we don't have to call stat() on every listed file (on most platforms).
Exceptions are e.g. Solaris where readdir() doesn't include type information.
On those platforms we'll still stat() - see D51918.

The result is significantly faster (stat() can be slow).
My motivation: this may allow us to improve clang IO on large TUs with long
include search paths. Caching readdir() results may allow us to skip many stat()
and open() operations on nonexistent files.

Reviewers: bkramer

Subscribers: fedor.sergeev, cfe-commits

Differential Revision: https://reviews.llvm.org/D51921

llvm-svn: 342232
2018-09-14 12:47:38 +00:00
Richard Smith
841dbda3ba When we leave a module header, make that header visible in its
includer's context, even if its overall module is unavailable.

llvm-svn: 342096
2018-09-12 23:09:23 +00:00
Erich Keane
7582222691 Move AESNI generation to Skylake and Goldmont
The instruction set first appeared with Westmere, but not all processors
in that and the next few generations have the instructions. According to
Wikipedia[1], the first generation in which all SKUs have AES
instructions are Skylake and Goldmont. I can't find any Skylake,
Kabylake, Kabylake-R or Cannon Lake currently listed at
https://ark.intel.com that says "Intel® AES New Instructions" "No".

This matches GCC commit
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html

[1] https://en.wikipedia.org/wiki/AES_instruction_set

Patch By: thiagomacieira
Differential Revision: https://reviews.llvm.org/D51510

llvm-svn: 341862
2018-09-10 21:12:21 +00:00
Eric Liu
cea78e3a19 [VFS] Cache the current working directory for the real FS.
Reviewers: sammccall

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51641

llvm-svn: 341455
2018-09-05 09:45:27 +00:00