191 Commits

Author SHA1 Message Date
Zahira Ammarguellat
85d049a089 Implement support for option 'fexcess-precision'.
Differential revision: https://reviews.llvm.org/D136176
2023-01-05 09:35:28 -05:00
Freddy Ye
9816c1912d [X86] Rename CMPCCXADD intrinsics.
"__cmpccxadd_epi*" -> "_cmpccxadd_epi*"
This is to align with other intrinsics to follow single leading "_" style. Gcc
and intrinsic guide website will also apply this change.

Reviewed By: LuoYuanke, skan

Differential Revision: https://reviews.llvm.org/D140281
2022-12-28 16:45:50 +08:00
Freddy Ye
68a888012b [X86] Add reduce_*_ep[i|u]8/16 series intrinsics.
Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D140531
2022-12-23 14:54:53 +08:00
Fangrui Song
69243cdb92 Remove incorrectly implemented -mibt-seal
The option from D116070 does not work as intended and will not be needed when
hidden visibility is used. A function needs ENDBR if it may be reached
indirectly. If we make ThinLTO combine the address-taken property (close to
`!GV.use_empty() && !GV.hasAtLeastLocalUnnamedAddr()`), then the condition can
be expressed with:

`AddressTaken || (!F.hasLocalLinkage() && (VisibleToRegularObj || !F.hasHiddenVisibility()))`

The current `F.hasAddressTaken()` condition does not take into acount of
address-significance in another bitcode file or ELF relocatable file.

For the Linux kernel, it uses relocatable linking. lld/ELF uses a
conservative approach by setting all `VisibleToRegularObj` to true.
Using the non-relocatable semantics may under-estimate
`VisibleToRegularObj`. As @pcc mentioned on
https://github.com/ClangBuiltLinux/linux/issues/1737#issuecomment-1343414686
, we probably need a symbol list to supply additional
`VisibleToRegularObj` symbols (not part of the relocatable LTO link).

Reviewed By: samitolvanen

Differential Revision: https://reviews.llvm.org/D140363
2022-12-22 12:32:59 -08:00
Sprite
a9f9f3dff4 Correct typos (NFC)
Just found some typos while reading the llvm/circt project.

compliment -> complement
emitsd -> emits
2022-12-16 10:51:26 -08:00
Nikita Popov
9466b49171 [Clang] Convert various tests to opaque pointers (NFC)
These were all tests where no manual fixup was required.
2022-12-12 17:11:46 +01:00
John McIver
ee13633c46 [NFC][clang] Strengthen checks in avx512fp16-builtins.c
* Add end-of-line check to load instructions
2022-12-04 14:57:43 +00:00
John McIver
2389488437 [NFC][clang] Strengthen checks in avx512f-builtins.c
* Add check to unnamed portion of nontemporal attribute
* Add end-of-line check to load instructions
2022-12-04 14:55:41 +00:00
Xiang1 Zhang
94c5df8a76 [AMX] Support AMX-FP16 new intrinsic interface
We support AMX-FP16 isa in https://reviews.llvm.org/D135941 now.
The old  intrinsic interface need to manually write tile registers.
So we support its new intrinsic interface to let it be able to do register allocation.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D138987
2022-12-01 09:47:53 +08:00
Alex Richardson
54ad4d2dd1 Drop redundant pipe to opt -instnamer in clang tests
This used to be required, but the difference between asserts/!asserts
builds no longer exists for %clang_cc1 (only for %clang), so they pass
just fine without this flag.
2022-11-25 11:34:55 +00:00
Craig Topper
c9320bc871 [X86] Use correctly sized floating point literals in *zero_ps/pd.
This avoids depending on int->float or double->float conversion.
Improving codegen with #pragma STDC FENV_ACCESS ON.

Really we should improve constant folding somewhere, but this was
a cheap and easy improvement.

Fixes PR59052.
2022-11-17 14:28:52 -08:00
Bjorn Pettersson
5f9a82683d [clang][test] Use opt -passes=<name> instead of opt -name
Updated the RUN line in several test cases to use the new PM syntax
  opt -passes=<pipeline>
instead of the deprecated syntax
  opt -pass1 -pass2

This was not a complete cleanup in clang/test. But just a swipe using
some simple search-and-replace. Mainly for RUN lines involving
-mem2reg, -instnamer and -early-cse.
2022-11-08 12:15:42 +01:00
Fangrui Song
e604f88304 [X86][test] Change some CodeGen tests to use %clang_cc1 2022-11-03 22:54:44 -07:00
Fangrui Song
3cbf90468a [X86][test] Add -fcf-protection test for pre-pentiumpro
For #58737
2022-11-03 22:21:44 -07:00
Craig Topper
06f640d3fb [X86] Enable EVEX GFNI instructions without avx512bw.
We only really need avx512bw for masking 256 or 512 bit GFNI
instructions due to the need for v32i1 or v64i1.

I wanted to enable 128-bit intrinsics with avx512vl, but the
__builtin_ia32_selectb_128 used in the header file requires avx512bw.
The codegen test for the same is also not using a masked instruction
because vselect with v16i1 mask and v16i8 is not legal so is expanded
before isel. To fix these issues we need a mask specific builtin and a
mask specific ISD opcode.

Fixes PR58687.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D137036
2022-10-31 10:31:45 -07:00
Freddy Ye
aee2a35ac4 [X86] Add AVX-NE-CONVERT instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D135930
2022-10-31 23:39:38 +08:00
Phoebe Wang
b51b90d6e2 [X86][1/2] SUPPORT RAO-INT
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Initial authored by Liu Chen (@LiuChen3)

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D135951
2022-10-27 17:20:07 +08:00
Freddy Ye
fdac4c4e92 [X86] Add CMPCCXADD instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D135933
2022-10-25 14:33:39 +08:00
Xiang1 Zhang
661881d436 [X86] Add AMX-FP16 instructions.
Differential Revision: https://reviews.llvm.org/D135941
2022-10-22 08:05:22 +08:00
Phoebe Wang
62ca79102c [X86][1/2] Support PREFETCHI instructions
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D136040
2022-10-20 08:46:01 +08:00
Phoebe Wang
bc1819389f [X86][RFC] Using __bf16 for AVX512_BF16 intrinsics
This is an alternative of D120395 and D120411.

Previously we use `__bfloat16` as a typedef of `unsigned short`. The
name may give user an impression it is a brand new type to represent
BF16. So that they may use it in arithmetic operations and we don't have
a good way to block it.

To solve the problem, we introduced `__bf16` to X86 psABI and landed the
support in Clang by D130964. Now we can solve the problem by switching
intrinsics to the new type.

Reviewed By: LuoYuanke, RKSimon

Differential Revision: https://reviews.llvm.org/D132329
2022-10-19 23:47:04 +08:00
Nikita Popov
39db5e1ed8 [CodeGen] Convert tests to opaque pointers (NFC)
Conversion performed using the script at:
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34

These are only tests where no manual fixup was required.
2022-10-07 14:22:00 +02:00
Sanjay Patel
cdf3de45d2 [CodeGen] fix misnamed "not" operation; NFC
Seeing the wrong instruction for this name in IR is confusing.
Most of the tests are not even checking a subsequent use of
the value, so I just deleted the over-specified CHECKs.
2022-08-31 15:11:48 -04:00
Phoebe Wang
a845d8fc57 [X86][BF16] Add type mangling for Windows
Reviewed By: FreddyYe

Differential Revision: https://reviews.llvm.org/D132742
2022-08-29 16:12:26 +08:00
Zahira Ammarguellat
5def954a5b Support of expression granularity for _Float16.
Differential Revision: https://reviews.llvm.org/D113107
2022-08-25 08:26:53 -04:00
Bing1 Yu
6d8ddf53cc [X86] Emulate _rdrand64_step with two rdrand32 if it is 32bit
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D132141
2022-08-24 10:22:46 +08:00
Bing1 Yu
0d8f9520c5 Revert "[X86] Emulate _rdrand64_step with two rdrand32 if it is 32bit"
This reverts commit 07e34763b02728857e1d6e8ccd2b82820eb3c0cc.
2022-08-24 09:38:46 +08:00
Bing1 Yu
07e34763b0 [X86] Emulate _rdrand64_step with two rdrand32 if it is 32bit
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D132141
2022-08-24 09:28:55 +08:00
Freddy Ye
e4888a37d3 [X86][BF16] Enable __bf16 for x86 targets.
X86 psABI has updated to support __bf16 type, the ABI of which is the
same as FP16. See https://discourse.llvm.org/t/patch-add-optional-bfloat16-support/63149

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D130964
2022-08-10 09:00:47 +08:00
Phoebe Wang
6f867f9102 [X86] Support `-mindirect-branch-cs-prefix` for call and jmp to indirect thunk
This is to address feature request from https://github.com/ClangBuiltLinux/linux/issues/1665

Reviewed By: nickdesaulniers, MaskRay

Differential Revision: https://reviews.llvm.org/D130754
2022-08-04 15:12:15 +08:00
Nicolai Hähnle
1ddc51d89d Inliner: don't mark call sites as 'nounwind' if that would be redundant
When F calls G calls H, G is nounwind, and G is inlined into F, then the
inlined call-site to H should be effectively nounwind so as not to lose
information during inlining.

If H itself is nounwind (which often happens when H is an intrinsic), we
no longer mark the callsite explicitly as nounwind. Previously, there
were cases where the inlined call-site of H differs from a pre-existing
call-site of H in F *only* in the explicitly added nounwind attribute,
thus preventing common subexpression elimination.

v2:
- just check CI->doesNotThrow

v3 (resubmit after revert at 344378808778c61d5599f4e0ac783ef7e6f8ed05):
- update Clang tests

Differential Revision: https://reviews.llvm.org/D129860
2022-07-20 14:17:23 +02:00
Fangrui Song
23ba688f02 [X86] Use Min behavior for cf-protection-{return,branch}/ibt-seal module flags
These features require that all object files are compiled with the support. When
the feature is disabled for an object file, the merge behavior should treat the
file having a value of 0 (see D129911).

Reviewed By: xiangzhangllvm

Differential Revision: https://reviews.llvm.org/D130065
2022-07-19 21:20:02 -07:00
Xiang1 Zhang
4bb19de4b6 [X86] Add 64 bit implement for __SSC_MARK
Reviewed By: craig.topper, pengfei.wang, jinsong
Differential Revision: https://reviews.llvm.org/D129826
2022-07-19 16:13:41 +08:00
Phoebe Wang
abeeae570e [X86] Support _Float16 on SSE2 and up
This is split from D113107 to address #56204 and https://discourse.llvm.org/t/how-to-build-compiler-rt-for-new-x86-half-float-abi/63366

Reviewed By: zahiraam, rjmccall, bkramer, MaskRay

Differential Revision: https://reviews.llvm.org/D128571
2022-06-30 17:21:37 +08:00
Ben Langmuir
eab2a06f0f Revert "Reland "[X86] Support _Float16 on SSE2 and up""
Broke compiler-rt on Darwin: https://green.lab.llvm.org/green/job/clang-stage1-RA/29920/

This reverts commit 527ef8ca981e88a35758c0e4143be6853ea26dfc.
2022-06-28 10:59:03 -07:00
Phoebe Wang
527ef8ca98 Reland "[X86] Support _Float16 on SSE2 and up"
Enable `COMPILER_RT_HAS_FLOAT16` to solve the lit fail.

This is split from D113107 to address #56204 and https://discourse.llvm.org/t/how-to-build-compiler-rt-for-new-x86-half-float-abi/63366

Reviewed By: zahiraam, rjmccall, bkramer

Differential Revision: https://reviews.llvm.org/D128571
2022-06-28 14:38:56 +08:00
Vitaly Buka
8f7cca90af Revert "[X86] Support _Float16 on SSE2 and up"
Breaks buildbot
https://lab.llvm.org/buildbot/#/builders/37/builds/14334

This reverts commit f5d781d6273cc56dd8b44ee9e4cfb2ae5579bb04.
2022-06-27 12:43:29 -07:00
Phoebe Wang
f5d781d627 [X86] Support _Float16 on SSE2 and up
This is split from D113107 to address #56204 and https://discourse.llvm.org/t/how-to-build-compiler-rt-for-new-x86-half-float-abi/63366

Reviewed By: zahiraam, rjmccall, bkramer

Differential Revision: https://reviews.llvm.org/D128571
2022-06-27 21:37:30 +08:00
Paul Robinson
dc5175adef [PS5] Make passing unions in registers match PS4 ABI 2022-06-02 11:00:54 -07:00
Paul Robinson
cc756f91c3 [PS5] Classify __m64 as integer, matching PS4 ABI 2022-06-02 11:00:53 -07:00
Simon Pilgrim
2cd080c884 [X86] rdrand-builtins.c - add 32-bit target coverage and enable -Wall/-Werror 2022-05-07 14:35:42 +01:00
Simon Pilgrim
6e345426de [X86] Remove unused 'hint' argument from prefetch tests
hint is a compile time constant and can't be passed in as a variable - we already hardcode
2022-05-07 13:38:40 +01:00
Simon Pilgrim
102824f048 [clang][X86] Rename some intrinsics tests to use the *-builtins.c naming convention 2022-05-06 14:49:46 +01:00
Phoebe Wang
b540ee5402 [X86] Fix redundant %s in RUN command. NFC 2022-05-04 20:29:50 +08:00
Joao Moreira
db1cec371c [X86] Fix CodeGen Module Flag for -mibt-seal
When assertions are enabled, clang will perform RoundTrip for CompilerInvocation argument generation. ibt-seal flags are currently missing in this argument generation, and because of that, the feature doesn't get enabled for these cases. Performing RoundTrip is the default for assert builds, rendering the feature broken in these scenarios.

This patch fixes this and adds a test to properly verify that modules are  being generated with the flag when -mibt-seal is used.

Please, add any known relevant reviewer which I may have missed.

[1] - https://reviews.llvm.org/D116070

Reviewed By: pengfei, gftg, aaron.ballman, nickdesaulniers

Differential Revision: https://reviews.llvm.org/D118052
2022-04-29 15:37:28 +08:00
Xiang1 Zhang
afa536e33e [x86] Support 3 builtin functions for 32-bits mode
_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64

Reviewed By:RKSimon, Topper Craig
Differential Revision: https://reviews.llvm.org/D124067
2022-04-22 11:28:28 +08:00
Xiang1 Zhang
caf5ad5da7 Revert "[x86] Support 3 builtin functions for 32-bits mode"
This reverts commit a69c219a8c9f7eaff142b6b4d135ac0456e0d4ae.
2022-04-22 09:11:40 +08:00
Xiang1 Zhang
a69c219a8c [x86] Support 3 builtin functions for 32-bits mode
_mm_cvtsi128_si64, _mm_cvtsi64_si128, _mm_extract_epi64
2022-04-22 09:06:25 +08:00
Aaron Ballman
7d644e1215 [C11/C2x] Change the behavior of the implicit function declaration warning
C89 had a questionable feature where the compiler would implicitly
declare a function that the user called but was never previously
declared. The resulting function would be globally declared as
extern int func(); -- a function without a prototype which accepts zero
or more arguments.

C99 removed support for this questionable feature due to severe
security concerns. However, there was no deprecation period; C89 had
the feature, C99 didn't. So Clang (and GCC) both supported the
functionality as an extension in C99 and later modes.

C2x no longer supports that function signature as it now requires all
functions to have a prototype, and given the known security issues with
the feature, continuing to support it as an extension is not tenable.

This patch changes the diagnostic behavior for the
-Wimplicit-function-declaration warning group depending on the language
mode in effect. We continue to warn by default in C89 mode (due to the
feature being dangerous to use). However, because this feature will not
be supported in C2x mode, we've diagnosed it as being invalid for so
long, the security concerns with the feature, and the trivial
workaround for users (declare the function), we now default the
extension warning to an error in C99-C17 mode. This still gives users
an easy workaround if they are extensively using the extension in those
modes (they can disable the warning or use -Wno-error to downgrade the
error), but the new diagnostic makes it more clear that this feature is
not supported and should be avoided. In C2x mode, we no longer allow an
implicit function to be defined and treat the situation the same as any
other lookup failure.

Differential Revision: https://reviews.llvm.org/D122983
2022-04-20 11:30:12 -04:00
Simon Pilgrim
1226d276b4 [X86][AVX512] Rename avx512popcntdq intrinsics tests files to match *-builtins.c naming convention 2022-04-20 15:12:12 +01:00