10 Commits

Author SHA1 Message Date
Craig Topper
1b969c6b60 Recommit "[M68k] Regenerate divide-by-constant.ll. NFC"
Division algorithm was improved in D140750.

Fixes #59802.
2023-01-03 12:24:14 -08:00
Craig Topper
7f9ddd69d8 Revert "[M68k] Regenerate divide-by-constant.ll. NFC"
This reverts commit 0277f849c36ab6fe122b4fa1ae739e82869b5613.

I pasted the wrong bug number.
2023-01-03 12:23:53 -08:00
Craig Topper
0277f849c3 [M68k] Regenerate divide-by-constant.ll. NFC
Division algorithm was improved by D140750.

Fixes #59791.
2023-01-03 12:23:26 -08:00
Min-Yih Hsu
718a9793b4 [M68k][NFC] Use OS and ABI agnostic triple in codegen tests
Use 'm68k' (i.e. m68k-unknown-unknown) in all codegen tests rather
than m68k-linux-gnu. NFC.
2022-10-23 15:26:13 -07:00
Douglas Chen
78b16ccf2b [M68k] Instruction selection to choose neg x when mul x -1 (Fix issue 48588)
This patch is trying to fix issue 48588(https://github.com/llvm/llvm-project/issues/48588)

I found the results of Instruction Selection between SelectionDAG and FastISEL for the `%mul = mul i32 %A, 4294967295`:
(seldag-isel) mul --> sub --> SUB32dp
(fast-isel)   mul --> sub --> NEG32d

My patch to fix this issue is by overriding a virtual function M68kDAGToDAGISel::IsProfitableToFold(). Return `false` when it was trying to match with SUB, then it will match with NEG.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D116886
2022-06-03 13:20:30 +08:00
Annika
43a1756a5d m68k: Support bit shifts on 64-bit integers
As per https://bugs.llvm.org/show_bug.cgi?id=52119.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D111497
2022-02-12 06:11:49 +08:00
Min-Yih Hsu
657bb7262d [M68k] Separate ADDA from ADD and migrate rest of the arithmetic MC tests
Previously ADD & ADDA (as well as SUB & SUBA) instructions are mixed
together, which not only violated Motorola assembly's syntax but also
made asm parsing more difficult. This patch separates these two kinds of
instructions migrate rest of the tests from
test/CodeGen/M68k/Encoding/Arithmetic to test/MC/M68k/Arithmetic.

Note that we observed minor regressions on codegen quality: Sometimes
isel uses ADD instead of ADDA even the latter can lead to shorter
sequence of code. This issue implies that some isel patterns might need
to be updated.
2021-08-07 17:19:12 -07:00
Jim Lin
5cb5225cf5 [M68k] Refactor codegen patterns for logic operations and add tests for it
Refactor pat for and, or and xor operation and add missing tests for it

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D104626
2021-06-23 13:25:24 +08:00
Simon Pilgrim
9d2df96407 [DAG] computeKnownBits - add ISD::MULHS/MULHU/SMUL_LOHI/UMUL_LOHI handling
Reuse the existing KnownBits multiplication code to handle the 'extend + multiply + extract high bits' pattern for multiply-high ops.

Noticed while looking at the codegen for D88785 / D98587 - the patch helps division-by-constant expansion code in particular, which suggests that we might have some further KnownBits div/rem cases we could handle - but this was far easier to implement.

Differential Revision: https://reviews.llvm.org/D98857
2021-03-19 16:02:31 +00:00
Min-Yih Hsu
c23a780c30 [M68k][test](6/8) Add all of the tests
And a small utilities -- extract-section.py -- that helps extracting
specific object file section and printing in textual format. This
utility is just a workaround for tests inside `Encoding`. Hopefully in
the future we can replace dependencies in those tests with existing tools
(e.g. llvm-readobj). Please refer to this bug for more context:
https://bugs.llvm.org/show_bug.cgi?id=49245

Note that since we don't have AsmParser for now, we are testing the MC
part using MIR as input and put those tests under the `Encoding` folder.
In the future when AsmParser (and disassembler) is finished, those tests
will be moved to `test/MC/M68k`.

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88392
2021-03-08 12:30:57 -08:00