10 Commits

Author SHA1 Message Date
Roman Lebedev
96d3c82645
Revert "[SROA] isVectorPromotionViable(): memory intrinsics operate on vectors of bytes (take 3)"
While the PPC litte-endian miscompile did get addressed
by https://reviews.llvm.org/D140046
the PPV big-endian bots are still unhappy.
https://lab.llvm.org/buildbot/#/builders/93/builds/12560

This reverts commit 7bd358bcb4e358b4351c69e02ef76939e08acdc7.
2022-12-16 22:58:41 +03:00
Roman Lebedev
cfd594f8bb
[SROA] isVectorPromotionViable(): memory intrinsics operate on vectors of bytes (take 3)
* This is a recommit of 3c4d2a03968ccf5889bacffe02d6fa2443b0260f,
* which was reverted in 25f01d593ce296078f57e872778b77d074ae5888,
  because it exposed a miscompile in PPC backend,  which was resolved
  in https://reviews.llvm.org/D140089 / cb3f415cd2019df7d14683842198bc4b7a492bc5.
* which was a recommit of cf624b23bc5d5a6161706d1663def49380ff816a,
* which was reverted in 5cfc22cafe3f2465e0bb324f8daba82ffcabd0df,
  because the cut-off on the number of vector elements was not low enough,
  and it triggered both SDAG SDNode operand number assertions,
  5and caused compile time explosions in some cases.

Let's try with something really *REALLY* conservative first,
just to get somewhere, and try to bump it later.

FIXME: should this respect TTI reg width * num vec regs?

Original commit message:

Now, there's a big caveat here - these bytes
are abstract bytes, not the i8 we have in LLVM,
so strictly speaking this is not exactly legal,
see e.g. https://github.com/AliveToolkit/alive2/issues/860
^ the "bytes" "could" have been a pointer,
and loading it as an integer inserts an implicit ptrtoint.

But at the same time,
InstCombine's `InstCombinerImpl::SimplifyAnyMemTransfer()`
would expand a memtransfer of 1/2/4/8 bytes
into integer-typed load+store,
so this isn't exactly a new problem.

Note that in memory, poison is byte-wise,
so we really can't widen elements,
but SROA seems to be inconsistent here.

Fixes #59116.
2022-12-16 19:27:38 +03:00
Roman Lebedev
fedcdd21a2
Revert "[NFC][DebugInfo] Autogenerate check lines in assignment-tracking/sroa/*"
As per post-commit feedback, DebugInfo owners are not receptive of the
idea of having a single source of truth instead of relying on everyone
to know how to update these tests manually.

This reverts commit 4ff8d1e315bdd26daae8a6928aa46e347fe0d6eb.
This reverts commit a33b40d61c64b95d736f1a0dd537e9087c330304.
2022-12-15 23:23:35 +03:00
Roman Lebedev
4ff8d1e315
[NFC][DebugInfo] assignment-tracking/sroa: do check !DIAssignID, and the metadata
Based on post-commit feedback for the original change.
2022-12-15 21:21:03 +03:00
Roman Lebedev
a33b40d61c
[NFC][DebugInfo] Autogenerate check lines in assignment-tracking/sroa/*
Manual checklines are generally not welcomed in LLVM tests.
They are really brittle, and really hard to update.
*Please* use scripts!
2022-12-15 18:45:02 +03:00
OCHyams
f354716b05 Reapply [Assignment Tracking][13/*] Account for assignment tracking in SROA
The Assignment Tracking debug-info feature is outlined in this RFC:

https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir

Split dbg.assign intrinsics into fragments similarly to what SROA already does
for dbg.declares, except that there's many more intrinsics to split. The
function migrateDebugInfo generates new dbg.assigns intrinsic for each part of
a split store.

Reviewed By: jmorse

Differential Revision: https://reviews.llvm.org/D133296
2022-12-13 12:52:45 +00:00
Krasimir Georgiev
5e6351d927 Revert "[Assignment Tracking][13/*] Account for assignment tracking in SROA"
This reverts commit 3bfba672afd52dfd5bde54dc8b67ec96275f9e15.

Temporary revert since this potentially causes
https://github.com/llvm/llvm-project/issues/59490.
2022-12-13 09:54:26 +00:00
OCHyams
3bfba672af [Assignment Tracking][13/*] Account for assignment tracking in SROA
The Assignment Tracking debug-info feature is outlined in this RFC:

https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir

Split dbg.assign intrinsics into fragments similarly to what SROA already does
for dbg.declares, except that there's many more intrinsics to split. The
function migrateDebugInfo generates new dbg.assigns intrinsic for each part of
a split store.

Reviewed By: jmorse

Differential Revision: https://reviews.llvm.org/D133296
2022-12-12 09:24:06 +00:00
OCHyams
9517806064 Revert "[Assignment Tracking][13/*] Account for assignment tracking in SROA"
This reverts commit e16d59973ffec77eeef73409570bdf04a69c2405.

Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/236/builds/1205
2022-11-28 16:07:34 +00:00
OCHyams
e16d59973f [Assignment Tracking][13/*] Account for assignment tracking in SROA
The Assignment Tracking debug-info feature is outlined in this RFC:

https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir

Split dbg.assign intrinsics into fragments similarly to what SROA already does
for dbg.declares, except that there's many more intrinsics to split. The
function migrateDebugInfo generates new dbg.assigns intrinsic for each part of
a split store.

Reviewed By: jmorse

Differential Revision: https://reviews.llvm.org/D133296
2022-11-28 11:31:59 +00:00