2 Commits

Author	SHA1	Message	Date
Luo, Yuanke	6ade6d2511	[Verifier] Relieve intrinsics parameter alignment size constrain ... In D121898 we restrict parameter alignment size in IR since DAGISel only have 4 bits to hold the alignment value. However intrinsics won't be lowered to call instruction, so we can remove the constrain for intrinsics. Differential Revision: https://reviews.llvm.org/D136330	2022-10-21 17:01:20 +08:00
Luo, Yuanke	321cbf75be	[Verifier] Verify parameter alignment. ... In DAGISel, the parameter alignment only have 4 bits to hold the value. The encode(alignment) would plus the shift value by 1, so the max aligment ISel can support is 2^14. This patch verify the parameter and return value for alignment. Differential Revision: https://reviews.llvm.org/D121898	2022-03-27 08:35:05 +08:00