3962 Commits

Author SHA1 Message Date
Fangrui Song
361a8226f9 [ELF][test] Add -NEXT and -NOT after D150644 (–-print-memory-usage) 2023-05-25 13:05:43 -07:00
Fangrui Song
8aea109504 [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
The x86-64 medium code model utilizes large data sections, namely .lrodata,
.lbss, and .ldata (along with some variants of .ldata). There is a proposal to
extend the use of large data sections to the large code model as well[1].

This patch aims to place large data sections away from code sections in order to
alleviate relocation overflow pressure caused by code sections referencing
regular data sections.

```
.lrodata
.rodata
.text     # if --ro-segment, MAXPAGESIZE alignment
RELRO     # MAXPAGESIZE alignment
.data     # MAXPAGESIZE alignment
.bss
.ldata    # MAXPAGESIZE alignment
.lbss
```

In comparison to GNU ld, which places .lbss, .lrodata, and .ldata after .bss, we
place .lrodata above .rodata to minimize the number of permission transitions in
the memory image.

While GNU ld places .lbss after .bss, the subsequent sections don't reuse the
file offset bytes of BSS.

Our approach is to place .ldata and .lbss after .bss and create a PT_LOAD
segment for .bss to large data section transition in the absence of SECTIONS
commands. assignFileOffsets ensures we insert an alignment instead of allocating
space for BSS, and therefore we don't waste more than MAXPAGESIZE bytes. We have
a missing optimization to prevent all waste, but implementing it would introduce
complexity and likely be error-prone.

GNU ld's layout introduces 2 more MAXPAGESIZE alignments while ours
introduces just one.

[1]: https://groups.google.com/g/x86-64-abi/c/jnQdJeabxiU "Large data sections for the large code model"

With help from Arthur Eubanks.

Co-authored-by: James Y Knight <jyknight@google.com>

Reviewed By: aeubanks, tkoeppe

Differential Revision: https://reviews.llvm.org/D150510
2023-05-25 07:35:38 -07:00
Tobias Hieta
f98ee40f4b
[NFC][Py Reformat] Reformat python files in the rest of the dirs
This is an ongoing series of commits that are reformatting our
Python code. This catches the last of the python files to
reformat. Since they where so few I bunched them together.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: jhenderson, #libc, Mordante, sivachandra

Differential Revision: https://reviews.llvm.org/D150784
2023-05-25 11:17:05 +02:00
Petr Hosek
811cbfc262 [lld][ELF] Implement –print-memory-usage
This option was introduced in GNU ld in
https://sourceware.org/legacy-ml/binutils/2015-06/msg00086.html and is
often used in embedded development. This change implements this option
in LLD matching the GNU ld output verbatim.

Differential Revision: https://reviews.llvm.org/D150644
2023-05-25 07:14:18 +00:00
Leonard Chan
b9249a69cc [lld][ELF] Do not emit warning for NOLOAD output sections
Much of NOLOAD's intended use is to explicitly change the type of an
output section, so we shouldn't flag these as warnings.

Differential Revision: https://reviews.llvm.org/D151144
2023-05-23 20:41:20 +00:00
Peter Smith
ca39168a7c [LLD][ELF] change CHECK to CHECK-NEXT in overlay-phdr.test NFCI
A code-review comment to change a couple of CHECK to CHECK-NEXT that I
forgot to apply prior to committing.

Differential Revision: https://reviews.llvm.org/D150445
2023-05-15 19:08:16 +01:00
Peter Smith
e16af8a281 [LLD][ELF] Add missing program header parsing to OVERLAY
In D72756 the change to add INPUT_SECTION_FLAGS inadvertantly
removed the line to parse the program header assignment information for
OutputSections within an OVERLAY.

This change adds back the missing line and adds a test for it.

Differential Revision: https://reviews.llvm.org/D150445
2023-05-15 10:04:33 +01:00
Teresa Johnson
a40b0c3e77 [WPD] Update llvm.public.type.test after importing functions
I noticed that we are converting llvm.public.type.test to regular
llvm.type.test too early, and thus not updating those in imported
functions. This would result in losing out on WPD opportunities. Move
the update to after function importing, and improve test to cover this
case.

Differential Revision: https://reviews.llvm.org/D150326
2023-05-11 09:10:32 -07:00
Ulrich Weigand
95bb95ebe4 [LLD][ELF] Fix compressed-debug-level test on SystemZ
The libz compression library on SystemZ by default makes use of the
platform's hardware-accelerated compression facility. This is much
faster than the regular software implementation, but often results in
slightly different outputs. This causes failures with the
compressed-debug-level test case.

To fix this, set the DFLTCC environment variable to zero while running
tests on SystemZ, which prevents use of hardware compression and falls
back to the software implementation.

Reviewed by: MaskRay

Differential Revision: https://reviews.llvm.org/D149273
2023-05-05 13:57:59 +02:00
Andrew Ng
ed5dd8e5f0 [LLD][ELF] Fix --check-dynamic-relocations for 32-bit targets
OutputSection::checkDynRelAddends() incorrectly reports an internal
linker error for large addends on 32-bit targets. This is caused by the
lack of sign extension in DynamicReloc::computeAddend() for 32-bit
addends.

Differential Revision: https://reviews.llvm.org/D149347
2023-05-03 10:50:32 +01:00
Fangrui Song
1408504564 [ELF] Name MergeSyntheticSection using an input section instead of the output section
In a link map, the input section name gives more information. See the updated
merge-entsize.s for an example. The output file is unchanged.

Compiler generated input sections with the SHF_MERGE flag have names such as
.rodata.str1.1 and .rodata.cstN, and are not affected by -fdata-sections.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D149466
2023-05-02 09:35:00 -07:00
Ben Shi
95ceb42abb [ELF][test] Improve AVR tests
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D149318
2023-05-02 09:34:48 +08:00
Ulrich Weigand
84539a2463 Revert "[LLD][ELF] Fix compressed-debug-level test on SystemZ"
This reverts commit f2404d589ece81b029c607af011c372d52bff8d2,
which causes failures on Windows.
2023-04-28 12:19:17 +02:00
Ben Shi
229fcad7fc [lld][ELF] Support relocations R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS
Relocations R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS (indirect calls
via function pointers) only cover range 128KiB. They are
equivalent to R_AVR_LO8_LDI_PM/R_AVR_HI8_LDI_PM within this
range.

But for function addresses beyond this range, GNU-ld emits
trampolines. And this patch implements corresponding thunks
for them in lld.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D147364
2023-04-28 11:42:06 +08:00
Ulrich Weigand
f2404d589e [LLD][ELF] Fix compressed-debug-level test on SystemZ
The libz compression library on SystemZ by default makes use of the
platform's hardware-accelerated compression facility. This is much
faster than the regular software implementation, but often results in
slightly different outputs. This causes failures with the
compressed-debug-level test case.

To fix this, run this test while setting the DFLTCC environment
variable to zero, which prevents use of hardware compression and falls
back to the software implementation. (This should not have any effect
on other platforms.)

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D149273
2023-04-27 17:49:32 +02:00
Fangrui Song
39c20a63b1 [ELF] Add --remap-inputs= and --remap-inputs-file=
--remap-inputs-file= can be specified multiple times, each naming a
remap file that contains `from-glob=to-file` lines or `#`-led comments.
('=' is used a separator a la -fdebug-prefix-map=)
--remap-inputs-file= can be used to:

* replace an input file. E.g. `"*/libz.so=exp/libz.so"` can replace a resolved
  `-lz` without updating the input file list or (if used) a response file.
  When debugging an application where a bug is isolated to one single
  input file, this option gives a convenient way to test fixes.
* remove an input file with `/dev/null` (changed to `NUL` on Windows), e.g.
  `"a.o=/dev/null"`. A build system may add unneeded dependencies.
  This option gives a convenient way to test the result removing some inputs.

`--remap-inputs=a.o=aa.o` can be specified to provide one pattern without using
an extra file.
(bash/zsh process substitution is handy for specifying a pattern without using
a remap file, e.g. `--remap-inputs-file=<(printf 'a.o=aa.o')`, but it may be
unavailable in some systems. An extra file can be inconvenient for a build
system.)

Exact patterns are tested before wildcard patterns. In case of a tie, the first
patterns wins. This is an implementation detail that users should not rely on.

Co-authored-by: Marco Elver <elver@google.com>
Link: https://discourse.llvm.org/t/rfc-support-exclude-inputs/70070

Reviewed By: melver, peter.smith

Differential Revision: https://reviews.llvm.org/D148859
2023-04-26 13:18:55 -07:00
Peter Smith
d0cdc5ddd7 [LLD][ELF][AArch64] Add AArch64 short range thunk support
The AArch64 branch immediate instruction has a 128MiB range. This
makes it suitable for use a short range thunk in the same way as
short thunks are implemented in Arm and PPC. This patch adds
support for short range thunks to AArch64.

Adding short range thunk support should mean that OutputSections
can grow to nearly 256 MiB in size without needing long-range
indirect branches.

Differential Revision: https://reviews.llvm.org/D148701
2023-04-24 13:48:22 +01:00
Daniel Kiss
60827df765 [lld][AArch64] Add BTI landing pad to PLT when it is accessed by a range extension thunk.
Adding BTI to those PLT's which accessed with by a range extension thunk due to those preform an indirect call.
Fixes: #62140

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D148704
2023-04-23 23:17:02 +02:00
Fangrui Song
2a3fbb6bd8 [ELF][test] Test .glink code sequence and DT_PPC64_GLINK 2023-04-21 13:46:20 -07:00
Teresa Johnson
3adc6e0308 [ThinLTO] Remove BlockCount for non partial sample profile builds
As pointed out in
https://discourse.llvm.org/t/undeterministic-thin-index-file/69985, the
block count added to distributed ThinLTO index files breaks incremental
builds on ThinLTO - if any linked file has a different number of BBs,
then the accumulated sum placed in the index files will change, causing
all ThinLTO backend compiles to be redone.

The block count is only used for scaling of partial sample profiles, and
was added in D80403 for D79831.

This patch simply removes this field from the index files of non partial
sample profile compiles, which is NFC on the output of the compiler.

We subsequently need to see if this can be removed for partial sample
profiles without signficant performance loss, or redesigned in a way
that does not destroy caching.

Differential Revision: https://reviews.llvm.org/D148746
2023-04-20 11:45:15 -07:00
David Tenty
0236564771 [PowerPC][LLD] Update DataLayout in tests
Missed by the original commit of D147016 which updated the DataLayout for Power.

Differential Revision: https://reviews.llvm.org/D147016
2023-04-18 14:24:55 -04:00
Peter Smith
7a2000ac53 [LLD][ARM] Handle .ARM.exidx sections at non-zero output sec offset
Embedded systems that do not use an ELF loader locate the
.ARM.exidx exception table via linker defined __exidx_start and
__exidx_end rather than use the PT_ARM_EXIDX program header. This
means that some linker scripts such as the picolibc C library's
linker script, do not have the .ARM.exidx sections at offset 0 in
the OutputSection. For example:

.except_unordered : {
    . = ALIGN(8);
    PROVIDE(__exidx_start = .);
    *(.ARM.exidx*)
    PROVIDE(__exidx_end = .);
} >flash AT>flash :text

This is within the specification of Arm exception tables, and is
handled correctly by ld.bfd.

This patch has 2 parts. The first updates the writing of the data
of the .ARM.exidx SyntheticSection to account for a non-zero
OutputSection offset. The second part makes the PT_ARM_EXIDX program
header generation a special case so that it covers only the
SyntheticSection and not the parent OutputSection. While not strictly
necessary for programs locating the exception tables via the symbols
it may cause ELF utilities that locate the exception tables via
the PT_ARM_EXIDX program header to fail. This does not seem to be the
case for GNU and LLVM readelf which seems to look for the
SHT_ARM_EXIDX section.

Differential Revision: https://reviews.llvm.org/D148033
2023-04-14 10:09:46 +01:00
Craig Topper
85444794cd [lld][RISCV] Implement GP relaxation for R_RISCV_HI20/R_RISCV_LO12_I/R_RISCV_LO12_S.
This implements support for relaxing these relocations to use the GP
register to compute addresses of globals in the .sdata and .sbss
sections.

This feature is off by default and must be enabled by passing
--relax-gp to the linker.

The GP register might not always be the "global pointer". It can
be used for other purposes. See discussion here
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/371

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D143673
2023-04-13 10:52:15 -07:00
Ivan Tadeu Ferreira Antunes Filho
73fd9d310f [lld] Support separate native object file path in --thinlto-prefix-replace
Currently, the --thinlto-prefix-replace="oldpath;newpath" option is used during
distributed ThinLTO thin links to specify the mapping of the input bitcode object
files' directory tree (oldpath) to the directory tree (newpath) used for both:

1) the output files of the thin link itself (the .thinlto.bc index files and the
optional .imports files)
2) the specified object file paths written to the response file given in the
--thinlto-index-only=${response} option, which is used by the final native
link and must match the paths of the native object files that will be
produced by ThinLTO backend compiles.
This patch expands the --thinlto-prefix-replace option to allow a separate directory
tree mapping to be specified for the object file paths written to the response file
(number 2 above). This is important to support builds and build systems where the
same output directory may not be written by multiple build actions (e.g. the thin link
and the ThinLTO backend compiles).

The new format is: --thinlto-prefix-replace="origpath;outpath[;objpath]"

This replaces the origpath directory tree of the thin link input files with
outpath when writing the thin link index and imports outputs (number 1
above). If objpath is specified it replaces origpath of the input files with
objpath when writing the response file (number 2 above), otherwise it
falls back to the old behavior of using outpath for this as well.

Reviewed By: tejohnson, MaskRay

Differential Revision: https://reviews.llvm.org/D144596
2023-04-04 11:24:51 -07:00
Craig Topper
dc90af501f [RISCV] Bump I, F, D, and A extension versions to 20191214 spec version
New versions I2.1, F2.2, D2.2 A2.1

Make F and Zfinx imply Zicsr.
Make G imply Zifencei.

This should have no impact to generated code. We have no plans to require Zicsr/Zifencei extension to be explicitly enabled to use Zicsr/Zifencei instructions in assembly.

See https://reviews.llvm.org/D147183 for documentation regarding what version specification we implement.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D147179
2023-03-30 15:28:44 -07:00
Simi Pallipurath
2f68ddc604 [lld][ARM][2/3]Big Endian support - Word invariant support
Changes:
 - Adding BE32 big endian Support for Arm.
 - Replace the writele and readle with their endian-aware versions.
 - Adding test cases for the big-endian be32 arm configuration.

     Patch by: Milosz Plichta. This patch merges all the changes from
     this patch https://reviews.llvm.org/D140203 as well.

Reviewed By: peter.smith, MaskRay

Differential Revision: https://reviews.llvm.org/D140202
2023-03-29 10:21:00 +01:00
Ben Shi
504df554d2 [lld][ELF] Support relocations R_AVR_8_LO8/R_AVR_8_HI8/R_AVR_8_HLO8
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D147100
2023-03-29 10:33:47 +08:00
Fangrui Song
07d0a4fb53 [ELF][RISCV] Make .sdata and .sbss closer
GNU ld's internal linker scripts for RISC-V place .sdata and .sbss close.
This makes GP relaxation more profitable.

While here, when .sbss is present, set `__bss_start` to the start of
.sbss instead of .bss, to match GNU ld.

Note: GNU ld's internal linker scripts have symbol assignments and input
section descriptions which are not relevant for modern systems. We only
add things that make sense.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D145118
2023-03-07 10:37:04 -08:00
Justin Cady
447aa48b4a [ELF] Add REVERSE input section description keyword
The `REVERSE` keyword is described here:

https://sourceware.org/bugzilla/show_bug.cgi?id=27565

It complements `SORT` by allowing the order of input sections to be reversed.

This is particularly useful for order-dependent sections such as .init_array,
where `REVERSE` can be used to either detect static initialization order fiasco
issues or as a mechanism to maintain .ctors element order while transitioning to
the modern .init_array. Such a transition is described here:

https://discourse.llvm.org/t/is-it-possible-to-manually-specify-init-array-order/68649

Differential Revision: https://reviews.llvm.org/D145381
2023-03-07 12:44:02 -05:00
Fangrui Song
b30b1f173c [ELF] Add single quotes around out of range errors
to match the convention we use for other diagnostics.
2023-03-03 12:48:16 -08:00
Fangrui Song
ffa1118330 [ELF] Mention section name for STT_SECTION in reportRangeError()
D73518 mentioned non-STT_SECTION symbol names. This patch extends the code to
handle STT_SECTION symbols, where we report the section name.
This change helps at least the following cases with very little code.

* Whether a out-of-range relocation is due to code or data.
* For a relocation in .debug_info, which referenced `.debug_*` section (due to DWARF32 limitation) causes the problem.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D145199
2023-03-03 12:35:05 -08:00
Peter Collingbourne
82c2fcffc2 ELF: Respect MEMORY command when specified without a SECTIONS command.
We were previously ignoring the MEMORY command unless SECTIONS was also
specified. Fix it.

Differential Revision: https://reviews.llvm.org/D145132
2023-03-01 22:40:32 -08:00
Mitch Phillips
c574e93afd [lld] [MTE] Add DT_AARCH64_MEMTAG_* dynamic entries, and small cleanup
Adds the new AArch64-ABI dynamic entry generation to LLD. This will
allow Android to move from the Android-specific ELF note onto the
dynamic entries.

Change the behaviour of an unspecified --android-memtag-mode. Now, when
unspecified, this will print a warning that you're doing a no-op, rather
than implicitly turning on sync mode. This is important for MTE globals
later, where a binary containing static tagged global descriptors
shouldn't have MTE turned on without specific intent being passed to the
linker.

For now, continue to emit the Android ELF note by default. In future, we
can probably make it only emit the note when provided a flag.

Do a quick NFC-cleanup of the ELF note while we're here. It doesn't
change anything about the ELF note itself, but makes it more clear to
the reader of the code what alignment requirements are being (previously
implicitly) met.

Reviewed By: fmayer, MaskRay

Differential Revision: https://reviews.llvm.org/D143769
2023-03-01 11:14:05 -08:00
Fangrui Song
7198c87f42 [ELF][PPC64] Actually implement --no-power10-stubs
When a caller that does not use TOC calls a function, a call stub is needed if
the function may use TOC. --no-power10-stubs avoids PC-relative instructions in
the code sequence.

The --no-power10-stubs=no implementation added in D94627 is wrong.
First, the first instruction incorrectly uses `mflr 0` (instead of `mflr 12`).
Second, for the PLT case, it uses addis+addi with getVA instead of addis+ld with
getGotPltVA.
2023-02-27 16:19:13 -08:00
Alex Bradbury
ff93c9beef [lld][RISCV] Avoid error when encountering unrecognised ISA extensions/versions in RISC-V attributes
This patch follows on from this RFC thread
<https://discourse.llvm.org/t/rfc-resolving-issues-related-to-extension-versioning-in-risc-v/68472/>
and the ensuing discussion in the RISC-V LLVM sync-up call. The
consensus agreed that the behaviour change in LLD introduced in D138550
that results in object files including arch attributes with unrecognised
extensions or versions of extensions is a regression and should be
treated as such. As it stands, this logic means that LLD will error out
if trying to link a RISC-V object file from LLVM HEAD (rv32i2p0/rv64i2p0)
with one from current GCC (rv32i2p1/rv64i2p1 by default).

There's a bigger discussion about exactly when to warn vs error and so
on, and how to control that, and this patch doesn't attempt to address
all those questions. It simply tries to fix the problem with a minimally
invasive change, intended to be cherry-picked for 16.0.x (ideally
16.0.0, but queued for 16.0.1 if we're too late in the release cycle).

As you can see from the test changes, although the changed logic is
mostly more permissive, it will reject some embedded arch strings that
were accepted before. Because the same logic was previously used for
parsing human-written -march as for the arch attribute (intended to be
stored in normalised form), various short-hand formats were previously
accepted. Maintaining support for such ill-formed attributes would
substantially complicate the logic, and given the previous
implementation was so much stricter in every other way, was surely a bug
rather than a design choice.

Surprisingly, the precise rules for how numbers can be embedded into
extension names isn't fully defined (there is a PR to the ISA manual
that is not yet merged
<https://github.com/riscv/riscv-isa-manual/pull/718>).
In the absence of specific criteria for rejecting extensions names that
would be ambiguous in abbreviated form,
`RISCVISAInfo::parseArchStringNormalized` just pulls out the version
information from the end of each extension description.

Differential Revision: https://reviews.llvm.org/D144353
2023-02-25 06:17:50 +00:00
Ben Shi
366d34b39e [AVR][MC] Add ELF flag 'EF_AVR_LINKRELAX_PREPARED' to OBJ files
This is in accordance with avr-gcc, even '-mno-relax' is specified
to avr-gcc, this flag will also be added to the output relocatables.

With this flag set, the GNU ld will perform long call -> short call
optimization for AVR, otherwise not.

Fixes https://github.com/llvm/llvm-project/issues/54508

Reviewed By: MaskRay, jacquesguan, aykevl

Differential Revision: https://reviews.llvm.org/D144617
2023-02-24 11:16:42 +08:00
Leonard Chan
bbddaad6e8 Add REQUIRES: riscv to riscv test
This should fix builders like
https://lab.llvm.org/buildbot/#/builders/139/builds/36522
2023-02-23 22:16:49 +00:00
Leonard Chan
4f0aa2517d [lld][RISCV] Introduce handling for R_RISCV_PLT32 relocation
This introduces R_RISCV_PLT32, a PC-relative data relocation that takes
the 32-bit relative offset to a function or its PLT entry.

This is needed to support relative vtables on RISCV.

Github PR: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/363

D143226 has the llvm parts.

Differential Revision: https://reviews.llvm.org/D143115
2023-02-23 22:05:52 +00:00
Fangrui Song
686cff17cc [ELF] --icf: don't fold a section without relocation and a section with relocations for SHT_REL
Fix https://github.com/llvm/llvm-project/issues/57693
2023-02-22 23:34:49 -08:00
Alex Bradbury
179a24c2f1 [lld][test][RISCV] Don't use incorrectly normalised arch string in riscv-attributes-place.s
Per the psABI, the arch string should be normalised to (amongest other
things) always include the full version of each extension in form
zfoo1p0. riscv-attributes-place.s didn't conform to this, which is not a
problem for the current parsing logic, but this behaviour would change
with a patch I'm about to propose.

This makes riscv-sttributes-place.s feature a valid arch string, and
maintains test coverage for this particular form of invalid arch string
by adding it to riscv-attributes.s.
2023-02-19 19:15:32 +00:00
Kristina Bessonova
5dde2bcdd1 [AArch64InstPrinter][llvm-objdump] Print ADR PC-relative label as a target address hexadecimal form
This is similar to ADRP and matches GNU objdump:

GNU objdump:
```
0000000000200100 <_start>:
  200100:    adr    x0, 201000 <_start+0xf00>
```

llvm-objdump (before patch):
```
0000000000200100 <_start>:
  200100:    adr    x0, #3840
```

llvm-objdump (after patch):
```
0000000000200100 <_start>:
  200100:    adr    x0, 0x201000 <_start+0xf00>
```

Reviewed By: simon_tatham, peter.smith

Differential Revision: https://reviews.llvm.org/D144079
2023-02-18 18:31:21 +02:00
Scott Linder
45ee0a9afc [LLD] Add --lto-CGO[0-3] option
Allow controlling the CodeGenOpt::Level independent of the LTO
optimization level in LLD via new options for the COFF, ELF, MachO, and
wasm frontends to lld. Most are spelled as --lto-CGO[0-3], but COFF is
spelled as -opt:lldltocgo=[0-3].

See D57422 for discussion surrounding the issue of how to set the CG opt
level. The ultimate goal is to let each function control its CG opt
level, but until then the current default means it is impossible to
specify a CG opt level lower than 2 while using LTO. This option gives
the user a means to control it for as long as it is not handled on a
per-function basis.

Reviewed By: MaskRay, #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D141970
2023-02-15 17:34:35 +00:00
Alex Bradbury
8b5004864a [lld][RISCV][test] Expand testing in riscv-attributes.s
This patch is related to the discussion in
<https://discourse.llvm.org/t/rfc-resolving-issues-related-to-extension-versioning-in-risc-v/68472/1>.
It slightly expands the coverage of behaviour for unrecognized
extensions (there are slightly different forms of error for zfoo vs e.g.
'y'), and adds coverage for an extension with an
unrecognized/unsupported version number.

Use "unrecognized" terminology because the expectation is the error
checking will be reduced in a follow-up patch posted for review.
2023-02-15 14:00:54 +00:00
Fangrui Song
d60ef9338d [ELF] Support quoted output section names
Similar to e7a7ad134fe182aad190cb3ebc441164470e92f5 and
2bf06d9345caeb26520be8e830c092683bbdf0f7 for other linker script syntax.

Close https://github.com/llvm/llvm-project/issues/60496
2023-02-03 11:03:00 -08:00
Fangrui Song
08c915fa76 [ELF] -z notext: avoid dynamic relocations in .eh_frame
Fix https://github.com/llvm/llvm-project/issues/60392

```
// a.cc
void raise() { throw 42; }
bool foo() {
  try { raise(); } catch (int) { return true; }
  return false;
}
int main() { foo(); }
```

```
clang++ --target=x86_64-linux-gnu -fno-pic -mcmodel=large -no-pie -fuse-ld=lld -z notext a.cc -o a && ./a
clang++ --target=aarch64-linux-gnu -fno-pic -no-pie -fuse-ld=lld -Wl,--dynamic-linker=/usr/aarch64-linux-gnu/lib/ld-linux-aarch64.so.1 -Wl,-rpath=/usr/aarch64-linux-gnu/lib -z notext a.cc -o a && ./a
```
Both commands fail because we produce a dynamic relocation for
R_X86_64_64/R_AARCH64_ABS64 in .eh_frame which will be adjusted to a wrong
offset by `SectionBase::getOffset` after D122459.

Since GNU ld uses a canonical PLT entry instead of a dynamic relocation for
.eh_frame, we follow suit as well to avoid the issue.

Mips has an ABI issue (https://github.com/llvm/llvm-project/issues/5837) and we
don't implement GNU ld's DW_EH_PE_absptr conversion. mips64-eh-abs-reloc.s wants
a dynamic relocation, so keep the original behavior for EM_MIPS.

Differential Revision: https://reviews.llvm.org/D143136
2023-02-03 10:27:33 -08:00
Ben Shi
ac4c430a82 [ELF][test] Improve AVR relocation tests
Reviewed By: aykevl, MaskRay

Differential Revision: https://reviews.llvm.org/D141197
2023-01-29 16:28:42 +08:00
Arthur Eubanks
ae5efe9761 [lld] Remove transitional legacy pass manager flags
Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D142571
2023-01-26 11:12:21 -08:00
Nikita Popov
d7cf7ab61c [LLD] Remove no-opaque-pointers plugin option
We always use opaque pointers. The opaque-pointers option is
retained as a no-op, same as no-lto-legacy-pass-manager.
2023-01-25 12:29:59 +01:00
Ties Stuij
6f9ff1beee [lld][ARM] support position independent thunks for Armv4(T)
- Position independent thunks now work for both Armv4 and Armv4T
- Armv4 arm->arm thunks don't emit a BX anymore, which doesn't exist for the
  arch. This fixes https://github.com/llvm/llvm-project/issues/50764.
- Armv4 and Armv4T both have the same arm->arm behaviour. Which also is
  desirable for the above ticket.

Reviewed By: MaskRay, peter.smith

Differential Revision: https://reviews.llvm.org/D141272
2023-01-13 11:54:41 +00:00
Nico Weber
aa0883b59a [lld/mac] Add support for distributed ThinLTO
Adds support for the following flags:

* --thinlto-index-only, --thinlto-index-only=
* --thinlto-emit-imports-files
* --thinlto-emit-index-files
* --thinlto-object-suffix-replace=
* --thinlto-prefix-replace=

See https://blog.llvm.org/2016/06/thinlto-scalable-and-incremental-lto.html
for some words on --thinlto-index-only.

I don't really need the other flags, but they were in the vicinity
and _someone_ might need them, so I figured I'd add them too.

`-object_path_lto` now sets `c.AlwaysEmitRegularLTOObj` as in the other ports,
which means it can now only point to a filename for non-thin LTO.
I think that was the intent of D129705 anyways, so update
test/MachO/lto-object-path.ll to use a non-thin bitcode file for that test.

Differential Revision: https://reviews.llvm.org/D138451
2023-01-12 20:54:18 -05:00