25850 Commits

Author SHA1 Message Date
Krzysztof Drewniak
087b67cc06 [AMDGPU][LoadStoreVectorizer] Pre-commit test for addrspace 7 crash
Differential Revision: https://reviews.llvm.org/D151751
2023-05-30 21:15:21 +00:00
Florian Hahn
02bf5e36f5
[ConstraintElim] Add additional tests for and implication handling. 2023-05-30 21:08:38 +01:00
Florian Hahn
8098f2577e
[LV] Use Legal::isUniform to detect uniform pointers.
Update collectLoopUniforms to identify uniform pointers using
Legal::isUniform. This is more powerful and  brings pointer
classification here in sync with setCostBasedWideningDecision
which uses isUniformMemOp. The existing mis-match in reasoning
can causes crashes due to D134460, which is fixed by this patch.

Fixes https://github.com/llvm/llvm-project/issues/60831.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D150991
2023-05-30 16:42:55 +01:00
Nikita Popov
8378f1f4cd [InstCombine] Remove adjustMinMax() fold (PR62088)
This fold is buggy if the constant adjustment overflows.
Additionally, since we now canonicalize to min/max intrinsics,
the constants picked here don't actually matter, as long as SPF
still recognizes the pattern.

Fixes https://github.com/llvm/llvm-project/issues/62088.
2023-05-30 16:06:38 +02:00
Nikita Popov
96a14f388b Revert "[FuncSpec] Replace LoopInfo with BlockFrequencyInfo"
As reported on https://reviews.llvm.org/D150375#4367861 and
following, this change causes PDT invalidation issues. Revert
it and dependent commits.

This reverts commit 0524534d5220da5ecb2cd424a46520184d2be366.
This reverts commit ced90d1ff64a89a13479a37a3b17a411a3259f9f.
This reverts commit 9f992cc9350a7f7072a6dbf018ea07142ea7a7ed.
This reverts commit 1b1232047e83b69561fd64b9547cb0a0d374473a.
2023-05-30 14:49:03 +02:00
Nikita Popov
f1106ef6c9 [InstCombine] Remove computeKnownBits() fold for returns
We try to fold constant computeKnownBits() with context for return
instructions only. Otherwise, we rely on SimplifyDemandedBits() to
fold instructions with constant known bits.

The presence of this special fold for returns is dangerous, because
it makes our tests lie about what works and what doesn't. Tests are
usually written by returning the result we're interested in, but
will go through this separate code path that is not used for anything
else. This patch removes the special fold.

This primarily regresses patterns of the style "assume(x); return x".
The responsibility of handling such patterns lies with passes like
EarlyCSE/GVN anyway, which will do this reliably, and not just for
returns.

Differential Revision: https://reviews.llvm.org/D151099
2023-05-30 12:16:51 +02:00
Florian Hahn
0332f2c551
[ConstraintElim] Add extra tests for and operand implying other op.
Extend test coverage for and conditions where the first operand implies
the second. The update includes the select form of AND and a few cases
where one of the AND operands gets simplified before solving.
2023-05-29 21:05:00 +01:00
Florian Hahn
fcc135a8d6
[LV] Remove dead CHECK lines after 280656eae95a9cbf.
Those check lines were left over after adding new run lines in
280656eae95a9cbf.
2023-05-29 19:23:52 +01:00
Justin Lebar
420cf6927c
[LSV] Return same bitwidth from getConstantOffset.
Previously, getConstantOffset could return an APInt with a different
bitwidth than the input pointers.  For example, we might be loading an
opaque 64-bit pointer, but stripAndAccumulateInBoundsConstantOffsets
might give a 32-bit offset.

This was OK in most cases because in gatherChains, we casted the APInt
back to the original ASPtrBits.

But it was not OK when considering selects.  We'd call getConstantOffset
twice and compare the resulting APInt's, which might not have the same
bit width.

This fixes that.  Now getConstantOffset always returns offsets with the
correct width, so we don't need the hack of casting it in gatherChains,
and it works correctly when we're handling selects.

Differential Revision: https://reviews.llvm.org/D151640
2023-05-29 08:43:47 -07:00
Florian Hahn
cd2fc73b49
Revert "[ValueTracking][InstCombine] Add a new API to allow to ignore poison generating flags or metadatas when implying poison"
This reverts commit 754f3ae65518331b7175d7a9b4a124523ebe6eac.

Unfortunately the change can cause regressions due to dropping flags
from instructions (like nuw,nsw,inbounds), prevent further optimizations
depending on those flags.

A simple example is the IR below, where `inbounds` is dropped with the
patch and the phase-ordering test added in 7c91d82ab912fae8b.

    define i1 @test(ptr %base, i64 noundef %len, ptr %p2) {
    bb:
      %gep = getelementptr inbounds i32, ptr %base, i64 %len
      %c.1 = icmp uge ptr %p2, %base
      %c.2 = icmp ult ptr %p2, %gep
      %select = select i1 %c.1, i1 %c.2, i1 false
      ret i1 %select
    }

For more discussion, see D149404.
2023-05-29 15:44:37 +01:00
khei4
0ad88c156e [MemCpyOpt] remove byval from memcpy size crtical test(NFC)
Differential Revision: https://reviews.llvm.org/D151626
Reviewed By: nikic
2023-05-29 16:56:07 +09:00
Max Kazantsev
dd0cf23e4a [LICM] Reassociate & hoist sub expressions
LICM could reassociate mixed variant/invariant comparison/arithmetic operations
and hoist invariant parts out of loop if it can prove that they can be computed
without overflow. Motivating example here:
```
  INV1 - VAR1 < INV2
```
can be turned into
```
  VAR > INV1 - INV2
```
if we can prove no-signed-overflow here. Then `INV1 - INV2` can be computed
out of loop, so we save one arithmetic operation in-loop.

Reviewed By: skatkov
Differential Revision: https://reviews.llvm.org/D148001
2023-05-29 12:52:43 +07:00
Florian Hahn
280656eae9
[LV] Add check line with VF=4 to uniformity test.
Extend test coverage for D148841.
2023-05-28 20:01:04 +01:00
Justin Lebar
f225471c68
[LSV] Fix the ContextInst for computeKnownBits.
Previously we used the later of GEPA or GEPB.  This is hacky because
really we should be using the later of the two load/store instructions
being considered.  But also it's flat-out incorrect, because GEPA and
GEPB might be in different BBs, in which case we cannot ask which one
comes last (assertion failure,
https://reviews.llvm.org/D149893#4378332).

Fixed, now we use the correct context instruction.

Differential Revision: https://reviews.llvm.org/D151630
2023-05-28 08:00:52 -07:00
Florian Hahn
6607f62b89
[ConstraintElimination] Add tests with incrementing pointer IV.
Add initial set of tests for improved loop phi handling.
2023-05-27 20:47:57 +01:00
Justin Lebar
2be0abb7fe
Rewrite load-store-vectorizer.
The motivation for this change is a workload generated by the XLA compiler
targeting nvidia GPUs.

This kernel has a few hundred i8 loads and stores.  Merging is critical for
performance.

The current LSV doesn't merge these well because it only considers instructions
within a block of 64 loads+stores.  This limit is necessary to contain the
O(n^2) behavior of the pass.  I'm hesitant to increase the limit, because this
pass is already one of the slowest parts of compiling an XLA program.

So we rewrite basically the whole thing to use a new algorithm.  Before, we
compared every load/store to every other to see if they're consecutive.  The
insight (from tra@) is that this is redundant.  If we know the offset from PtrA
to PtrB, then we don't need to compare PtrC to both of them in order to tell
whether C may be adjacent to A or B.

So that's what we do.  When scanning a basic block, we maintain a list of
chains, where we know the offset from every element in the chain to the first
element in the chain.  Each instruction gets compared only to the leaders of
all the chains.

In the worst case, this is still O(n^2), because all chains might be of length
1.  To prevent compile time blowup, we only consider the 64 most recently used
chains.  Thus we do no more comparisons than before, but we have the potential
to make much longer chains.

This rewrite affects many tests.  The changes to tests fall into two
categories.

1. The old code had what appears to be a bug when deciding whether a misaligned
   vectorized load is fast.  Suppose TTI reports that load <i32 x 4> align 4
   has relative speed 1, and suppose that load i32 align 4 has relative speed
   32.

   The intent of the code seems to be that we prefer the scalar load, because
   it's faster.  But the old code would choose the vectorized load.
   accessIsMisaligned would set RelativeSpeed to 0 for the scalar load (and not
   even call into TTI to get the relative speed), because the scalar load is
   aligned.

   After this patch, we will prefer the scalar load if it's faster.

2. This patch changes the logic for how we vectorize.  Usually this results in
   vectorizing more.

Explanation of changes to tests:

 - AMDGPU/adjust-alloca-alignment.ll: #1
 - AMDGPU/flat_atomic.ll: #2, we vectorize more.
 - AMDGPU/int_sideeffect.ll: #2, there are two possible locations for the call to @foo, and the pass is brittle to this.  Before, we'd vectorize in case 1 and not case 2.  Now we vectorize in case 2 and not case 1.  So we just move the call.
 - AMDGPU/adjust-alloca-alignment.ll: #2, we vectorize more
 - AMDGPU/insertion-point.ll: #2 we vectorize more
 - AMDGPU/merge-stores-private.ll: #1 (undoes changes from git rev 86f9117d476, which appear to have hit the bug from #1)
 - AMDGPU/multiple_tails.ll: #1
 - AMDGPU/vect-ptr-ptr-size-mismatch.ll: Fix alignment (I think related to #1 above).
 - AMDGPU CodeGen: I have difficulty commenting on these changes, but many of them look like #2, we vectorize more.
 - NVPTX/4x2xhalf.ll: Fix alignment (I think related to #1 above).
 - NVPTX/vectorize_i8.ll: We don't generate <3 x i8> vectors on NVPTX because they're not legal (and eventually get split)
 - X86/correct-order.ll: #2, we vectorize more, probably because of changes to the chain-splitting logic.
 - X86/subchain-interleaved.ll: #2, we vectorize more
 - X86/vector-scalar.ll: #2, we can now vectorize scalar float + <1 x float>
 - X86/vectorize-i8-nested-add-inseltpoison.ll: Deleted the nuw test because it was nonsensical.  It was doing `add nuw %v0, -1`, but this is equivalent to `add nuw %v0, 0xffff'ffff`, which is equivalent to asserting that %v0 == 0.
 - X86/vectorize-i8-nested-add.ll: Same as nested-add-inseltpoison.ll

Differential Revision: https://reviews.llvm.org/D149893
2023-05-26 15:15:39 -07:00
Hongtao Yu
23da210624 [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
For pseudo probes we would like to keep their original dwarf discriminator (either a zero or null) until the first FS-discriminator pass. The inliner is a violation of that, given that it assigns inlinee instructions with no debug info with the that of the callsite. This is being disabled in this patch.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D151568
2023-05-26 13:00:16 -07:00
Florian Hahn
7c91d82ab9
[PhaseOrdering] Add test for loop over span with hardened libc++.
Add a slightly reduced test case for a loop iterating over a std::span
with libc++ hardening.

See https://godbolt.org/z/cKerYq9fY.
2023-05-26 20:58:05 +01:00
Alexey Bataev
95b631181a [SLP]Fix getSpillCost functions.
There are several issues in the current implementation. The instructions
are not properly ordered, if they are placed in different basic blocks,
need to reverse the order of blocks. Also, need to exclude
non-vectorizable nodes and check for CallBase, not CallInst, otherwise
invoke calls are not handled correctly.
2023-05-26 12:19:28 -07:00
Alexey Bataev
e892193cc8 [SLP][NFC]Add a test for spill cost, NFC. 2023-05-26 11:04:46 -07:00
Nikita Popov
ca18e21951 [InstCombine] Remove instructions in dead blocks during combining
We already do this during initial worklist population. Doing this
as part of primary combining allows us to remove instructions in
blocks that were rendered dead by condition folding within the
same instcombine iteration.
2023-05-26 16:43:34 +02:00
Tejas Joshi
c75a0f5a9a [InstCombine] Optimize compares with multiple selects as operands
In case of a comparison with two select instructions having the same
condition, check whether one of the resulting branches can be simplified.
If so, just compare the other branch and select the appropriate result.
For example:

    %tmp1 = select i1 %cmp, i32 %y, i32 %x
    %tmp2 = select i1 %cmp, i32 %z, i32 %x
    %cmp2 = icmp slt i32 %tmp2, %tmp1

The icmp will result false for the false value of selects and the result
will depend upon the comparison of true values of selects if %cmp is
true. Thus, transform this into:

    %cmp = icmp slt i32 %y, %z
    %sel = select i1 %cond, i1 %cmp, i1 false

Differential Revision: https://reviews.llvm.org/D150360
2023-05-26 16:05:32 +02:00
Tejas Joshi
0c183795bb [InstCombine] Add tests for icmp of select fold (NFC)
For D150360.
2023-05-26 16:00:28 +02:00
Nikita Popov
1fc425380e [InstCombine] Handle undef when pruning unreachable code
If the branch condition is undef, then behavior is undefined and
neither of the successors are live.

This is to ensure that optimization quality does not decrease
when a constant gets replaced with undef/poison in this context.
2023-05-26 15:55:28 +02:00
Nikita Popov
fd89df1e0a [InstCombine] Add additional tests for unreachable code (NFC) 2023-05-26 15:48:14 +02:00
Nikita Popov
e99a79fbf5 [InstCombine] Add test for missing assume handling multi-use demanded bits (NFC)
Works if the assume is on a root value or an operation that does
not support multi-use demanded bits.
2023-05-26 14:59:36 +02:00
Nikita Popov
e1aa91b363 [InstCombine] Use KnownBits::shl() in SimplifyDemandedBits()
It is more precise than the custom logic we had. This came up when
trying to enforce a consistency assertion with computeKnownBits().
2023-05-26 14:43:10 +02:00
Austin Chang
68c5d46b6e [InstCombine] Improve bitreverse optimization
This patch utilizes the helper function implemented in D149699 and thus folds the following cases:

```
bitreverse(logic_op(x, bitreverse(y))) -> logic_op(bitreverse(x), y)
bitreverse(logic_op(bitreverse(x), y)) -> logic_op(x, bitreverse(y))
bitreverse(logic_op(bitreverse(x), bitreverse(y))) -> logic_op(x, y) in multiuse case
```

Reviewed By: goldstein.w.n, RKSimon

Differential Revision: https://reviews.llvm.org/D151246
2023-05-25 13:41:32 -05:00
Austin Chang
1d1f7eeee6 [InstCombine] Add regression test cases for bitreverse optimization; NFC
Fold the following case on IR InstCombine pass. This patch includes the new test cases for this optimization

```
bitreverse(logic_op(x, bitreverse(y))) -> logic_op(bitreverse(x), y)
bitreverse(logic_op(bitreverse(x), y)) -> logic_op(x, bitreverse(y))
bitreverse(logic_op(bitreverse(x), bitreverse(y))) -> logic_op(x, y) with multi-use
```

Reviewed By: goldstein.w.n

Differential Revision: https://reviews.llvm.org/D151245
2023-05-25 13:41:32 -05:00
Arthur Eubanks
aceaea6784 [Inliner] Mark inlinings stopped with inlining history as noinline
The inline history makes sure that we don't keep inlining due to mutual devirtualization. But this gets forgotten between inliner invocations.

So mark the inlined calls as noinline so we respect previous inline history decisions.

This overlaps with D121084, but they're not redundant since we may not inline completely through a child SCC, but we still want a cost multiplier when that happens.

See discussions in D145516.

Reviewed By: jmorse

Differential Revision: https://reviews.llvm.org/D150989
2023-05-25 09:55:53 -07:00
Denis Antrushin
291223409c [InlineCost] Consider branches with !make.implicit metadata as free.
!make.implicit metadata attached to branch means it will very likely
be eliminated (together with associated cmp instruction).

Reviewed By: apilipenko

Differential Revision: https://reviews.llvm.org/D149747
2023-05-25 18:43:16 +03:00
Serguei Katkov
116a31e3c3 [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
Reviewed By: anna
Differential Revision: https://reviews.llvm.org/D151082
2023-05-25 16:28:11 +07:00
Alexandros Lamprineas
0524534d52 [FuncSpec] Enable specialization of literal constants.
To do so we have to tweak the cost model such that specialization
does not trigger excessively.

Differential Revision: https://reviews.llvm.org/D150649
2023-05-25 09:55:46 +01:00
sgokhale
c4a60c9d34 [CodeGen][ShrinkWrap] Enable PostShrinkWrap by default
This is an attempt to reland D42600 and enabling this optimisation by default.

This also resolves the issue pointed out in the context of PGO build.

Differential Revision: https://reviews.llvm.org/D42600
2023-05-25 13:56:29 +05:30
Nikita Popov
d2502eb091 [KnownBits] Add support for nuw/nsw on shifts
Implement precise nuw/nsw support in the KnownBits implementation,
replacing the rather crude handling in ValueTracking.

Differential Revision: https://reviews.llvm.org/D151208
2023-05-25 10:17:10 +02:00
Nikita Popov
d5c56c5162 [SCEVExpander] Remember phi nodes inserted by LCSSA construction
SCEVExpander keeps track of all instructions it inserted. However,
it currently misses some phi nodes created during LCSSA construction.
Fix this by collecting these into another argument.

This also removes the IRBuilder argument, which was added for
essentially the same purpose, but only handles the root LCSSA nodes,
not those inserted by SSAUpdater.

This was reported as a regression on D149344, but the reduced test
case also reproduces without it.

Differential Revision: https://reviews.llvm.org/D150681
2023-05-25 09:34:19 +02:00
Enna1
693a1b7024 [gcov] Add nosanitize metadata to memory access instructions inserted by emitProfileNotes()
This patch adds nosantize metadata to memory access instructions inserted by gcov emitProfileNotes(), making sanitizers skip these instructions when gcov and sanitizer are used together.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D150460
2023-05-25 10:13:52 +08:00
Amara Emerson
6e88276411 Pre-commit a min/max idiom breakage test for D149918 2023-05-24 15:02:40 -07:00
Matt Arsenault
9ef1333bf4 AMDGPU: Replace certain llvm.amdgcn.class uses with llvm.is.fpclass
Most transforms should now be performed on llvm.is.fpclass. Unlike the
generic intrinsic, this supports variable test masks.
2023-05-24 21:49:52 +01:00
Matt Arsenault
f74bb32694 AMDGPU: Add some new tests for class undef/poison handling 2023-05-24 16:54:39 +01:00
Matt Arsenault
ca6aa47585 Inline: Convert test to generated checks 2023-05-24 15:40:56 +01:00
Zhongyunde
fb2c98a929 Reland [MergeICmps] Adapt to non-eq comparisons, bugfix
1.Fix the last runtime issue as some sequent comparisons need be spilted.
For the origin equal comparisons chain, the new spilted Icmp chain will
still be end with equal, while for the new not-equal comparisons chain,
the new spilted Icmp chain will still be end with equal, so should address
this carefully, see detail wih case partial_sequent_ne

2. Fix the mismatch of last link comparison

Thanks for @aeubanks, @glandium and @ayzhao report the runtime issue
and carefully examine.
Fix https://github.com/llvm/llvm-project/issues/59740.

Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D141188
2023-05-24 22:06:23 +08:00
bipmis
cbc50ba12e [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
This seems to be an issue currently where there are nested/chained GEP/BitCast Pointers.
The patch generates a new GEP for the wider load to avoid dominance problems.

Differential Revision: https://reviews.llvm.org/D150864
2023-05-24 10:36:11 +01:00
Nikita Popov
92dc4fff87 [ValueTracking] Check for known bits conflict for shl nsw (PR62908)
I removed the conflict check from computeKnownBitsFromShiftOperator()
in D150648 assuming that this is now handled on the KnownBits side.
However, the nsw handling is still inside ValueTracking, so we
still need to handle conflicts there. Restore the check closer to
where it is relevant.

Fixes https://github.com/llvm/llvm-project/issues/62908.
2023-05-24 10:54:10 +02:00
luxufan
82082b7da0 [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
Fixes:https://github.com/llvm/llvm-project/issues/62901

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D151295
2023-05-24 16:02:13 +08:00
Joshua Cao
849d01bf3d [LoopUnroll] Peel iterations based on select conditions
This also allows us to peel loops with a `select`:
```
for (int i = 0; i <= N; ++i);
  f3(i == 0 ? a : b); // select instruction
```
into:
```
f3(a); // peel one iteration
for (int i = 1; i <= N; ++i)
  f3(b);
```

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D151052
2023-05-24 00:57:57 -07:00
Joshua Cao
b76f0a0b15 [LoopUnroll] Add tests for peeling iterations based on select, and, or
conditions
2023-05-24 00:57:57 -07:00
Nikita Popov
3a223f1eaf [InstCombine] Fix crash due to early extractvalue removal
Fixes the issue reported at 4b8320868c (commitcomment-114671248).

The extractvalue instructions may still be used by the calling code
in some cases. Rather than trying to figure out which extracts are
safe to remove and which aren't, add them to the worklist so they
will get DCEd by the main loop.
2023-05-24 09:55:52 +02:00
Matt Arsenault
7738db3afa ValueTracking: Handle constrained_sqrt in computeKnownFPClass
With this, the body of CannotBeNegativeZero can be dropped.
2023-05-24 08:49:04 +01:00
Matt Arsenault
abf1abbfbe Inline: Convert test to generated checks 2023-05-24 08:49:04 +01:00