527 Commits

Author SHA1 Message Date
Xing Guo
57bee1e432
[JITLink] Add support for R_X86_64_PC16 relocation type. (#109630)
This patch adds support for R_X86_64_PC16 relocation type and
x86_64::Delta16 edge kind. This patch also adds missing test cases for
R_X86_64_PC32, R_X86_64_PC64 relocation types.
2024-09-24 21:21:42 +08:00
Kazu Hirata
c219ebd957
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#109563) 2024-09-22 00:18:22 -07:00
Lang Hames
255870d7b5 [JITLink] Update splitBlock to support splitting into multiple blocks.
LinkGraph::splitBlock used to take a single split-point to split a Block into
two. In the common case where a block needs to be split repeatedly (e.g. in
eh-frame and compact-unwind sections), iterative calls to splitBlock could
lead to poor performance as symbols and edges are repeatedly shuffled to new
blocks.

This commit updates LinkGraph::splitBlock to take a sequence of split offsets,
allowing a block to be split into an arbitrary number of new blocks. Internally,
Symbols and Edges only need to be moved once (directly to whichever new block
they will be associated with), leading to better performance.

On some large MachO object files in an out of tree project this change improved
the performance of splitBlock by several orders of magnitude.

rdar://135820493
2024-09-22 09:52:08 +10:00
Lang Hames
7a4013f029 [ORC] Generalize loadRelocatableObject to loadLinkableFile, add archive support.
This allows us to rewrite part of StaticLibraryDefinitionGenerator in terms of
loadLinkableFile.

It's also useful for clients who may not know (either from file extensions or
context) whether a given path will be an object file, an archive, or a
universal binary.

rdar://134638070
2024-08-28 15:17:20 +10:00
Vladislav Khmelevsky
199c400387
[JITLink][AArch64] Add LD64_GOTPAGE_LO15 rel support (#100854)
This relocation is used in order to address GOT entries using 15 bit
offset in ldr instruction. The offset is calculated relative to GOT
section page address.
2024-08-07 12:27:22 +04:00
Lang Hames
e7698a13e3 Re-apply "[ORC][JITLink] Treat common symbols as weak definitions." with fixes.
This reapplies 785d376d123, which was reverted in c49837f5f68 due to bot
failures. The fix was to relax some asserts to allow common symbols to be
resolved with either common or weak flags, rather than requiring one or the
other.
2024-07-24 16:35:26 +10:00
Lang Hames
c49837f5f6 Revert "[ORC][JITLink] Treat common symbols as weak definitions."
This reverts commit 785d376d1231167688dd12f93c5c0a5d46cd4086 while I
investigate some bot failures (e.g.
https://lab.llvm.org/buildbot/#/builders/3/builds/1983).
2024-07-24 13:26:17 +10:00
Lang Hames
785d376d12 [ORC][JITLink] Treat common symbols as weak definitions.
Duplicate common definitions should be coaleseced, rather than being treated as
duplicate definitions. Strong definitions should override common definitions.

rdar://132314264
2024-07-24 13:12:14 +10:00
Eymen Ünay
cd0f89109b
[JITLink][AArch32] Fix Unaligned Data Symbol Address Resolution (#97030)
The ARM architecture uses the LSB bit for ARM/Thumb mode switch
flagging. This is true for alignments of 2 and 4 but in data
relocations the alignment is 1 allowing the LSB bit to be set.
Now only `ELF::STT_FUNC` typed symbols are used in the 
TargetFlag mechanism.

The test is a minimal example of the issue mentioned below.

Fixes #95911 "Orc global constructor order test fails on 32
bit ARM".
2024-06-29 18:27:06 +03:00
Fangrui Song
34313eb1f0 [JITLink] Ensure Edges order is deterministic 2024-06-19 17:40:51 -07:00
Maksim Panchenko
ae6f730b2f
[JITLink] Add x86_64::Delta8 edge kind, ELF::R_X86_64_PC8 support (#95869)
Add support for ELF::R_X86_64_PC8 relocation via new x86_64::Delta8 edge
kind.
2024-06-18 09:31:52 -07:00
Pavel Samolysov
d395b56a52
[JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (#82172)
This relocation is used for the 32-bit aligned 21-bit immediate in LDR
Literal instructions.
2024-05-17 07:46:43 +03:00
Fangrui Song
2763353891
[Object,ELFType] Rename TargetEndianness to Endianness (#86604)
`TargetEndianness` is long and unwieldy. "Target" in the name is confusing. Rename it to "Endianness".

I cannot find noticeable out-of-tree users of `TargetEndianness`, but
keep `TargetEndianness` to make this patch safer. `TargetEndianness`
will be removed by a subsequent change.
2024-03-28 09:10:34 -07:00
Lang Hames
c4d5881550 [JITLink][MachO] Handle MachO section start/end symbols.
Transform section$start$<section-name> and section$end$<section-name> external
symbols into defined symbols when a section named <section-name> is present.

rdar://125357048

Coding my way home: 8.98112N, 79.52094W
2024-03-25 11:40:52 -05:00
Lang Hames
c15218bccb [JITLink] Dump weak-ref status for external symbols in LinkGraphs.
Coding my way home: 8.98112N, 79.52094W
2024-03-25 11:40:51 -05:00
Lang Hames
8ef451072a [JITLink][ELF][AArch64] Make include order consistent with other JITLink files.
Coding my way home: 8.98112N, 79.52094W
2024-03-25 11:40:51 -05:00
Lang Hames
488a18738f [JITLink][ELF] Improve ELF section start/end symbol handling.
This commit adds section start and stop symbol handling to ELF/aarch64, and
fixes the section symbol prefixes (using `__start_` and `__stop_`, rather than
`__start` and `__end`). It also adds a testcase for handling of these symbols.
2024-03-24 14:54:15 -05:00
Min-Yih Hsu
3d67cf681a
[JITLink] Always unmap standard segments in InProcessMemoryManager::deallocate (#81943)
Right now InProcessMemoryManager only releases a standard segment (via
sys::Memory::releaseMappedMemory) in `deallocate` when there is a
DeallocAction associated, leaving residual memory pages in the process
until termination.
Despite being a de facto memory leak, it won't cause a major issue if
users only create a single LLJIT instance per process, which is the most
common use cases. It will, however, drain virtual memory pages if we
create thousands of ephemeral LLJIT instances in the same process.

This patch fixes this issue by releasing every standard segments
regardless of the attached DeallocAction.
2024-02-16 16:19:56 -08:00
Jonas Hahnfeld
78f39dc70c
[JITLink][RISCV] Use hashmap to find PCREL_HI20 edge (#78849)
As noted in issues #68594 and #73935, `JITLink/RISCV/ELF_ehframe.s`
fails with libstdc++'s expensive checks because `getRISCVPCRelHi20`
calls `std::equal_range` on the edges which may not be ordered by their
offset. Instead let `ELFJITLinker_riscv` build a hashmap of all edges
with type `R_RISCV_PCREL_HI20` that can be looked up in constant time.

Closes #73935
2024-02-12 19:45:52 +01:00
Lang Hames
1389260805 [JITLink][MachO][arm64] Fix error-check order.
The error check should be performed after the iterator increment, not before
it. Thanks to @dcb314 for catching this!

Fixes github.com/apple/swift/issues/81119
2024-02-08 16:55:05 -08:00
Craig Topper
8c37e3e64b
[RISCV] Only set Zca flag for EF_RISCV_RVC in ELFObjectFileBase::getRISCVFeatures(). (#80928)
This code appears to be a hack to set the features to include compressed
instructions if the ELF EFLAGS flags bit is present, but the ELF
attribute for the ISA string is no present or not accurate.

We can't remove the hack because llvm-mc doesn't create ELF attributes
by default so a lot of tests fail to disassembler properly. Using clang
as the assembler does set the attributes.

This patch changes the hack to only set Zca since that is the minimum
implied by the flag. Setting anything else potentially conflicts with
the ISA string containing Zcmp or Zcmt.

JITLink also needs to be updated to recognize Zca in addition to C.
2024-02-07 08:23:57 -08:00
Stefan Gränitz
55929cd679
[JITLink][AArch32] Implement Armv5 ldr-pc stubs and use them for all pre-v7 targets (#79082)
This stub type loads an absolute address directly into the PC register.
It's the simplest and most compatible way to implement a branch
indirection across the entire address space (and probably the slowest as
well). It's the ideal fallback for all targets for which we did not
(yet) implement a more performant solution.
2024-01-23 18:02:17 +01:00
Stefan Gränitz
9577806b1e
[JITLink][AArch32] Implement R_ARM_PREL31 and process .ARM.exidx sections (#79044)
`R_ARM_PREL31` is a 31-bits relative data relocation where the
most-significant bit is preserved. It's used primarily in `.ARM.exidx`
sections, which we skipped processing until now, because we didn't
support the relocation type. This was implemented in RuntimeDyld with
https://reviews.llvm.org/D25069 and I implemented it in a similar way in
JITLink in order to reach feature parity.
2024-01-23 03:37:32 +01:00
Stefan Gränitz
e5ca202ef8
[JITLink][AArch32] Multi-stub support for armv7/thumbv7 (#78371)
We want to emit stubs that match the instruction set state of the
relocation site. This is important for branches that have no built-in
switch for the instruction set state. It's the case for Jump24
relocations. Relocations on instructions that support switching on
the fly will be rewritten in a relaxation step in the future. This
affects Call relocations on `BL`/`BLX` instructions.

In this patch, the StubManager gains a second stub symbol slot for each
target and selects which one to use based on the relocation type. For
testing, we select the appropriate slot with a stub-kind filter, i.e.
`arm` or `thumb`. With that we can implement Armv7 stubs and test
that we can have both kinds of stubs for a single external symbol.
2024-01-23 02:59:30 +01:00
Stefan Gränitz
565470ed27 [JITLink][AArch32] Implement ELF relocation R_ARM_NONE 2024-01-22 16:47:17 +01:00
Stefan Gränitz
bfb09326be [JITLink][AArch32] Implement ELF relocation R_ARM_TARGET1
Prepare a configuration switch and default to R_ARM_ABS32
2024-01-22 16:47:17 +01:00
Stefan Gränitz
c4fc563b8d
[JITLink][AArch32] Add GOT builder and implement R_ARM_GOT_PREL relocations for ELF (#78753)
LLJIT needs this relocation for running deinitializers. Implementation and
test are adapted from test arm-fpic-got.s in LLD.
2024-01-22 12:00:24 +01:00
Stefan Gränitz
9c607e77ea [JITLink][AArch32] Refactor StubsManager (NFC) 2024-01-17 00:36:30 +01:00
Stefan Gränitz
a979797dc2 [JITLink][AArch32] Rename stubs flavor Thumbv7 to v7 (NFC) 2024-01-17 00:36:30 +01:00
Ben Langmuir
08c5f1fede
[ORC] Add absoluteSymbolsLinkGraph to expose absolute symbols to platform (#77008)
Adds a function to create a LinkGraph of absolute symbols, and a
callback in dynamic library search generators to enable using it to
expose its symbols to the platform/orc runtime. This allows e.g. using
__orc_rt_run_program to run a precompiled function that was found via
dlsym. Ideally we would use this in llvm-jitlink's own search generator,
but it will require more work to align with the Process/Platform
JITDylib split, so not handled here.

As part of this change we need to handle LinkGraphs that only have
absolute symbols.
2024-01-05 15:32:29 -08:00
Lang Hames
4c1bc8e753 [JITLink][MachO] Handle intra-block subtractor relocations.
Previously the JITLink MachO backends (aarch64 and x86-64) only looked at the
fixup block to determine which symbol was being fixed up. This assumption breaks
if both symbols used in the subtractor are in the same block. The fix is to
check for such cases and use the offsets of each symbol to decide which is being
fixed up.

The issue only resulted in incorrect behavior for negative-delta relocations,
so the testcases use eh-frames with explicit edges for the CIE-pointer field in
FDEs (since these are negative-deltas).

rdar://119351329
2023-12-24 14:06:11 -08:00
Kazu Hirata
586ecdf205
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
2023-12-11 21:01:36 -08:00
Stefan Gränitz
e970652776 [JITLink][AArch32] Reflow code structure after llvm::endianness refactor (NFC) 2023-11-25 12:37:29 +01:00
Stefan Gränitz
b86420c614
[JITLink][AArch32] Add dynamic lookup for relocation fixup infos (#71649)
Specifying relocation fixup constants with name and type facilitates
readability and compile-time checks. The `FixupInfo<EdgeKind>` facade
organizes the information into entries per relocation type and provides
uniform access across Arm and Thumb relocations. Since it uses template
specializations, it doesn't limit potential entries. We cannot access
the entries dynamically though, because `EdgeKind` must be given as a
compile-time constant.

With this patch we populate a static lookup table on-demand and use it
for dynamic access in opcode-checks.
2023-11-24 21:45:50 +01:00
Stefan Gränitz
808caa9d46
[JITLink][AArch32] Run all error unittests throug main entrypoints (#72091)
Reading implicit addend from a relocation site doesn't require a complete
`LinkGraph` edge. The operation is independent from `TargetSymbol`,
but constructing an `Edge` instance required one. This patch fixes the
inconsistency and simplifies some setup code from the error unittests.

Furthermore this patch prepares for the `Arm`/`Thumb`/`Data` helper
functions to be turned into implementation details. Exposing them in the
API causes unfortunate inconsistencies that we don't want to error-check
all the time, e.g. passing `Thumb_Call` to `readAddendArm()`.
2023-11-15 11:18:23 +01:00
Kazu Hirata
ac4a272913 [llvm] Stop including llvm/ADT/DenseSet.h (NFC)
Identified with clangd.
2023-11-11 09:48:29 -08:00
Eymen Ünay
87081f1c18
[JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_PREL} (#70364)
Support for ELF::R_ARM_THM_MOVW_PREL_NC and ELF::R_ARM_THM_MOVT_PREL
is added. Move instructions with PC-relative immediates can be handled
in Thumb mode with this addition.
2023-11-09 11:51:02 +03:00
Kazu Hirata
bf383dca36 [llvm] Stop including llvm/Support/Endian.h (NFC)
Identified with misc-include-cleaner.
2023-11-01 23:16:33 -07:00
Jonas Hahnfeld
4f6757ce4b
[JITLink][RISCV] Implement eh_frame handling (#68253)
This requires adding a `NegDelta32` edge kind that cannot be mapped to
existing relocations.

Co-authored-by: Job Noorman <jnoorman@igalia.com>
2023-10-28 11:30:43 +02:00
Jonas Hahnfeld
508a697acd
[JITLink] Allow multiple relocations at same offset in EHFrameEdgeFixer (#68252)
The pass only requires that it can determine a uniquely identified
target at some offsets. Multiple relocations at the same offset are fine
otherwise and will be required when adding exception handling support
for RISC-V.
2023-10-22 23:32:33 +02:00
Kazu Hirata
1f12223cf4 [llvm] Stop including Endian.h (NFC)
These files satisfy all of the following:

- misc-include-cleaner indicates that these files do not need
  Endian.h.
- They do not mention "endian" anywhere.
- They do not include any *.inc or *.def, which could need
  llvm::support::endian.
2023-10-21 22:23:02 -07:00
Kazu Hirata
02f67c097d Use llvm::endianness::{big,little,native} (NFC)
Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class. This patch replaces
{big,little,native} with llvm::endianness::{big,little,native}.

This patch completes the migration to llvm::endianness and
llvm::endianness::{big,little,native}.  I'll post a separate patch to
remove the migration helpers in llvm/Support/Endian.h:

  using endianness = llvm::endianness;
  constexpr llvm::endianness big = llvm::endianness::big;
  constexpr llvm::endianness little = llvm::endianness::little;
  constexpr llvm::endianness native = llvm::endianness::native;
2023-10-13 23:16:25 -07:00
Kazu Hirata
6e8013a130 [llvm] Stop including llvm/ADT/StringMap.h (NFC)
These source files do not use StringMap.
2023-10-13 20:09:33 -07:00
Kai Luo
18dc8dcd76
[PowerPC][JITLink] Support R_PPC64_GOT_TLSGD_PCREL34 (#68660)
`R_PPC64_GOT_TLSGD_PCREL34` is generated for pwr10+.
2023-10-14 10:57:03 +08:00
Kazu Hirata
4a0ccfa865 Use llvm::endianness::{big,little,native} (NFC)
Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class as opposed to an
enum. This patch replaces support::{big,little,native} with
llvm::endianness::{big,little,native}.
2023-10-12 21:21:45 -07:00
Kai Luo
a712244f3b
[PowerPC][JITLink] Support R_PPC64_GOT_PCREL34 (#68658)
`R_PPC64_GOT_PCREL34` is generated for pwr10+.
2023-10-13 08:51:11 +08:00
Kazu Hirata
a9d5056862 Use llvm::endianness (NFC)
Now that llvm::support::endianness has been renamed to
llvm::endianness, we can use the shorter form.  This patch replaces
support::endianness with llvm::endianness.
2023-10-10 21:54:15 -07:00
Kazu Hirata
b05dbc4d5f [llvm] Use llvm::endianness::{big,little,native} (NFC)
Now that llvm::support::endianness has been renamed to
llvm::endianness, we can use the shorter form.  This patch replaces
support::endianness::{big,little,native} with
llvm::endianness::{big,little,native}.
2023-10-10 20:14:20 -07:00
Lang Hames
0d0f2199f4 [JITLink] Allow pre-existing eh-frame CIE edges on FDEs.
This restores the pre-b9383a86b8f behavior. Most platforms / compilers don't
add relocations for CIEs, however they're not prohibited and we want objects
that contain them to remain loadable.
2023-10-09 22:21:07 -07:00
Jonas Hahnfeld
b9383a86b8
[JITLink] Some cleanups to EHFrameSupport (#66707)
* Remove unused variable.
 * Error on existing edge at CIE pointer field.
 * Simplify CFI processing in `EHFrameEdgeFixer`: The code expects
`DWARFRecordSectionSplitter` to split each CFI record into its own
block, so remove loop over possibly multiple entries in one block.
2023-10-05 18:16:48 +02:00