128 Commits

Author SHA1 Message Date
Alexis Engelke
0d05c882ce
[Support] Use block numbers for LoopInfo BBMap (#103400)
Replace the DenseMap from blocks to their innermost loop a vector
indexed by block numbers, when possible. Supporting number updates is
not trivial as we don't store a list of basic blocks, so this is not
implemented.

NB: I'm generally not happy with the way loops are stored. As I think
that there's room for improvement, I don't want to touch the
representation at this point.

Pull Request: https://github.com/llvm/llvm-project/pull/103400
2026-03-19 11:18:06 +01:00
Jonathan Cohen
8d9df60efb
[EarlyIfConversion] Fix lambda capture in callInRange (#178504)
Post merge failure in windows buildbot:
https://lab.llvm.org/buildbot/#/builders/46/builds/29831
2026-01-28 15:08:20 -06:00
Jonathan Cohen
7cf11edd53
[EarlyIfConversion] Add analysis for data-dependent conditional branches(#174457)
Add infrastructure to identify conditional branches on values loaded from 
memory.  Such branches are likely to be harder to predict accurately since 
branch  history (probably) provides little useful information.

This analysis walks the def-use chain from the branch condition to find
loads that feed into it. Several cases are excluded from consideration:
- Loads from constant pools (predictable values)
- Dereferenceable invariant loads (loop-invariant)
- Branches with biased probability (null checks, etc.)
- Loads not "close in program time" to the branch (must be in the same
  basic block with no intervening calls)

The analysis is disabled by default behind -enable-early-ifcvt-data-dependent.
2026-01-28 21:43:44 +02:00
Alexis Engelke
284ef1b4ac
[Support][NFCI] Store DomTree children as linked list (#176409)
Reduce the size of a DomTreeNodeBase from 80 to 56 bytes by not storing
the children in a SmallVector. Instead, store children as forward-linked
list. This also avoids extra allocations for nodes with many children.
Additionally, DomTreeNodeBase is now trivially destructible.

A lot of code depends on the order of nodes in the dominator tree, so
make sure that the order is the same when inserting nodes. (Not having
to do this would save 8 bytes per node.)

NewGVN uses the order of nodes in the dominator tree in a way that is
not entirely clear to me (https://reviews.llvm.org/D28129). I kept the
semantics as, but now this is the only external user of
addChild/removeChild, which actually should be private.

https://llvm-compile-time-tracker.com/compare.php?from=263802c56b4db3fc9b6ed9fd313499cb03ca44da&to=43e0c0c5b663b3a4067252fc0addbaccefd0014d&stat=instructions:u
2026-01-17 21:09:49 +01:00
Jonathan Cohen
289a3292be
[EarlyIfConversion] Fix loop invariant operands check (#174765)
Fixes a bug in the check which prevented walking up the operands
of the branch condition beyond the operands to the branch instruction
itself.
2026-01-08 22:03:18 +02:00
Sergei Barannikov
97a60aa37a
[CodeGen] Turn MCRegUnit into an enum class (NFC) (#167943)
This changes `MCRegUnit` type from `unsigned` to `enum class : unsigned`
and inserts necessary casts.
The added `MCRegUnitToIndex` functor is used with `SparseSet`,
`SparseMultiSet` and `IndexedMap` in a few places.

`MCRegUnit` is opaque to users, so it didn't seem worth making it a
full-fledged class like `Register`.

Static type checking has detected one issue in
`PrologueEpilogueInserter.cpp`, where `BitVector` created for
`MCRegister` is indexed by both `MCRegister` and `MCRegUnit`.

The number of casts could be reduced by using `IndexedMap` in more
places and/or adding a `BitVector` adaptor, but the number of casts *per
file* is still small and `IndexedMap` has limitations, so it didn't seem
worth the effort.

Pull Request: https://github.com/llvm/llvm-project/pull/167943
2025-11-16 20:46:44 +03:00
Sergei Barannikov
1067930718
[CodeGen] Use MCRegUnit in more places (NFC) (#167578) 2025-11-12 01:08:50 +03:00
Afanasyev Ivan
337bad3921
[EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (#133554)
Bug relates to `early-if-predicator` and `early-ifcvt` passes. If
virtual register has "killed" flag in both basic blocks to be merged
into head, both instructions in head basic block will have "killed" flag
for this register. It makes MIR incorrect.

Example:

```
  bb.0: ; if
    ...
    %0:intregs = COPY $r0
    J2_jumpf %2, %bb.2, implicit-def dead $pc
    J2_jump %bb.1, implicit-def dead $pc

  bb.1: ; if.then
    ...
    S4_storeiri_io killed %0, 0, 1
    J2_jump %bb.3, implicit-def dead $pc

  bb.2: ; if.else
    ...
    S4_storeiri_io killed %0, 0, 1
    J2_jump %bb.3, implicit-def dead $pc
```

After early-if-predicator will become:

```
  bb.0:
    %0:intregs = COPY $r0
    S4_storeirif_io %1, killed %0, 0, 1
    S4_storeirit_io %1, killed %0, 0, 1
```

Having `killed` flag set twice in bb.0 for `%0` is an incorrect MIR.
2025-04-01 12:06:30 +02:00
Craig Topper
a70175ab93 [CodeGen] Use MCRegister and Register. NFC 2025-03-02 22:33:26 -08:00
Christopher Di Bella
08c69b2ef6 Revert "[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#127968)"
This reverts commit ff99af7ea03b3be46bec7203bd2b74048d29a52a.
2025-02-20 22:06:21 +00:00
Craig Topper
ff99af7ea0
[CodeGen] Remove static member function Register::isVirtualRegister. NFC (#127968)
Use nonstatic member instead. This requires explicit conversions, but
many will go away as we continue converting unsigned to Register.

In a few places where it was simple, I changed unsigned to Register.
2025-02-20 08:35:50 -08:00
Craig Topper
4a486e773e [CodeGen] Use Register/MCRegister::isPhysical. NFC 2025-01-18 23:37:03 -08:00
paperchalice
fe63669282
[Instrumentation] Support MachineFunction in OptNoneInstrumentation (#115471)
Support `MachineFunction` in `OptNoneInstrumentation`, also add
`isRequired` to all necessary passes.
2024-11-09 16:50:11 +08:00
Christudasan Devadasan
488d3924dd
[CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508) 2024-10-16 13:22:57 +05:30
Christudasan Devadasan
732b804e5f
[CodeGen][NewPM] Port machine trace metrics analysis to new pass manager. (#108507) 2024-10-16 13:19:55 +05:30
Juan Manuel Martinez Caamaño
327124ece7
[NFC][EarlyIfConverter] Rename SSAIfConv::runOnMachineFunction to SSAIfConv::init (#111500) 2024-10-08 11:11:23 +02:00
Juan Manuel Martinez Caamaño
1df8ccd35b
Revert "[NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (#107390)" (#111385)
This reverts commit 09a4c23eb410d4be52202bed21c967a3653c3544.
2024-10-08 10:27:22 +02:00
Juan Manuel Martinez Caamaño
d5ec01b0dd
Revert "[NFC][EarlyIfConverter] Replace boolean Predicate for a class (#108519)" (#111372)
This reverts commit 9e7315912656628b606e884e39cdeb261b476f16.
2024-10-07 16:03:11 +02:00
Juan Manuel Martinez Caamaño
a018353f4b Revert "[NFC][EarlyIfConverter] Remove unused member variables"
This reverts commit 3c83102f0615c7d66f6df698ca472ddbf0e9483d.
2024-10-07 14:37:37 +02:00
Kazu Hirata
46df454c9a
[CodeGen] Construct SmallVector with ArrayRef (NFC) (#109566) 2024-09-22 00:17:10 -07:00
Juan Manuel Martinez Caamaño
3c83102f06 [NFC][EarlyIfConverter] Remove unused member variables 2024-09-20 10:31:28 +02:00
Juan Manuel Martinez Caamaño
9e73159126
[NFC][EarlyIfConverter] Replace boolean Predicate for a class (#108519)
Currently SSAIfConv is used in 2 scenarios. Generalize them to support
more scenarios.
2024-09-20 09:54:05 +02:00
Juan Manuel Martinez Caamaño
09a4c23eb4
[NFC][EarlyIfConverter] Turn SSAIfConv into a local variable (#107390) 2024-09-13 10:43:33 +02:00
Alexis Engelke
6d103d7746
[Support] Erase blocks after DomTree::eraseNode (#101195)
Change eraseNode to require that the basic block is still contained
inside the function. This is a preparation for using numbers of basic
blocks inside the dominator tree, which are invalid for blocks that are
not inside a function.
2024-07-31 19:20:49 +02:00
Pengcheng Wang
ed4e75d5e5
[CodeGen] Remove AA parameter of isSafeToMove (#100691)
This `AA` parameter is not used and for most uses they just pass
a nullptr.

The use of `AA` was removed since 8d0383e.
2024-07-26 15:47:47 +08:00
paperchalice
79d0de2ac3
[CodeGen][NewPM] Port machine-loops to new pass manager (#97793)
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.
2024-07-09 09:11:18 +08:00
paperchalice
d38b518e04
Reapply "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#96858) (#96869)
This reverts commit ab58b6d58edf6a7c8881044fc716ca435d7a0156.
In `CodeGen/Generic/MachineBranchProb.ll`, `llc` crashed with dumped MIR
when targeting PowerPC. Move test to `llc/new-pm`, which is X86
specific.
2024-06-28 10:59:23 +08:00
paperchalice
ab58b6d58e
Revert "[CodeGen][NewPM] Port machine-branch-prob to new pass manager" (#96858)
Reverts llvm/llvm-project#96389
Some ppc bots failed.
2024-06-27 15:00:17 +08:00
paperchalice
73e46c2bb4
[CodeGen][NewPM] Port machine-branch-prob to new pass manager (#96389)
Like IR version `print<branch-prob>`, there is also a
`print<machine-branch-prob>`.
2024-06-27 14:04:51 +08:00
Kazu Hirata
dae061f1b2
[CodeGen] Use range-based for loops (NFC) (#96777) 2024-06-26 16:49:00 -07:00
paperchalice
837dc542b1
[CodeGen][NewPM] Split MachineDominatorTree into a concrete analysis result (#94571)
Prepare for new pass manager version of `MachineDominatorTreeAnalysis`.
We may need a machine dominator tree version of `DomTreeUpdater` to
handle `SplitCriticalEdge` in some CodeGen passes.
2024-06-11 21:27:14 +08:00
Xu Zhang
f6d431f208
[CodeGen] Make the parameter TRI required in some functions. (#85968)
Fixes #82659

There are some functions, such as `findRegisterDefOperandIdx` and  `findRegisterDefOperand`, that have too many default parameters. As a result, we have encountered some issues due to the lack of TRI  parameters, as shown in issue #82411.

Following @RKSimon 's suggestion, this patch refactors 9 functions, including `{reads, kills, defines, modifies}Register`,  `registerDefIsDead`, and `findRegister{UseOperandIdx, UseOperand, DefOperandIdx, DefOperand}`, adjusting the order of the TRI parameter and making it required. In addition, all the places that call these functions have also been updated correctly to ensure no additional impact.

After this, the caller of these functions should explicitly know whether to pass the `TargetRegisterInfo` or just a `nullptr`.
2024-04-24 14:24:14 +01:00
Jay Foad
fac4206e66 [EarlyIfConversion] Simplify condition after #65729 2023-10-11 10:53:12 +01:00
Jay Foad
b78f3ea7df
Clean up strange uses of getAnalysisIfAvailable (#65729)
After a pass calls addRequired<X>() it is strange to call
getAnalysisIfAvailable<X>() because analysis X should always be
available. Use getAnalysis<X>() instead.
2023-10-11 09:53:00 +01:00
Sergei Barannikov
aa2d0fbc30 [MC] Add MCRegisterInfo::regunits for iteration over register units
Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D152098
2023-06-16 05:39:50 +03:00
Florian Hahn
e351b9b66d
[EarlyIfCvt] Don't if-convert if condition has only loop-invariant ops.
This patch adds a heuristic to skip if-conversion if the condition has a
high chance of being predictable.

If the condition is in a loop, consider it predictable if the condition
itself or all its operands are loop-invariant. E.g. this considers a load
from a loop-invariant address predictable; we were unable to prove that it
doesn't alias any of the memory-writes in the loop, but it is likely to
read to same value multiple times.

This is a relatively crude heuristic, but it helps to prevent excessive
if-conversion in multiple workloads in practice.

Reviewed By: apostolakis

Differential Revision: https://reviews.llvm.org/D141639
2023-05-12 19:21:03 +01:00
Phoebe Wang
c2dd36cd39 [Coverity] Fix unchecked return value, NFC
The `ReversePredicate` should have made sure the reverse predicate is
supported by target, but the check comes from early function and might
be invalid by any mistake. So it's better to double confirm it here.

Differential Revision: https://reviews.llvm.org/D149586
2023-05-02 13:43:28 +08:00
Akshay Khadse
8bf7f86d79 Fix uninitialized pointer members in CodeGen
This change initializes the members TSI, LI, DT, PSI, and ORE pointer feilds of the SelectOptimize class to nullptr.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D148303
2023-04-17 16:32:46 +08:00
Anton Sidorenko
77bd15ae2f [MachineTraceMetrics][NFC] Move Strategy enum out of the class
Make forward declaration possible to reduce amount of dependencies and reduce
re-compilation burden caused by further patches.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D140539
2023-02-14 16:38:47 +03:00
Craig Topper
e72ca520bb [CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D141715
2023-01-13 14:38:08 -08:00
Hendrik Greving
ddf2f90a48 [EarlyIfConversion] Add target hook to allow for multiple ifcvt iterations.
Adds a target hook canPredicatePredicatedInstr(const MachineInstr&) that
assumes an instruction is already predicated and returns true if it can
be predicated again, used by the early if-conversion pass in order to
iterate multiple times on architectures supporting predicate logic.

No test added since there is no upstream target that can take advantage.

Differential Revision: https://reviews.llvm.org/D139981
2022-12-14 13:36:20 -08:00
Matt Arsenault
8d0383eb69 CodeGen: Remove AliasAnalysis from regalloc
This was stored in LiveIntervals, but not actually used for anything
related to LiveIntervals. It was only used in one check for if a load
instruction is rematerializable. I also don't think this was entirely
correct, since it was implicitly assuming constant loads are also
dereferenceable.

Remove this and rely only on the invariant+dereferenceable flags in
the memory operand. Set the flag based on the AA query upfront. This
should have the same net benefit, but has the possible disadvantage of
making this AA query nonlazy.

Preserve the behavior of assuming pointsToConstantMemory implying
dereferenceable for now, but maybe this should be changed.
2022-07-18 17:23:41 -04:00
Kazu Hirata
9e6d1f4b5d [CodeGen] Qualify auto variables in for loops (NFC) 2022-07-17 01:33:28 -07:00
Shengchen Kan
37b378386e [NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments 2022-03-16 20:25:42 +08:00
serge-sans-paille
989f1c72e0 Cleanup codegen includes
This is a (fixed) recommit of https://reviews.llvm.org/D121169

after:  1061034926
before: 1063332844

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121681
2022-03-16 08:43:00 +01:00
Nico Weber
a278250b0f Revert "Cleanup codegen includes"
This reverts commit 7f230feeeac8a67b335f52bd2e900a05c6098f20.
Breaks CodeGenCUDA/link-device-bitcode.cu in check-clang,
and many LLVM tests, see comments on https://reviews.llvm.org/D121169
2022-03-10 07:59:22 -05:00
serge-sans-paille
7f230feeea Cleanup codegen includes
after:  1061034926
before: 1063332844

Differential Revision: https://reviews.llvm.org/D121169
2022-03-10 10:00:30 +01:00
Kazu Hirata
2bea207d26 [CodeGen] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-01-30 12:32:51 -08:00
Kazu Hirata
1457e78352 [llvm] Use range-based for loops (NFC) 2021-12-05 08:33:02 -08:00
Jon Roelofs
421569b244 [EarlyIfConversion] Avoid producing selects with identical operands
This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands.  Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.

The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn

Differential Revision: https://reviews.llvm.org/D101508
2021-04-30 15:51:14 -07:00