2366 Commits

Author SHA1 Message Date
Alexey Samsonov
cb3f812b6b Kill -faddress-sanitizer, -fthread-sanitizer and -fcatch-undefined-behavior flags.
These flags are deprecated since at least Clang 3.3. Users should instead
use -fsanitize= with appropriate values.

llvm-svn: 204330
2014-03-20 10:48:29 +00:00
Christian Pirker
44f7cdc2fc clang/test/CodeGen/aarch64-varargs.c: works now regardless of assertions.
llvm-svn: 203944
2014-03-14 16:30:06 +00:00
NAKAMURA Takumi
3554912129 clang/test/CodeGen/aarch64-varargs.c: Suppress this for -Asserts, for now.
llvm-svn: 203920
2014-03-14 12:42:41 +00:00
Christian Pirker
a74c7914ad AArch64_be specific clang target settings
llvm-svn: 203918
2014-03-14 12:15:45 +00:00
Christian Pirker
f5164229f3 AArch64_be varargs processing for ARM ABI
llvm-svn: 203917
2014-03-14 11:51:06 +00:00
Tim Northover
9c177223bc CodeGen: make use of weaker failure orders on cmpxchg.
This makes Clang take advantage of the recent IR addition of a
"failure" memory ordering requirement. As with the "success" ordering,
we try to emit just a single version if the expression is constant,
but fall back to runtime detection (to allow optimisation across
function-call boundaries).

rdar://problem/15996804

llvm-svn: 203837
2014-03-13 19:25:48 +00:00
Richard Smith
0fc7bdc821 PR19113: Emit 'vtable' TBAA metadata when loading a vptr in a pointer-to-member-function call.
llvm-svn: 203691
2014-03-12 18:26:14 +00:00
Oliver Stannard
7c3c09e23f ARM: Correct alignment of structs passed as byval pointer
When a struct has bitfields overlapping with other members
(as required by the AAPCS), clang uses a packed struct to
represent this. If such a struct is large enough for clang to
pass it as a byval pointer (>64 bytes), we need to set the
alignment of the argument to match the original type.

llvm-svn: 203660
2014-03-12 14:02:50 +00:00
Tim Northover
e94a34cae2 Sema: produce error when invalid ordering is passed to atomic builtin
This is a conservative check, because it's valid for the expression to be
non-constant, and in cases like that we just don't know whether it's valid.

rdar://problem/16242991

llvm-svn: 203561
2014-03-11 10:49:14 +00:00
Justin Bogner
52a6a97d70 test: Give instrumentation based profiling tests their own directory
These tests are logically related, but they're spread about several
different CodeGen directories. Consolidate them in one place to make
them easier to manage.

llvm-svn: 203541
2014-03-11 04:37:49 +00:00
David Majnemer
938bc1ea84 IRGen: __c11/__atomic compare-and-exchange should respect the standard
Summary:
'Expected' should only be modified if the operation fails.

This fixes PR18899.

Reviewers: chandlerc, rsmith, rjmccall

CC: cfe-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2922

llvm-svn: 203493
2014-03-10 21:35:33 +00:00
Bob Wilson
bd48799c8d PGO: rename profile data files from .pgodata to .profdata.
These tests were added before we had settled on using a .profdata extension
for the profile data files. Renaming them now for consistency.

llvm-svn: 203166
2014-03-06 21:36:04 +00:00
Bob Wilson
363bd1a815 PGO: rename FileCheck variable to follow the existing convention.
I added this "STF" variable without noticing that all the other counter names
end with a "C". Renaming it to "STC" for consistency.

llvm-svn: 203165
2014-03-06 21:35:59 +00:00
Reid Kleckner
8d4a16ec3a Add tests for MS inline asm change r203146
llvm-svn: 203147
2014-03-06 19:19:36 +00:00
Bob Wilson
9c86656d62 Run -fprofile-instr tests with %clang_cc1.
This should help avoid problems like the buildbot fallout from my change in
r203085. I left the CodeGenCXX tests alone for now.

llvm-svn: 203131
2014-03-06 17:18:34 +00:00
Bob Wilson
da1ebedeea PGO: Use the main file name to help distinguish functions with local linkage.
In addition, for all functions, use the name from the llvm::Function to
identify the function in the profile data. Compute that "function name",
including the file name for local functions, once when assigning the PGO
counters and store it in the CodeGenPGO class.

Move the code to add InlineHint and Cold attributes out of StartFunction(),
because the "function name" string isn't available at that point.

llvm-svn: 203075
2014-03-06 04:55:41 +00:00
Raul E. Silvera
57a9850961 Update clang test to cover for new treatment of intrinsics as readnone.
llvm-svn: 203056
2014-03-06 01:37:10 +00:00
Tim Northover
926a235fea AArch64: convert NEON tests to use CHECK-LABEL.
llvm-svn: 202703
2014-03-03 11:34:36 +00:00
Hal Finkel
f7a07a5010 Add a PPC inline asm constraint type for single CR bits
This adds support for the PPC "wc" inline asm constraint (used for allocating
individual CR bits). Support for this constraint type was recently added to the
LLVM PowerPC backend. Although gcc does not currently support allocating
individual CR bits, this identifier choice has been coordinated with the gcc
PowerPC team, and will be marked as reserved for this purpose in the gcc
constraints.md file.

Prior to this change, none of the multi-character PPC constraints were handled
correctly (the '^' escape character was not being added as required by the
parsing code in LLVM). This should now be fixed. I'll add tests for these other
constraints as support is added for them in the backend.

llvm-svn: 202658
2014-03-02 18:24:18 +00:00
Warren Hunt
fed55979b1 Fixed an assertion failure related to bitfield lowering.
When lowering a bitfield, CGRecordLowering would assign the wrong 
storage type to a bitfield in some cases and trigger an assertion.  In 
these cases the layout was still correct, just the bitfield info was 
wrong.

llvm-svn: 202562
2014-03-01 00:38:40 +00:00
Bob Wilson
1e3f3bf950 Add a testcase for r202437.
llvm-svn: 202468
2014-02-28 05:57:14 +00:00
Tim Northover
efe7a5e1c8 ARM NEON: fix tests after r202137
llvm-svn: 202143
2014-02-25 11:48:25 +00:00
Tim Northover
3d4575cc1b AArch64 NEON: add 64-bit scalar intrinsics for _f64 mla/mls etc.
These seem to be supported by GCC, and do make sense architecturally so we
should probably have them.

llvm-svn: 202138
2014-02-25 11:13:49 +00:00
Tim Northover
87da936164 ARM NEON: add _f16 support to a couple of vector-shuffling intrinsics.
llvm-svn: 202137
2014-02-25 11:13:42 +00:00
Roman Divacky
bd01646489 Add a test for r202059.
llvm-svn: 202064
2014-02-24 19:24:15 +00:00
Aaron Ballman
7c19ab17c7 Exposing the noduplicate attribute within Clang, which marks functions so that the optimizer does not duplicate code.
Patch thanks to Marcello Maggioni!

llvm-svn: 201941
2014-02-22 16:59:24 +00:00
Warren Hunt
fb00c88703 Complete Rewrite of CGRecordLayoutBuilder
CGRecordLayoutBuilder was aging, complex, multi-pass, and shows signs of 
existing before ASTRecordLayoutBuilder.  It redundantly performed many 
layout operations that are now performed by ASTRecordLayoutBuilder and 
asserted that the results were the same.  With the addition of support 
for the MS-ABI, such as placement of vbptrs, vtordisps, different 
bitfield layout and a variety of other features, CGRecordLayoutBuilder 
was growing unwieldy in its redundancy.

This patch re-architects CGRecordLayoutBuilder to not perform any 
redundant layout but rather, as directly as possible, lower an 
ASTRecordLayout to an llvm::type.  The new architecture is significantly 
smaller and simpler than the CGRecordLayoutBuilder and contains fewer 
ABI-specific code paths.  It's also one pass.

The architecture of the new system is described in the comments. For the 
most part, the new system simply takes all of the fields and bases from 
an ASTRecordLayout, sorts them, inserts padding and dumps a record. 
Bitfields, unions and primary virtual bases make this process a bit more 
complicated.  See the inline comments.

In addition, this patch updates a few lit tests due to the fact that the 
new system computes more accurate llvm types than CGRecordLayoutBuilder. 
Each change is commented individually in the review.

Differential Revision: http://llvm-reviews.chandlerc.com/D2795

llvm-svn: 201907
2014-02-21 23:49:50 +00:00
Rafael Espindola
33ebd2171e Accept -no-integrated-as in -cc1 and forward it to llvm.
llvm-svn: 201837
2014-02-21 03:14:07 +00:00
Rafael Espindola
f9e1e5e9a3 Remove really old "APPLE LOCAL" markers.
llvm-svn: 201791
2014-02-20 14:09:04 +00:00
Daniel Jasper
2f0f297bdb Revert r201734 and r201742.
This breaks backwards compatibility with existing code. Previously, this
was defined as

  #define _mm_prefetch(a, sel) (__builtin_prefetch((void *)(a), 0, (sel)))

Which basically accepts any pointer. Changing this to char* simply
breaks a lot of existing code. I have tried changing char* to
"const void*", which seems to be the right thing as per Intel
specification this should work on basically any pointer. However,
apparently this breaks windows compatibility (because of a conflicting
declaration in windows.h).

So, we probably need to #ifdef this based on whether clang is compiling
for windows. According to Chandler, this might be done by introducing an
additional symbol to a fake type in BuiltinsX86.def and then condition
the type expansion on the platform.

llvm-svn: 201775
2014-02-20 11:10:48 +00:00
Warren Hunt
7281928be6 Updated to r201734. Removed unused declaration from lit test.
Also updating lit test to be more roboust (changing fixed offsets to 
flexible offsets)

llvm-svn: 201742
2014-02-19 23:57:54 +00:00
Warren Hunt
40d6f29ad8 Add _mm_prefetch and some others as MS builtins
This patch adds several built-ins that are required for ms 
compatibility. _mm_prefetch must be a built-in because it takes a 
compile-time constant argument and our prior approach of using a #define 
to the current built-in doesn't work in the presence of re-declaration 
of _mm_prefetch. The others can be obtained by including the windows 
system headers. If a user includes the windows system headers but not 
intrin.h they still need to work and therefore must be built-in because 
we don't get a chance to implement them in intrin.h in this case.

llvm-svn: 201734
2014-02-19 23:20:20 +00:00
Tim Northover
db3e5e2408 AArch64: look up EmitAArch64Scalar support before calling.
This fixes one immediate bug where an expression with side-effects
could be emitted twice during a NEON call.

It also prepares the way for folding CodeGen for many of the SISD
intrinsics into a table, reducing code size and hopefully increasing
performance eventually ("binary search + few switch cases" should be
better than "lots of switch cases").

llvm-svn: 201667
2014-02-19 11:55:06 +00:00
Tim Northover
0f6c9d0a9b ARM NEON: add vcvtX (with rounding mode) intrinsics to v8 ARM.
These instructions (well, the f32 ones) are supported on 32-bit ARMv8, not just
AArch64. Now that the arm_neon.td refactoring is complete, adding them is
surprisingly simple.

rdar://problem/16035743

llvm-svn: 201661
2014-02-19 10:37:13 +00:00
Bob Wilson
bf854f0f53 Change PGO instrumentation to compute counts in a separate AST traversal.
Previously, we made one traversal of the AST prior to codegen to assign
counters to the ASTs and then propagated the count values during codegen. This
patch now adds a separate AST traversal prior to codegen for the
-fprofile-instr-use option to propagate the count values. The counts are then
saved in a map from which they can be retrieved during codegen.

This new approach has several advantages:

1. It gets rid of a lot of extra PGO-related code that had previously been
added to codegen.

2. It fixes a serious bug. My original implementation (which was mailed to the
list but never committed) used 3 counters for every loop. Justin improved it to
move 2 of those counters into the less-frequently executed breaks and continues,
but that turned out to produce wrong count values in some cases. The solution
requires visiting a loop body before the condition so that the count for the
condition properly includes the break and continue counts. Changing codegen to
visit a loop body first would be a fairly invasive change, but with a separate
AST traversal, it is easy to control the order of traversal. I've added a
testcase (provided by Justin) to make sure this works correctly.

3. It improves the instrumentation overhead, reducing the number of counters for
a loop from 3 to 1. We no longer need dedicated counters for breaks and
continues, since we can just use the propagated count values when visiting
breaks and continues.

To make this work, I needed to make a change to the way we count case
statements, going back to my original approach of not including the fall-through
in the counter values. This was necessary because there isn't always an AST node
that can be used to record the fall-through count. Now case statements are
handled the same as default statements, with the fall-through paths branching
over the counter increments.  While I was at it, I also went back to using this
approach for do-loops -- omitting the fall-through count into the loop body
simplifies some of the calculations and make them behave the same as other
loops. Whenever we start using this instrumentation for coverage, we'll need
to add the fall-through counts into the counter values.

llvm-svn: 201528
2014-02-17 19:21:09 +00:00
Adrian Prantl
549c514799 Revert "Debug info: Make DWARF4 the default for Darwin, too."
I'm holding this change to give maintainers of Darwin buildbots more time
to update their toolchains.

This reverts commit r201375.

llvm-svn: 201520
2014-02-17 17:40:52 +00:00
Nico Rieck
e6a1582595 Fix broken CHECK lines
llvm-svn: 201477
2014-02-16 07:29:41 +00:00
Manman Ren
f1a6a2d930 PGO: fix a bug in parsing pgo data.
When a function has a single counter, we will offset the pointer by 1 when
parsing the next function. If a function has multiple counters, we are
okay after skipping rest of the counters.

llvm-svn: 201456
2014-02-15 01:29:02 +00:00
Adrian Prantl
27edf47bc0 Debug info: Make DWARF4 the default for Darwin, too.
llvm-svn: 201375
2014-02-14 00:29:33 +00:00
Daniel Sanders
753e17629d Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for
targets with mature MC support. Such targets will always parse the inline
assembly (even when emitting assembly). Targets without mature MC support
continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced
with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler
to parse inline assembly (even when emitting assembly output). UseIntegratedAs
is set to true for targets that consider any failure to parse valid assembly
to be a bug. Target specific subclasses generally enable the integrated
assembler in their constructor. The default value can be overridden with
-no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example,
those that use mnemonics such as 'foo' or 'hello world') have been updated to
disable the integrated assembler.

Changes since review (and last commit attempt):
- Fixed test failures that were missed due to configuration of local build.
  (fixes crash.ll and a couple others).
- Fixed tests that happened to pass because the local build was on X86
  (should fix 2007-12-17-InvokeAsm.ll)
- mature-mc-support.ll's should no longer require all targets to be compiled.
  (should fix ARM and PPC buildbots)
- Object output (-filetype=obj and similar) now forces the integrated assembler
  to be enabled regardless of default setting or -no-integrated-as.
  (should fix SystemZ buildbots)

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686

llvm-svn: 201333
2014-02-13 14:44:26 +00:00
John McCall
76e1818a2b ms_struct layout replaces platform-specific behavior like
useBitFieldTypeAlignment() and appears to ignore the special
bit-packing semantics of __attribute__((packed)).

Further flesh out an already-extensive comment.

llvm-svn: 201282
2014-02-13 00:50:08 +00:00
John McCall
5d4d61f64f Change testcase to use FileCheck.
llvm-svn: 201281
2014-02-13 00:50:02 +00:00
Daniel Sanders
abe212a3b8 Revert r201237+r201238: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
It introduced multiple test failures in the buildbots.

llvm-svn: 201241
2014-02-12 15:39:20 +00:00
Daniel Sanders
2f235aebdb Arcanist failed to commit the two clang test corrections that should have been in r201237.
llvm-svn: 201238
2014-02-12 14:46:15 +00:00
David Blaikie
68ccb3b6de Remove bad debug info test.
This test case doesn't belong in Clang (it's testing IndVarSimplify) but
in an effort to reproduce the test case this was intended to cover (by
essentially reverting r134441) I wasn't able to reproduce the failure
this test case should've produced. So I haven't ported this down to
LLVM, instead I'm just deleting it.

I suspect the test is just underconstrained, but I've no great interest
in trying hard to fix it right now - if anyone else wants to, I'd be
more than welcome to that.

llvm-svn: 201178
2014-02-11 21:16:44 +00:00
Robert Lytton
15abd1881f XCore target: add section information.
Xcore target ABI requires const data that is externally visible
to be handled differently if it has C-language linkage rather than
C++ language linkage.

llvm-svn: 201142
2014-02-11 10:34:51 +00:00
Oliver Stannard
405bdeddd1 AAPCS: Do not split structs after CPRC allocated on stack
According to the AAPCS, we can split structs between GPRs and the stack,
except for when an argument has already been allocated on the stack. This
can occur when a large number of floating-point arguments fill up the VFP
registers, and are alllocated on the stack before the general-purpose argument
registers are full.

llvm-svn: 201137
2014-02-11 09:25:50 +00:00
Josh Magee
e0fc1a80cb [stackprotector] Add command line option -fstack-protector-strong
This option has the following effects:
 * It adds the sspstrong IR attribute to each function within the CU.
 * It defines the macro __SSP_STRONG__ with the value of 2.

Differential Revision: http://llvm-reviews.chandlerc.com/D2717

llvm-svn: 201120
2014-02-11 01:35:14 +00:00
Ana Pazos
9883d6d2b5 [AArch64] Fixed vget/vset_lane_f16 implementation
Replaced cast and vreinterepret operations with
code to reinterpret bitwise the types float16_t and
int16_t.

llvm-svn: 201112
2014-02-10 21:20:53 +00:00
Oliver Stannard
5e8558fce0 Fix AAPCS compliance for HFAs containing doubles and long doubles
An HFA is defined as a struct containing floating point values of the
same machine type. In the 32-bit ABI, double and long double have the
same machine type, so a struct with a mixture of these types must be an
HFA (assuming it meets the other criteria).

llvm-svn: 200971
2014-02-07 11:25:57 +00:00