233 Commits

Author SHA1 Message Date
Freddy Ye
5275aed4d0
Reland "[X86] Assign AVX10_1 feature priority to align with gcc. (#94557)" (#94734)
This reverts commit c007883f0286a314eb69976ad14da2bce988fb55.
2024-06-11 09:08:51 +08:00
Alexandros Lamprineas
48aebd4cf8
Revert "[AArch64] Decouple feature dependency expansion. (#94279)" (#95056)
This reverts commit 2cf14398c9341feddb419e7ff9c8c5623a3da3db since it
broke the llvm test suite:

SingleSource/UnitTests/AArch64/acle-fmv-features.c:59:9:
  error: instruction requires: altnzcv
SingleSource/UnitTests/AArch64/acle-fmv-features.c:117:10:
  error: instruction requires: aes
...

Looks like the FMV dependencies were used in the target attribute and
now features that are FMVOnly (have AEK_NONE) cannot be expanded in
parseTargetAttr using the ExtensionSet.

This suggests that either the tests are wrong (they are using an FMVOnly
feature in a target attribute), or that we need to turn the FMVOnly
features into Extensions (these two are tablegen classes).
2024-06-11 00:51:52 +01:00
Alexandros Lamprineas
2cf14398c9
[AArch64] Decouple feature dependency expansion. (#94279)
The dependency expansion step which was introduced by FMV has been
erroneously used for non-FMV features, for example when parsing the
target attribute. The PR #93695 has rectified most of the tests which
were relying on dependency expansion of target features specified on the
-cc1 command line. In this patch I am decoupling the dependency
expansion of features specified on the target attribute from FMV.

To do that first I am expanding FMV dependencies before passing the list
of target features to initFeatureMap(). Similarly when parsing the
target attribute I am reconstructing an ExtensionSet from the list of
target features which was created during the command line option
parsing. The attribute parsing may toggle bits of that ExtensionSet and
at the end it is converted to a list of target features. Those are
passed to initFeatureMap(), which no longer requires an override.

A side effect of this refactoring is that features specified on the
target_version attribute now supersede the command line options, which
is what should be happening in the first place.
2024-06-10 13:53:14 +01:00
Alex Voicu
88e2bb4092
[clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (#89796)
This change seeks to add support for vendor flavoured SPIRV - more
specifically, AMDGCN flavoured SPIRV. The aim is to generate SPIRV that
carries some extra bits of information that are only usable by AMDGCN
targets, forfeiting absolute genericity to obtain greater expressiveness
for target features:

- AMDGCN inline ASM is allowed/supported, under the assumption that the
[SPV_INTEL_inline_assembly](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_inline_assembly.asciidoc)
extension is enabled/used
- AMDGCN target specific builtins are allowed/supported, under the
assumption that e.g. the `--spirv-allow-unknown-intrinsics` option is
enabled when using the downstream translator
- the featureset matches the union of AMDGCN targets' features
- the datalayout string is overspecified to affix both the program
address space and the alloca address space, the latter under the
assumption that the
[SPV_INTEL_function_pointers](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_function_pointers.asciidoc)
extension is enabled/used, case in which the extant SPIRV datalayout
string would lead to pointers to function pointing to the private
address space, which would be wrong.

Existing AMDGCN tests are extended to cover this new target. It is
currently dormant / will require some additional changes, but I thought
I'd rather put it up for review to get feedback as early as possible. I
will note that an alternative option is to place this under AMDGPU, but
that seems slightly less natural, since this is still SPIRV, albeit
relaxed in terms of preconditions & constrained in terms of
postconditions, and only guaranteed to be usable on AMDGCN targets (it
is still possible to obtain pristine portable SPIRV through usage of the
flavoured target, though).
2024-06-07 11:50:23 +01:00
Jonathan Thackray
917afa8832
[ARM] Add support for Cortex-R52+ (#94633)
Cortex-R52+ is an Armv8-R AArch32 CPU.

Technical Reference Manual for Cortex-R52+:
   https://developer.arm.com/documentation/102199/latest/
2024-06-07 11:03:32 +01:00
Shilei Tian
1ca0055f45
[AMDGPU] Add a new target gfx1152 (#94534) 2024-06-06 12:16:11 -04:00
Wei Zhao
6b9753a0ec
[AArch64] Add support for Qualcomm Oryon processor (#91022)
Oryon is an ARM V8 AArch64 CPU from Qualcomm.

---------

Co-authored-by: Wei Zhao <wezhao@qti.qualcomm.com>
2024-06-06 07:27:50 -07:00
Konstantin Zhuravlyov
775f1cd34d
AMDGPU: Add gfx12-generic target (#93875) 2024-05-31 12:46:44 -04:00
Jerry Zhang Jian
01921bd4f1
[RISCV] Fix typo zamo -> zaamo (#93792)
Signed-off-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com>
2024-05-30 19:18:33 +08:00
Alexandros Lamprineas
e8e5ba00db
[AArch64][TargetParser] Move ExtensionDependencies into tablegen [NFC] (#93614)
This patch generates ExtensionDependency pairs {Earlier, Later} inferred
by the 'Implies' field of every Extension defined in tablegen. Implied
Subtarget Features that are not Extensions are skipped.
2024-05-29 15:06:41 +01:00
Craig Topper
7c265e9f57 [RISCV] Replace std::optional::value() with operator*. NFC 2024-05-24 09:27:57 -07:00
Freddy Ye
fb1d752364
Fix build warning for 4def1ce10 (#93274) 2024-05-24 14:42:33 +08:00
Freddy Ye
4def1ce101
Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (#93136)
This reverts commit aa4069ea96e5eb62bc8c7895b9d920f129611b3a.
2024-05-24 13:46:34 +08:00
Freddy Ye
aa4069ea96
Revert "[X86] Remove knl/knm specific ISAs supports (#92883)" (#93123)
This reverts commit 282d2ab58f56c89510f810a43d4569824a90c538.
2024-05-23 10:25:23 +08:00
Freddy Ye
282d2ab58f
[X86] Remove knl/knm specific ISAs supports (#92883)
Cont. patch after https://github.com/llvm/llvm-project/pull/75580
2024-05-23 09:46:44 +08:00
Alex Bradbury
83f065d582 [RISCV] static_assert SupportedProfiles and SupportedExperimentalProfiles are sorted
Just as we do for the arrays of extension names.
2024-05-15 21:34:07 +01:00
Alex Bradbury
891d687137
[RISCV] Gate unratified profiles behind -menable-experimental-extensions (#92167)
As discussed in the last sync-up call, because these profiles are not
yet finalised they shouldn't be exposed to users unless they opt-in to
them (much like experimental extensions). We may later want to add a
more specific flag, but reusing `-menable-experimental-extensions`
solves the immediate problem.

This is implemented using the new support for marking profiles s
experimental added in #91993 to move the unratified profiles to
RISCVExperimentalProfile and making the necessary changes to logic in
RISCVISAInfo to handle this.
2024-05-15 21:09:43 +01:00
VincentWu
844355a8cb
[RISC-V] remove I ext when E ext has been enabled (#92070)
After patch https://github.com/llvm/llvm-project/pull/88805

`I` Ext will be added automatically when we running the command like 
`./build/bin/llc -mtriple=riscv32 -mattr=+e -target-abi ilp32e
-verify-machineinstrs llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll`

it will generate 
```
	.text
	.attribute	4, 16
	.attribute	5, "rv32i2p1_e2pe"
	.file	"zcmp-additional-stack.ll"
	.globl	func                            # -- Begin function func
	.p2align	1
	.type	func,@function
```

This patch reset the I ext in FeatureBit when `+e` has been specify
2024-05-15 08:26:45 +10:00
Tomas Matheson
12c0024d19
[AArch64][TargetParser] Move extension aliases into tablegen (#91970) 2024-05-14 07:04:29 +01:00
Xiang Li
531a0b67ea
[DirectX] Reapply Fix DXIL part header version encoding (#91956)
This reapplies
195d8ac26d
[DirectX] Fix DXIL part header version encoding. The endian issue was
fixed by
f42117c851.

Move MinorVersion be the lower 8 bit.
Set DXIL version in DXContainerObjectWriter::writeObject.

Fixes #89952
2024-05-13 18:50:16 -04:00
Shengchen Kan
575177f610 [X86] Add sub-feature nf (no flags update) for APX
This is a follow-up patch for #74199
2024-05-11 15:55:59 +08:00
Craig Topper
30aa49cbc2 [RISCV] Remove the pre-split from RISCVISAInfo::parseArchString. NFCI
We can extract each extension as we process them without much
complexity.
2024-05-10 15:31:44 -07:00
Craig Topper
7237bef5da [RISCV] Use map::count instead of hasExtension in computeDefaultABI. NFC
hasExtension checks if the extension name is a known extension name.
That should always be true for the extensions listed here so we can
skip that check.
2024-05-10 12:20:24 -07:00
Justin Bogner
d655054395
Revert "[DirectX] Fix DXIL part header version encoding" (#91791)
Test failures on big endian bots after this change.

Reverts llvm/llvm-project#91506
2024-05-10 12:42:17 -06:00
Craig Topper
d8f8ac8f5f
[RISCV] Don't pre-split before the loop in parseNormalizedArchString. (#91684)
We can extract each extension as we process them without much
complexity.

I changed the error message for cases where there are double underscores
or a trailing underscore. I think this is an improvement over the
previous error.
2024-05-10 08:59:56 -07:00
Xiang Li
195d8ac26d
[DirectX] Fix DXIL part header version encoding (#91506)
Move MinorVersion be the lower 8 bit.
Set DXIL version in DXContainerObjectWriter::writeObject.


Fixes #89952
2024-05-10 06:29:23 -07:00
Jack Styles
6aac30fa43
Update FEAT_PAuth_LR behaviour for AArch64 (#90614)
Currently, LLVM enables `-mbranch-protection=standard` as `bti+pac-ret`.
To align LLVM with the behaviour in GNU, this has been updated to
`bti+pac-ret+pc` when FEAT_PAuth_LR is enabled as an optional feature
via the `-mcpu=` options. If this is not enabled, then this will revert
to the existing behaviour.
2024-05-10 08:09:02 +01:00
Phoebe Wang
87f3407856
[X86][Driver] Do not add -evex512 for -march=native when the target doesn't support AVX512 (#91694) 2024-05-10 13:25:37 +08:00
Craig Topper
e069bb7fd8 [RISCV] Use map::count instead of hasExtension in RISCVISAInfo::updateCombination. NFC
hasExtension check isSupportedExtension before the map lookup. All
of the extensions we check for in updateCombination should be valid
extension names so we can bypass that to save some time.
2024-05-09 20:14:44 -07:00
Craig Topper
1aaab334c5
[RISCV] Don't use std::vector<std::string> for split extensions in RISCVISAInfo::parseArchString. NFC (#91538)
We can use a SmallVector<StringRef>.

Adjust the code so we check for empty strings in the loop instead of
making a copy of the vector returned from StringRef::split.

This overlaps with #91532 which also removed the std::vector, but
that PR may be more controversial.
2024-05-08 17:22:18 -07:00
Kazu Hirata
bb6df0804b
[llvm] Use StringRef::operator== instead of StringRef::equals (NFC) (#91441)
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.

- StringRef::operator==/!= outnumber StringRef::equals by a factor of
  70 under llvm/ in terms of their usage.

- The elimination of StringRef::equals brings StringRef closer to
  std::string_view, which has operator== but not equals.

- S == "foo" is more readable than S.equals("foo"), especially for
  !Long.Expression.equals("str") vs Long.Expression != "str".
2024-05-08 10:33:53 -07:00
S. Bharadwaj Yadavalli
6d8901488f
[DXIL] Set DXIL Version in DXIL target triple based on shader model version (#91407)
This change set restores commit 080978dd2067d0c9ea7e229aa7696c2480d89ef1 that was reverted to address ASAN
failures and includes a fix for the ASAN failures. 

Following is the description of the change:

An earlier commit provided a way to decouple DXIL version from Shader
Model version by representing the DXIL version as `SubArch` in the DXIL
Target Triple and adding corresponding valid DXIL Arch types.
    
This change constructs DXIL target triple with DXIL version that is
deduced from Shader Model version specified in the following scenarios:
  
1. When compilation target profile is specified:
    For e.g., DXIL target triple `dxilv1.8-unknown-shader6.8-library` is
    constructed when `-T lib_6_8` is specified.
2. When DXIL target triple without DXIL version is specified:
    For e.g., DXIL target triple `dxilv1.8-pc-shadermodel6.8-library` is
    constructed when `-mtriple=dxil-pc-shadermodel6.8-library` is specified.
    
Updated relevant HLSL tests that check for target triple.
2024-05-08 12:20:41 -04:00
Xiang Li
665af09a86
[DirectX backend] emits metadata for DXIL version. (#88350)
Emit named metadata "dx.version" for DXIL version.

Default to DXIL 1.0
2024-05-08 06:40:06 -07:00
Craig Topper
2c20995781
[RISCV] Detect duplicate extensions in parseNormalizedArchString. (#91416)
This detects the same extension name being added twice. Mostly I'm
worried about the case that the same string appears with two different
versions. We will only preserve one of the versions.

We could allow the same version to be repeated, but that doesn't seem
useful at the moment.

I've updated addExtension to use map::emplace instead of
map::operator[]. This means we only keep the first version if there are
duplicates. Previously we kept the last version, but that shouldn't matter
now that we don't allow duplicates. parseArchString already doesn't allow
duplicates.
2024-05-07 20:56:55 -07:00
Craig Topper
6cba93f25d [RISCV] Add partial validation of S and X extension names to RISCVISAInfo::parseNormalizedArchString.
Extensions starting with 's' or 'x' should always be followed by an
alphabetical character.  I don't know of any crashes from this currently,
but it seemed better to be defensive.
2024-05-07 12:16:55 -07:00
S. Bharadwaj Yadavalli
178ff39500
Revert "[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version" (#91290)
Reverts llvm/llvm-project#90809

Need to investigate ASAN failures.
2024-05-06 22:21:37 -04:00
S. Bharadwaj Yadavalli
080978dd20
[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (#90809)
An earlier commit provided a way to decouple DXIL version from Shader
Model version by representing the DXIL version as `SubArch` in the DXIL 
Target Triple and adding corresponding valid DXIL Arch types.

This change constructs DXIL target triple with DXIL version that is
deduced from Shader Model version specified in the following scenarios:

1. When compilation target profile is specified: 
For e.g., DXIL target triple `dxilv1.8-unknown-shader6.8-library` is
constructed when `-T lib_6_8` is specified. 
2. When DXIL target triple without DXIL version is specified:
For e.g., DXIL target triple `dxilv1.8-pc-shadermodel6.8-library` is
constructed when `-mtriple=dxil-pc-shadermodel6.8-library` is specified.

Updated relevant HLSL tests that check for target triple. 

Validated that Clang (`check-clang`) and LLVM (`check-llvm`) regression
tests pass.
2024-05-06 18:33:57 -04:00
Craig Topper
0faf494200
[RISCV] Make parseArchString only accept [a-z0-9_]. (#90879)
Similar change was recently made to parseNormalizedArchString.
2024-05-03 09:29:27 -07:00
Craig Topper
7a6847e001
[RISCV] Add partial validation of Z extension name to RISCVISAInfo::parseNormalizedArchString (#90895)
If 'z' is given as the complete extension name or with a digit after it,
it will crash in the extension map compare function. Check for these
cases and give an error.
2024-05-03 09:29:11 -07:00
Craig Topper
5445a35d6e
[RISCV] Detect empty extension name after parsing MajorVersion in parseNormalizedArchString. (#90790)
If the string is just a version, we will end up adding an empty string
as an extension which crashes in the compare function for the std::map.
2024-05-02 10:08:35 -07:00
Craig Topper
941eab102f
[RISCV] Make parseNormalizedArchString only accept [a-z0-9_]. (#90815)
Previously we only rejected upper case characters. We should instead
reject anything except lower case, numbers, and underscore. Other
characters will likely confuse the extension sorting.
2024-05-02 09:39:52 -07:00
Craig Topper
ab8ac36f10
[RISCV] Add list of supported profiles to -print-supported-extensions (#90757)
I tried also printing the -march they correspond to, but it seemed
overly verbose and caused line wraps. It might be better if we remove
the versions numbers from the string or did a more intelligent line
wrap.
2024-05-02 08:18:02 -07:00
YunQiang Su
4b75fcf0a5
Triple::normalize: Use none as OS for XX-none-ABI (#89638)
When parsing a 3-component triple, after we determine Arch and Env, if
the middle component is "none", treat it as OS instead of Vendor.

See:
https://discourse.llvm.org/t/rfc-baremetal-target-triple-normalization/78524
Fixes: #89582.
2024-05-02 08:04:53 +08:00
Craig Topper
500dda049e [RISCV] Refactor version major version parsing in parseNormalizedArchString. NFC
Use an index variable and array indexing instead of manipulating
a temporary StringRef.
2024-05-01 14:56:56 -07:00
Craig Topper
a7e0798854
[RISCV] Use binary search to look up supported profiles. (#90767)
As the list of profiles grow, this will be a more efficient lookup.

Because the profile name is a prefix of the Arch string, we use
upper_bound to find the first profile that definitely comes after the
Arch string. If that isn't the first supported profile, we move back 1
profile and see if that profile is a prefix of our Arch string.
2024-05-01 14:56:14 -07:00
Craig Topper
cf3c714e4b
[RISCV] Merge RISCVISAInfo::updateFLen/MinVLen/MaxELen into a single function. (#90665)
This simplifies the callers.
2024-05-01 10:44:10 -07:00
Craig Topper
09f4b06dde
[RISCV] Refactor profile selection in RISCVISAInfo::parseArchString. (#90700)
Instead of hardcoding the 4 current profile prefixes, treat profile
selection as a fallback if we don't find "rv32" or "rv64".

Update the error message accordingly.
2024-05-01 10:39:24 -07:00
Craig Topper
05d04f0a05
[RISCV] Make RISCVISAInfo::updateMaxELen extension checking more robust. Add inference from V extension. (#90650)
We weren't fully checking that we parsed Zve*x/f/d correctly. This could
break if new extension is added that starts with Zve.

We were assuming the Zve64d is present whenever V is so we only
inferred from Zve*. It's more correct to infer ELEN from V itself too.
2024-04-30 13:49:05 -07:00
Craig Topper
f0cc373521 [RISCV] Drop unnecessary curly braces in RISCVISAInfo:parse*ArchString. NFC 2024-04-30 10:35:45 -07:00
Craig Topper
1b942ae384
[RISCV] Use consume_front to parse rv32/rv64 in RISCVISAInfo::parse*ArchString. NFC (#90562)
This replaces some starts_with calls wth consume_front. This allows us
to remove a later assumption that prefix was 4 characters. We would
eventually need to fix this anyway if we ever support rv128.

Noticed while reviewing the RISCVISAInfo code for other reasons.
2024-04-30 08:13:23 -07:00