1720 Commits

Author SHA1 Message Date
Paulo Matos
55aeb23fe0 [clang][WebAssembly] Implement support for table types and builtins
This commit implements support for WebAssembly table types and
respective builtins. Table tables are WebAssembly objects to store
reference types. They have a large amount of semantic restrictions
including, but not limited to, only being allowed to be declared
at the top-level as static arrays of zero-length. Not being arguments
or result of functions, not being stored ot memory, etc.

This commit introduces the __attribute__((wasm_table)) to attach to
arrays of WebAssembly reference types. And the following builtins to
manage tables:

* ref   __builtin_wasm_table_get(table, idx)
* void  __builtin_wasm_table_set(table, idx, ref)
* uint  __builtin_wasm_table_size(table)
* uint  __builtin_wasm_table_grow(table, ref, uint)
* void  __builtin_wasm_table_fill(table, idx, ref, uint)
* void  __builtin_wasm_table_copy(table, table, uint, uint, uint)

This commit also enables reference-types feature at bleeding-edge.

This is joint work with Alex Bradbury (@asb).

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D139010
2023-06-10 15:53:13 +02:00
Matt Arsenault
8a21ea1d0a clang: Start emitting intrinsic for __builtin_ldexp*
Also introduce __builtin_ldexpf16.
2023-06-06 17:07:19 -04:00
Matt Arsenault
eece6ba283 IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics
AMDGPU has native instructions and target intrinsics for this, but
these really should be subject to legalization and generic
optimizations. This will enable legalization of f16->f32 on targets
without f16 support.

Implement a somewhat horrible inline expansion for targets without
libcall support. This could be better if we could introduce control
flow (GlobalISel version not yet implemented). Support for strictfp
legalization is less complete but works for the simple cases.
2023-06-06 17:07:18 -04:00
Craig Topper
18ccca4da8 [UBSan] Consider zero input to __builtin_clz/ctz to be undefined independent of the target.
Previously we checked isCLZForZeroUndef and only added UBSan checks
if it returned true.

The builtin should be considered undefined for 0 regardless of
the target so that code using it is portable. The isCLZForZeroUndef
was only intended to disable optimizations in the middle end and
backend.

See https://discourse.llvm.org/t/should-ubsan-detect-0-input-to-builtin-clz-ctz-regardless-of-target/71060

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D152023
2023-06-02 13:01:05 -07:00
Jakub Chlanda
3e37c98bdb [cuda, NVPTX] Signed char and (unsigned)long builtins of ldg and ldu
Differential Revision: https://reviews.llvm.org/D151876
2023-06-02 09:10:19 +02:00
Kazu Hirata
46deb4092d [CodeGen] Use llvm::LLVMContext::MD_nontemporal (NFC) 2023-05-29 00:41:51 -07:00
Bryan Chan
9f6250f591 [Clang][AArch64][SME] Add vector load/store (ld1/st1) intrinsics
This patch adds support for the following SME ACLE intrinsics (as defined
in https://arm-software.github.io/acle/main/acle.html):

  - svld1_hor_za8      // also for _za16, _za32, _za64 and _za128
  - svld1_hor_vnum_za8 // also for _za16, _za32, _za64 and _za128
  - svld1_ver_za8      // also for _za16, _za32, _za64 and _za128
  - svld1_ver_vnum_za8 // also for _za16, _za32, _za64 and _za128
  - svst1_hor_za8      // also for _za16, _za32, _za64 and _za128
  - svst1_hor_vnum_za8 // also for _za16, _za32, _za64 and _za128
  - svst1_ver_za8      // also for _za16, _za32, _za64 and _za128
  - svst1_ver_vnum_za8 // also for _za16, _za32, _za64 and _za128

SveEmitter.cpp is extended to generate arm_sme.h (currently named
arm_sme_draft_spec_subject_to_change.h) and other SME definitions from
arm_sme.td, which is modeled after arm_sve.td. Common TableGen definitions
are moved into arm_sve_sme_incl.td.

Co-authored-by: Sagar Kulkarni <sagar.kulkarni1@huawei.com>

Reviewed By: sdesmalen, kmclaughlin

Differential Revision: https://reviews.llvm.org/D127910
2023-05-28 21:08:13 -04:00
Artem Belevich
25708b3df6 [NVPTX, CUDA] barrier intrinsics and builtins for sm_90
Differential Revision: https://reviews.llvm.org/D151363
2023-05-25 11:57:57 -07:00
Artem Belevich
0a0bae1e9f [CUDA] plumb through new sm_90-specific builtins.
Differential Revision: https://reviews.llvm.org/D151168
2023-05-25 11:57:56 -07:00
Qiu Chaofan
baeb85b5a9 [Clang] Support more stdio builtins
Add more builtins for stdio functions as in GCC, along with their
mutations under IEEE float128 ABI.

Reviewed By: tuliom

Differential Revision: https://reviews.llvm.org/D150087
2023-05-23 16:35:25 +08:00
eopXD
f4d70d68e7 [4/11][POC][Clang][RISCV] Define tuple type variant of vsseg2e32
For the cover letter of this patch-set, please checkout D146872.

Depends on D147731.

This is the 4th patch of the patch-set.

This patch is a proof-of-concept and will be extended to full coverage
in the future. Currently, the old non-tuple unit-stride segment store is
not removed, and only signed integer unit-strided segment store of NF=2,
EEW=32 is defined here.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D147774
2023-05-22 02:52:36 -07:00
Artem Belevich
6963c61f0f [NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*
The optional argument is needed for CUDA-11+ headers when we're compiling for
sm_80+ GPUs.

Differential Revision: https://reviews.llvm.org/D150820
2023-05-19 10:59:36 -07:00
Artem Belevich
0e43eb24bd Revert "[NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*"
Breaks MLIR which happens to be using the intrinsics.

This reverts commit e7b9c2f00fa04ef8d9b69ee0e36d7775823dbe6b.
2023-05-18 11:45:06 -07:00
Artem Belevich
e7b9c2f00f [NVPTX/CUDA] added an optional src_size argument to __nvvm_cp_async*
The optional argument is needed for CUDA-11+ headers when we're compiling for
sm_80+ GPUs.

Differential Revision: https://reviews.llvm.org/D150820
2023-05-18 11:05:44 -07:00
Qiu Chaofan
fa1f88cdec Reland "[PowerPC] Add target feature requirement to builtins"
This relands D143467 after fixing build failure with GCC.
2023-05-10 15:43:52 +08:00
Vitaly Buka
af88d34f05 Revert "[PowerPC] Add target feature requirement to builtins"
Breaks PPC bots, see D143467.

This reverts commit 651b0e2e7afca926c3d4f8d7f988db40b9832676.
2023-05-08 11:16:55 -07:00
Qiu Chaofan
651b0e2e7a [PowerPC] Add target feature requirement to builtins
Clang has mechanism to specify required target features of a built-in
function. This patch adds such definitions to Altivec, VSX, HTM,
PairedVec and MMA builtins.

This will help frontend to detect incompatible target features of
bulitin when using target attribute syntax.

Reviewed By: nemanjai, kamaub

Differential Revision: https://reviews.llvm.org/D143467
2023-05-08 17:53:25 +08:00
Rishabh Bali
0b3d737877 Check if First argument in _builtin_assume_aligned_ is of pointer type
Currently clang doesn't verify if the first argument in
`_builtin_assume_aligned` is of pointer type. This leads to an
assertion build failure. This patch aims to add a check if the first
argument is of pointer type or not and diagnose it with
diag::err_typecheck_convert_incompatible if its not of pointer type.

Fixes https://github.com/llvm/llvm-project/issues/62305
Differential Revision: https://reviews.llvm.org/D149514
2023-05-05 13:11:16 -04:00
4vtomat
fa43608d16 [RISCV][RISCV][clang] Split out SiFive Vector C intrinsics from riscv_vector.td
Since we don't always need the vendor extension to be in riscv_vector.td,
so it's better to make it be in separated header.

Depends on D148223 and D148680

Differential Revision: https://reviews.llvm.org/D148308
2023-05-02 05:51:51 -07:00
Piyou Chen
8a3950510f [RISCV] Support scalar/fix-length vector NTLH intrinsic with different domain
This commit implements the two NTLH intrinsic functions.

```
type __riscv_ntl_load (type *ptr, int domain);
void __riscv_ntl_store (type *ptr, type val, int domain);

```

```
enum {
  __RISCV_NTLH_INNERMOST_PRIVATE = 2,
  __RISCV_NTLH_ALL_PRIVATE,
  __RISCV_NTLH_INNERMOST_SHARED,
  __RISCV_NTLH_ALL
};
```

We encode the non-temporal domain into MachineMemOperand flags.

1. Create the RISC-V built-in function with custom semantic checking.
2. Assume the domain argument is a compile time constant,
and make it as LLVM IR metadata (nontemp_node).
3. Encode domain value as two bits MachineMemOperand TargetMMOflag.
4. According to MachineMemOperand TargetMMOflag, select corrsponding ntlh instruction.

Currently, it supports scalar type and fixed-length vector type.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D143364
2023-04-24 20:15:14 -07:00
Stoorx
42d758bfa6 [clang] Return std::string_view from TargetInfo::getClobbers()
Change the return type of `getClobbers` function from `const char*`
to `std::string_view`. Update the function usages in CodeGen module.

The reasoning of these changes is to remove unsafe `const char*`
strings and prevent unnecessary allocations for constructing the
`std::string` in usages of `getClobbers()` function.

Differential Revision: https://reviews.llvm.org/D148799
2023-04-24 12:16:54 +03:00
Jonas Paulsson
790c9ac529 [ClangFE] Handle statement expressions properly with CheckAtomicAlignment().
Make CheckAtomicAlignment() return the computed pointer for reuse to avoid
emitting it twice.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D148422
2023-04-18 19:33:32 +02:00
Craig Topper
0109f8d1e3 [AArch64] Use fneg instead of fsub -0.0, X Cin IR expansion of __builtin_neon_vfmsh_f16.
Addresses the FIXME and removes the only in tree use of
llvm::ConstantFP::getZeroValueForNegation for an FP type.

Reviewed By: dmgreen, SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D147497
2023-04-04 09:01:24 -07:00
Jakub Chlanda
ae3c981aa4 [NVPTX] Enforce half type support is present for builtins
Differential Revision: https://reviews.llvm.org/D146715
2023-03-28 08:48:10 +02:00
Mariusz Sikora
69061f9627 [AMDGPU] Add clang builtin for __builtin_amdgcn_ds_atomic_fadd_v2f16
Differential Revision: https://reviews.llvm.org/D146808
2023-03-24 16:27:44 +01:00
Bruno Cardoso Lopes
07ef7b1ff2 [Builtins] Add __builtin_assume_separate_storage
Plumbing from the language level to the assume intrinsics with
separate_storage operand bundles.

Patch by David Goldblatt (davidtgoldblatt)

Differential Revision: https://reviews.llvm.org/D136515
2023-03-23 16:35:30 -07:00
Paulo Matos
8d0c889752 [clang][WebAssembly] Initial support for reference type funcref in clang
This is the funcref counterpart to 890146b. We introduce a new attribute
that marks a function pointer as a funcref. It also implements builtin
__builtin_wasm_ref_null_func(), that returns a null funcref value.

Differential Revision: https://reviews.llvm.org/D128440
2023-03-17 18:31:44 +01:00
Jonas Paulsson
7501e53b8d [Clang] Give warning for an underaligned 128-bit __sync library call.
On SystemZ, int128 values are generally aligned to only 8 bytes per the ABI
while 128 bit atomic ISA instructions exist with a full 16 byte alignment
requirement.

__sync builtins are emitted as atomicrmw instructions which always require
the natural alignment (16 bytes in this case), and they always get it
regardless of the alignment of the value being addressed.

This patch improves this situation by giving a warning if the alignment is
not known to be sufficient. This check is done in CodeGen instead of in Sema
as this is currently the only place where the alignment can be computed. This
could/should be moved into Sema in case the alignment computation could be
made there eventually.

Reviewed By: efriedma, jyknight, uweigand

Differential Revision: https://reviews.llvm.org/D143813
2023-03-15 12:46:06 +01:00
Jakub Chlanda
7258317bad [NVPTX] Expose LDU builtins
Also check if native half types are supported to give more descriptive
error message, without it clang only reports incorrect intrinsic return
type.

Differential Revision: https://reviews.llvm.org/D145238
2023-03-15 08:41:45 +00:00
jinge90
b38aa29717 Add __builtin_set_flt_rounds
This builtin will be converted to llvm.set.rounding intrinsic
in IR level and should be work with "#pragma STDC FENV_ACCESS ON"
since it changes default FP environment. Users can change rounding
mode via this builtin without introducing libc dependency.

Reviewed by: andrew.w.kaylor, rjmccall, sepavloff, aaron.ballman
Differential Revision: https://reviews.llvm.org/D145765
Signed-off-by: jinge90 <ge.jin@intel.com>
2023-03-15 11:13:55 +08:00
Paul Walker
1597e5e693 [SVE][Builtins] Lower X forms of fp binop/mla arithmetic builtins to dedicated intrinsics
This patch changes the lowering for the following fp builtins to
emit calls to the new aarch64.sve.###.u intrinsics.
  svabd_x, svabd_n_x
  svadd_x, svadd_n_x
  svdiv_x, svdiv_n_x
  svdivr_x, svdivr_n_x
  svmad_x, svmad_n_x
  svmax_x, svmax_n_x
  svmaxnm_x, svmaxnm_n_x
  svmin_x, svmin_n_x
  svminnm_x, svminnm_n_x
  svmla_x, svmla_n_x
  svmls_x, svmls_n_x
  svmsb_x, svmsb_n_x
  svmul_x, svmul_n_x
  svmulx_x, svmulx_n_x
  svnmad_x, svnmad_n_x
  svnmla_x, svnmla_n_x
  svnmls_x, svnmls_n_x
  svnmsb_X, svnmsb_n_x
  svsub_x, svsub_n_x
  svsubr_x, svsubr_n_x

Depends on D143765.

Differential Revision: https://reviews.llvm.org/D143767
2023-03-12 11:32:00 +00:00
Joshua Batista
4c82050c56 Add codegen for llvm exp/exp2 elementwise builtins
Add codegen for llvm exp/exp2 elementwise builtin
The exp/exp2 elementwise builtins are necessary for HLSL codegen.
Tests were added to make sure that the expected errors are encountered when these functions are given inputs of incompatible types.
The new builtins are restricted to floating point types only.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D145270
2023-03-09 12:14:59 -08:00
Aaron Ballman
feec067982 Revert "Add __builtin_set_flt_rounds"
This reverts commit 24b823554acd25009731b2519880aa18c7263550.

These changes broke the PPC build bot.
2023-03-09 08:02:31 -05:00
jinge90
24b823554a Add __builtin_set_flt_rounds
This builtin will be converted to llvm.set.rounding intrinsic
in IR level and should be work with "#pragma STDC FENV_ACCESS ON"
since it changes default FP environment. Users can change rounding
mode via this builtin without introducing libc dependency.

Reviewed by: andrew.w.kaylor, rjmccall, sepavloff
Differential Revision: https://reviews.llvm.org/D144454
Signed-off-by: jinge90 <ge.jin@intel.com>
2023-03-09 11:52:52 +08:00
Jun Sha (Joshua)
a7d6593a0a Add missing roundtointegral builtin functions for some FP instructions to be generated from C-written codes
To generate FROUND instructions in https://reviews.llvm.org/D143982, we need to use llvm intrinsics in IR files. Now I add some corresponding builtin functions to make sure these roundtointegral instructions can be generated from C codes.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D144935
2023-03-07 14:17:35 +08:00
Jakub Chlanda
71b0658585 [NVPTX] Add f16 and v2f16 ldg builtins
Adds f16 and v2f16 ldg builtins and relevant tests.

Differential Revision: https://reviews.llvm.org/D144961
2023-03-03 12:49:18 +01:00
Matt Arsenault
8709bcacfb clang: Add __builtin_elementwise_fma
I didn't understand why the other builtins have promotion logic,
or how it would apply for a ternary operation. Implicit conversions
are evil to begin with,  and even more so when the purpose is to get
an exact IR intrinsic. This checks all the arguments have the same type.
2023-02-24 21:55:08 -04:00
Paulo Matos
890146b192 [WebAssembly] Initial support for reference type externref in clang
This patch introduces a new type __externref_t that denotes a WebAssembly opaque
reference type. It also implements builtin __builtin_wasm_ref_null_extern(),
that returns a null value of __externref_t. This lays the ground work
for further builtins and reference types.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D122215
2023-02-17 18:48:48 -08:00
Joshua Batista
836249b1c2 Add codegen for llvm log2/log10 elementwise builtins
Add codegen for llvm log2 / log10 elementwise builtin
The log2/log10 elementwise builtin is necessary for HLSL codegen.
Tests were added to make sure that the expected errors are encountered when these functions are given inputs of incompatible types.
The new builtins are restricted to floating point types only.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D143207
2023-02-07 12:23:48 -08:00
Archibald Elliott
b590f99712 [NFC][TargetParser] Remove llvm/Support/X86TargetParser.h 2023-02-07 11:06:00 +00:00
Vitaly Buka
bccf5999d3 Revert "[clang][WebAssembly] Initial support for reference type externref in clang"
Very likely breaks stage 3 of msan build bot.
Good: 764c88a50ac76a2df2d051a0eb5badc6867aabb6 https://lab.llvm.org/buildbot/#/builders/74/builds/17058
Looks unrelated: 48b5a06dfcab12cf093a1a3df42cb5b684e2be4c
Bad: 48b5a06dfcab12cf093a1a3df42cb5b684e2be4c https://lab.llvm.org/buildbot/#/builders/74/builds/17059

This reverts commit eb66833d19573df97034a81279eda31b8d19815b.
2023-02-05 21:41:48 -08:00
Paul Walker
893e331903 [SVE][Builtins] Lower X forms of binop arithmetic builtins to dedicated intrinsics.
This patch changes the lowering for the following builtins to emit
calls to the new aarch64.sve.###.u intrinsics.
  svabd_x
  svabd_n_x
  svadd_x
  svadd_n_x
  svasr_x
  svasr_n_x
  svdiv_x
  svdiv_n_x
  svdivr_x
  svdivr_n_x
  svlsl_x
  svlsl_n_x
  svlsr_x
  svlsr_n_x
  svmax_x
  svmax_n_x
  svmin_x
  svmin_n_x
  svmul_x
  svmul_n_x
  svmulh_x
  svmulh_n_x
  svsub_x
  svsub_n_x
  svsubr_x
  svsubr_n_x

Depends on D141938

Differential Revision: https://reviews.llvm.org/D141939
2023-02-05 12:28:27 +00:00
Archibald Elliott
8c712296fb [NFC][TargetParser] Remove llvm/Support/AArch64TargetParser.h
Removes the forwarding header `llvm/Support/AArch64TargetParser.h`.

I am proposing to do this for all the forwarding headers left after
rGf09cf34d00625e57dea5317a3ac0412c07292148 - for each header:
- Update all relevant in-tree includes
- Remove the forwarding Header

Differential Revision: https://reviews.llvm.org/D140999
2023-02-03 17:34:01 +00:00
ManuelJBrito
450a4612c3 [Clang] Add builtin_nondeterministic_value
Differential Revision: https://reviews.llvm.org/D142388
2023-02-03 09:47:46 +00:00
Joshua Batista
26eb70820f Add builtin_elementwise_log
Add codegen for llvm log elementwise builtin
The log elementwise builtin is necessary for HLSL codegen.
Tests were added to make sure that the expected errors are encountered when these functions are given inputs of incompatible types.
The new builtin is restricted to floating point types only.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D140489
2023-02-02 11:36:22 -08:00
Nico Weber
adf7ffd51e Revert "[Clang] Add builtin_nondeterministic_value"
This reverts commit 4a1832a5c801a61bf4c30891aaebe63993712fd9.
Test fail on (at least) macOS and Windows, see
https://reviews.llvm.org/D142388#4099441
2023-02-02 08:59:27 -05:00
ManuelJBrito
4a1832a5c8 [Clang] Add builtin_nondeterministic_value
Differential Revision: https://reviews.llvm.org/D142388
2023-02-02 11:14:17 +00:00
Paulo Matos
eb66833d19 [clang][WebAssembly] Initial support for reference type externref in clang
This patch introduces a new type __externref_t that denotes a WebAssembly opaque
reference type. It also implements builtin __builtin_wasm_ref_null_extern(),
that returns a null value of __externref_t. This lays the ground work
for further builtins and reference types.

Differential Revision: https://reviews.llvm.org/D122215
2023-01-31 17:34:01 +01:00
Matt Arsenault
52c28d7cf9 clang/OpenCL: Don't use a Function for the block type
The AMDGPU value for this is not really a function. Currently we're
emitting IR that isn't true to what will eventually be emitted.
2023-01-30 15:03:14 -04:00
Alexander Shaposhnikov
0fd9c37d8c [Clang] Treat std::forward_like as builtin
This diff extends D123345 by adding support for std::forward_like.

Test plan: ninja check-clang check-clang-tools check-llvm

Differential revision: https://reviews.llvm.org/D142430
2023-01-29 00:13:46 +00:00