363 Commits

Author SHA1 Message Date
Christian Ulmann
48b126e30b [mlir][llvm] Ensure immediate usage in intrinsics
This commit changes intrinsics that have immarg parameter attributes to
model these parameters as attributes, instead of operands. Using
operands only works if the operation is an `llvm.mlir.constant`,
otherwise the exported LLVMIR is invalid.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D151692
2023-06-12 06:57:42 +00:00
Jan Sjodin
f6a631d406 [MLIR] Remove dependency on omp dialect in LLVM dialect.
This fixes a buildbot failure where the dependency on the omp dialect
in the LLVM dialect caused error. Instead of accessing the interface
defined in the omp dialect we directly access the attributes
instead. To make this work the IsDeviceAttr is removed and replaced
with a BoolAttr instead.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D151745
2023-05-31 08:40:22 -05:00
Tobias Gysi
8e9baa9668 [mlir][llvm] Add alias and access group info to call.
The revision adds the alias analysis and access group
interfaces to the call operation.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D151693
2023-05-31 06:48:59 +00:00
Lukas Sommer
2582b2e3ac [mlir][llvm] Add LLVM TargetExtType
Add support for the `llvm::TargetExtType` to the MLIR LLVM dialect.

Target extension types were introduced to represent target-specific types, which are opaque to the compiler and optimizations.

The patch also enforces some of the constraints defined for the target extension type in the LLVM language reference manual.

Signed-off-by: Lukas Sommer <lukas.sommer@codeplay.com>

Reviewed By: ftynse, gysit, Dinistro

Differential Revision: https://reviews.llvm.org/D151446
2023-05-30 15:55:45 +00:00
Lukas Sommer
df37e2211e [mlir][llvm] Add thread-local address intrinsic
Add the `llvm.threadlocal.address` intrinsic to the LLVM dialect.

Signed-off-by: Lukas Sommer <lukas.sommer@codeplay.com>

Reviewed By: gysit, zero9178

Differential Revision: https://reviews.llvm.org/D151566
2023-05-30 06:51:27 +00:00
Lukas Sommer
196d89740c [mlir][llvm] Add rounding intrinsics
Add some of the missing libm rounding intrinsics to the LLVM dialect:
* `llvm.rint`
* `llvm.nearbyint`
* `llvm.lround`
* `llvm.llround`
* `llvm.lrint`
* `llvm.llrint`

Differential Revision: https://reviews.llvm.org/D151558
2023-05-29 18:13:08 +02:00
Cullen Rhodes
7d4659095a [mlir][llvm] Add arm_streaming LLVM function attributes
This patch adds two optional attributes to 'llvm.func' op for the Armv9
Streaming SVE (SSVE) mode [1] that map 1-1 with LLVM function attributes [2]:

  * arm_streaming -> aarch64_pstate_sm_enabled
  * arm_locally_streaming -> aarch64_pstate_sm_body

Streaming-mode is part of the interface (ABI) for functions with the
first attribute and it's the responsibility of the caller to manage
PSTATE.SM on entry/exit to functions with this attribute [3]. The LLVM
backend will emit 'smstart sm' / 'smstop sm' [4] around calls to
streaming functions.

In locally streaming functions PSTATE.SM is kept internal and managed by
the callee on entry/exit. The LLVM backend will emit 'smstart sm' /
'smstop sm' in the prologue / epilogue for functions with this
attribute.

The integration test for SSVE has been updated to no longer use the
passthrough mechanism that's intended for prototyping.

PATCH [1 / 2] in series for RFC: https://discourse.llvm.org/t/rfc-supporting-armv9-scalable-matrix-extension-sme-streaming-sve-ssve-mode-in-mlir/70678

[1] https://developer.arm.com/documentation/ddi0616/aa
[2] https://llvm.org/docs/AArch64SME.html#introduction
[3] https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#671pstatesm-interfaces
[4] https://developer.arm.com/documentation/ddi0602/2023-03/Base-Instructions/SMSTART--Enables-access-to-Streaming-SVE-mode-and-SME-architectural-state--an-alias-of-MSR--immediate--

Reviewed By: awarzynski, dcaballe, WanderAway

Differential Revision: https://reviews.llvm.org/D150932
2023-05-25 09:20:35 +00:00
Kiran Chandramohan
b655d59ce2 [MLIR][OpenMP] Set AllocaIP correctly for constructs nested in task
Fixes #60874

Reviewed By: psoni2628, NimishMishra

Differential Revision: https://reviews.llvm.org/D151027
2023-05-22 10:48:03 +00:00
Dominik Adamski
bed7e00cb1 [MLIR][OpenMP][OMPIRBuilder] Lower OpenMP version attributes to LLVM IR
MLIR version attribute should be lowered to LLVM IR module metadata.
The lowering is done by OpenMPIRBuilder.

Differential Revision: https://reviews.llvm.org/D150574

Reviewed By: kiranchandramohan
2023-05-19 06:44:20 -05:00
Kiran Chandramohan
35eb57dea5 Revert "[mlir] Fix memory explosion when converting global variable bodies in ModuleTranslation"
Reverting due to failure in spec cam4 benchmark. See github issue
https://github.com/llvm/llvm-project/issues/62802 for details.

This reverts commit 095e6ac9fd92d03dcb1e19b60cb06a8140aae69d.
2023-05-19 11:33:46 +00:00
Sergio Afonso
06b3f6086c [Flang][OpenMP][OMPIRBuilder] Add lowering of TargetOp for device codegen
This patch adds support in the `OpenMPIRBuilder` for generating working
device code for OpenMP target regions. It generates and handles the
result of a call to `__kmpc_target_init()` at the beginning of the
function resulting from outlining each target region, and it also
generates the matching `__kmpc_target_deinit()` call before returning.

It relies on the implementation of target region outlining for host
codegen to handle the production of the new function and the lowering of
its body based on the contents of the associated target region.

Depends on D147172

Differential Revision: https://reviews.llvm.org/D147940
2023-05-18 15:14:03 +01:00
Tobias Gysi
c04cf58dfc [mlir][llvm] Saturation arithmetic intrinsics.
Add the saturation arithmetic intrinsics to the LLVM dialect.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D150676
2023-05-17 06:28:20 +00:00
Tobias Gysi
429582d946 [mlir][llvm] Add is constant intrinsic.
The revision adds LLVM's is constant intrinsic.

Depends on D150643

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D150660
2023-05-16 13:16:02 +00:00
Tobias Gysi
4af2458505 [mlir][llvm] Add expect intrinsics.
The revision adds the LLVM expect and expect.with.probability
intrinsics.

Reviewed By: Dinistro, ftynse

Differential Revision: https://reviews.llvm.org/D150643
2023-05-16 11:06:45 +00:00
Tung D. Le
095e6ac9fd [mlir] Fix memory explosion when converting global variable bodies in ModuleTranslation
There is memory explosion when converting the body or initializer region of a large global variable, e.g. a constant array.

For example, when translating a constant array of 100000 strings:
```
llvm.mlir.global internal constant @cats_strings() {addr_space = 0 : i32, alignment = 16 : i64} : !llvm.array<100000 x ptr<i8>> {
    %0 = llvm.mlir.undef : !llvm.array<100000 x ptr<i8>>
    %1 = llvm.mlir.addressof @om_1 : !llvm.ptr<array<1 x i8>>
    %2 = llvm.getelementptr %1[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
    %3 = llvm.insertvalue %2, %0[0] : !llvm.array<100000 x ptr<i8>>
    %4 = llvm.mlir.addressof @om_2 : !llvm.ptr<array<1 x i8>>
    %5 = llvm.getelementptr %4[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
    %6 = llvm.insertvalue %5, %3[1] : !llvm.array<100000 x ptr<i8>>
    %7 = llvm.mlir.addressof @om_3 : !llvm.ptr<array<1 x i8>>
    %8 = llvm.getelementptr %7[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
    %9 = llvm.insertvalue %8, %6[2] : !llvm.array<100000 x ptr<i8>>
    %10 = llvm.mlir.addressof @om_4 : !llvm.ptr<array<1 x i8>>
    %11 = llvm.getelementptr %10[0, 0] : (!llvm.ptr<array<1 x i8>>) -> !llvm.ptr<i8>
    %12 = llvm.insertvalue %11, %9[3] : !llvm.array<100000 x ptr<i8>>

    ... (ignore the remaining part)
}
```

where `@om_1`, `@om_2`, ... are string global constants.

Each time an operation is converted to LLVM, a new constant is created.
When it comes to `llvm.insertvalue`, a new constant array of 100000 elements is created and the old constant array (input) is not destroyed.
This causes memory explosion. We observed that, on a system with 128 GB memory, the translation of 100000 elements got killed due to using up all the memory.
On a system with 64 GB, 65536 elements was enough to cause the translation killed.

This patch fixes the issue by checking generated constants and destroyed them if there is no use.
By the fix, the translation of 100000 elements only takes about 1.6 GB memory, and finishes without any error.

Reviewed By: ftynse, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D148487
2023-05-16 10:37:33 +00:00
Tobias Gysi
f7cd55f56e [mlir][llvm] Improve LLVM IR constant import.
Improve the constant import to handle zeroinitializer as well as
additional float types such as quad floats. The logic got restructured
to avoid creating intermediate dense element attributes when
constructing multi-dimensional arrays. Additionally, we also leverage
the fact that we do not need to iterate all elements of splat constants.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D150274
2023-05-11 12:45:45 +00:00
Valentin Clement
46e1b095c9
[mlir][openacc] Cleanup acc.data from old data clause operands
Since the new data operand operations have been added in D148389 and
adopted on acc.data in D149673, the old clause operands are no longer
needed.

The LegalizeDataOpForLLVMTranslation will become obsolete when all
operations will be cleaned. For the time being only the appropriate
part are being removed.

processOperands will also receive some updates once all the operands
will be coming from an acc data operand operation.

Reviewed By: razvanlupusoru

Differential Revision: https://reviews.llvm.org/D150155
2023-05-09 13:21:37 -07:00
Valentin Clement
15a480c05e
[mlir][openacc] Cleanup acc.exit_data from old data clause operands
Since the new data operand operations have been added in D148389 and
adopted on acc.exit_data in D149601, the old clause operands are no longer
needed.

The LegalizeDataOpForLLVMTranslation will become obsolete when all
operations will be cleaned. For the time being only the appropriate
part are being removed.

processOperands will also receive some updates once all the operands
will be coming from an acc data operand operation.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D150145
2023-05-09 11:36:48 -07:00
Valentin Clement
9dec07f44a
[mlir][openacc] Cleanup acc.enter_data from old data clause operands
Since the new data operand operations have been added in D148389 and
adopted on acc.enter_data in D148721, the old clause operands are no longer
needed.

The LegalizeDataOpForLLVMTranslation will become obsolete when all
operations will be cleaned. For the time being only the appropriate
part are being removed.

processOperands will also receive some updates once all the operands
will be coming from an acc data operand operation.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D150132
2023-05-09 09:01:30 -07:00
Valentin Clement
689afa88ae
[mlir][openacc] Cleanup acc.update from old data clause operands
Since the new data operand operations have been added in D148389 and
adopted on acc.update in D149909, the old clause operands are no longer
needed. This is a first patch to start cleaning the OpenACC operations
with data clause operands.

The `LegalizeDataOpForLLVMTranslation` will become obsolete when all
operations will be cleaned. For the time being only the appropriate
part are being removed.

`processOperands` will also receive some updates once all the operands
will be coming from an acc data operand operation.

Reviewed By: razvanlupusoru, jeanPerier

Differential Revision: https://reviews.llvm.org/D150053
2023-05-08 10:03:28 -07:00
Mehdi Amini
7151b94ce2 Adopt Properties to store operations inherent Attributes in the LLVM dialect
This is part of an on-going migration to adopt Properties inside MLIR.

Differential Revision: https://reviews.llvm.org/D148300
2023-05-08 04:28:12 -07:00
Christian Ulmann
62d7d94c2e [mlir][LLVM] Support locations in loop annotation
This commit introduces support for locations as part of the loop
annotation attribute. These locations indicate the start and the end of
the loop.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D149858
2023-05-05 07:54:22 +00:00
Krzysztof Drewniak
98c1104d41 [mlir][AMDGPU] Define atomic compare-and-swap for raw buffers
This commit adds the buffer cmpswap intrinsic to the ROCDL dialect and
its corresponding AMDGPU dialect wrappers.

Reviewed By: nirvedhmeshram

Differential Revision: https://reviews.llvm.org/D148722
2023-05-03 21:11:20 +00:00
Victor Perez
b8064c1a03 [mlir][llvm] Add trap intrinsics to the dialect
Define llvm.trap, llvm.debugtrap, and llvm.ubsantrap intrinsics in the
llvm dialect.

Signed-off-by: Victor Perez <victor.perez@codeplay.com>

Differential Revision: https://reviews.llvm.org/D149574
2023-05-02 10:09:31 +01:00
Akash Banerjee
1ed522623d [MLIR][OpenMP] Use inlineConvertOmpRegions for targetData conversion
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Reviewed By: TIFitis

Differential Revision: https://reviews.llvm.org/D149153
2023-04-27 15:45:54 +00:00
Andrew Gozillon
6d0ca5ae4c [MLIR][OpenMP][test] Update omp::FlagsAttr tests to only use CHECK tests
The CHECK-NOT tests were incorrect and impacting the other
tests flag tests negatively, they'd pass as false positives.
2023-04-27 09:23:39 -05:00
Jan Sjodin
28d85d207f [OpenMP][Flang][MLIR] Add lowering of TargetOp for host codegen to LLVM-IR
Fix uninitialied value use introduced in d3f9388ffb889d2ef512a17b9c4d37d09f03c693
2023-04-26 16:42:55 -04:00
Jan Sjodin
d3f9388ffb [OpenMP][Flang][MLIR] Add lowering of TargetOp for host codegen to LLVM-IR
This patch adds lowering of TargetOps for the host. The lowering outlines the
target region function and uses the OpenMPIRBuilder support functions to emit
the function and call. Code generation for offloading will be done in later
patches.

Reviewed By: kiranchandramohan, jdoerfert, agozillon

Differential Revision: https://reviews.llvm.org/D147172
2023-04-26 12:51:31 -04:00
Victor Perez
d67901dd2d [mlir][llvm] Use cached constants when importing landingpad instructions
Not using cached constants when importing instructions may lead to
undesired results, as breaking dominance rules in the translated MLIR
module.

Signed-off-by: Victor Perez <victor.perez@codeplay.com>

Differential Revision: https://reviews.llvm.org/D149247
2023-04-26 14:32:04 +01:00
Victor Perez
8cf970faac [mlir][llvm][test] Move exception-related tests to their own file
Move mlir-translate exception-related tests from basic.ll to exception.ll.

Signed-off-by: Victor Perez <victor.perez@codeplay.com>

Differential Revision: https://reviews.llvm.org/D149043
2023-04-25 14:59:25 +01:00
Cullen Rhodes
c8d1388e6c [mlir][ArmSME] Add tests for Streaming SVE
This patch adds a couple of tests for targeting Arm Streaming SVE (SSVE)
mode, part of the Arm Scalable Matrix Extension (SME).

SSVE is enabled in the backend at the function boundary by specifying
the `aarch64_pstate_sm_enabled` attribute, as documented here [1]. SSVE
can be targeted from MLIR by specifying this in the passthrough
attributes [2] and compiling with

  -mattr=+sme,+sve -force-streaming-compatible-sve

The passthrough will propagate to the backend where `smstart/smstop`
will be emitted around the call to the SSVE function.

The set of legal instructions changes in SSVE,
`-force-streaming-compatible-sve` avoids the use of NEON entirely and
instead lowers to (streaming-compatible) SVE. The behaviour this flag
predicates will be hooked up to the function attribute in the future
such that simply specifying this (should) lead to correct
code-generation.

Two tests are added:

  * A basic LLVMIR test verifying the attribute is passed through.
  * An integration test calling a SSVE function.

The integration test can be run with QEMU.

[1] https://llvm.org/docs/AArch64SME.html
[2] https://mlir.llvm.org/docs/Dialects/LLVM/#attribute-pass-through

Reviewed By: awarzynski, aartbik

Differential Revision: https://reviews.llvm.org/D148111
2023-04-25 07:51:43 +00:00
Tobias Gysi
6600301c2f [mlir][llvm] Improve access group import handling.
In particular, do not drop all access groups of a loop annotation
if one of them is unused. This change makes the access group import
robust against stale access group references in loop metadata.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D148791
2023-04-20 11:32:22 +00:00
Andrew Gozillon
50639d3d0d [OpenMP][MLIR] Add lowering of omp::FlagsAttr to LLVM-IR
The omp::FlagsAttr contains OpenMP RTL flags
given by a user to the compiler and a frontend
(flang currently) then populates the omp::FlagsAttr
which will then lower these to LLVM globals
which are utilised by the OpenMP runtime.

Reviewers: jdoerfert

Differential Revision: https://reviews.llvm.org/D147344
2023-04-19 08:31:26 -05:00
Victor Perez
be717f0a49 [mlir][llvm] Handle invoke op branching to block with its result as an argument
In LLVM, having an invoke instruction branching to a block with a phi
node receiving the invoke instruction result as an argument is
perfectly legal. However, the translation of this construct to MLIR
would result in an invoke with its result being used as a block
argument to a successor, i.e., the operation result would be used in
its definition.

In order to fix this issue due to different IR structures (phi nodes
vs block arguments), this construct is interpreted with an llvm.invoke
operation branching to a dummy block having a single llvm.br operation
passing the required block arguments (including the result of the
llvm.invoke operation) to the actual successor block.

Differential Revision: https://reviews.llvm.org/D148313
2023-04-18 10:54:02 +01:00
Christian Ulmann
3f4d16018d [mlir][llvm] Fix bswap naming (NFC)
As pointed out in https://reviews.llvm.org/D147711#inline-1427665, the
bswap intrinsic is called byteswap, not bitswap.
2023-04-07 16:22:59 +02:00
Christian Ulmann
5b7881b0b3 [mlir][llvm] Add missing bit manipulation intrs
This commit adds three missing bit manipulation intrinsics.
LangRef: https://llvm.org/docs/LangRef.html#bit-manipulation-intrinsics

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D147711
2023-04-07 14:46:45 +02:00
Tobias Gysi
9d69bca187 [mlir] Add stack alignment to the data layout dialect.
The revision adds the stack alignment to the
data layout dialect and it extends the LLVM dialect
import and export to support the new data layout
entry.

One possible use case for the flag is the LLVM dialect
inliner. The LLVM inliner queries the flag to
determine if it is safe to update the alignment of an
existing alloca. We may want to perform the same
optimization inside of MLIR.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D147332
2023-04-03 06:58:37 +00:00
Tobias Gysi
9d2b84ef62 [mlir][llvm] Import pointer data layout specification.
The revision moves the data layout parsing into a separate file
and extends it to support pointer data layout specifications.
Additionally, it also produces more precise warnings and error
messages.

Reviewed By: Dinistro, definelicht

Differential Revision: https://reviews.llvm.org/D147170
2023-03-31 11:53:04 +00:00
Tobias Gysi
8ac014ae05 [mlir][llvm] Keep unhandled constant test.
Add the more precise error message introduced in
https://reviews.llvm.org/D142337 to the standard
error produced for unhandled constants. This way
we keep testing both error cases.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D147205
2023-03-31 06:08:34 +00:00
Théo Degioanni
a35f9c6e08 [mlir][llvm] Add poison constant.
This patch introduces the poison constant from LLVM in the LLVM IR dialect. It also adds import and export support for it, along with roundtrip tests.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D146631
2023-03-23 07:58:56 +01:00
Tobias Gysi
56d94a90db [mlir][llvm] Add experimental alias scope decl intrinsic.
The revision adds the llvm.experimental.noalias.scope.decl intrinsic
to the LLVM dialect and updates the import and export accordingly.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D146504
2023-03-22 10:21:09 +01:00
Akash Banerjee
2d373e4dc7 [MLIR][OpenMP] Added OMPIRBuilder support for Target Data directives
This patch adds OpenMP IRBuilder support for the Target Data directives to allow lowering to LLVM IR.

The mlir::Translation is responsible for generating supporting code for processing the map_operands through the processMapOperand function, and also generate code for the r>

The OMPIRBuilder is responsible for generating the begin and end mapper function calls.

Limitations:
        - use_device_ptr and use_device_addr clauses are NOT supported for Target Data operation.
        - nowait clauses are NOT supported for Target Enter and Exit Data operations.
        - Only LLVMPointerType is supported for map_operands.

Differential Revision: https://reviews.llvm.org/D142914
2023-03-20 18:48:21 +00:00
Artem Belevich
a7cf2892e9 [MLIR] Do not hardcode attribute indexes in intrinsic decls
We're not checking the attributes themselves, so hardcoded attribute numbers
only make the tests more fragile, without improving the testing.

Differential Revision: https://reviews.llvm.org/D146334
2023-03-17 15:02:26 -07:00
Jeff Niu
79afa58c27 [mlir][llvm] Add fastmathFlags to SelectOp
`select` has fastmath flags, which were missing from the LLVM dialect op
definition.

Reviewed By: ftynse, dcaballe, gysit

Differential Revision: https://reviews.llvm.org/D145829
2023-03-16 08:57:52 +01:00
Christian Ulmann
6628767e47 [mlir][llvm] Add visibility attribute
This commit introduces the LLVM's visibility attribute and adds it to
both globals and functions.

Furthermore, this commit ensures that "thread_local" is printed in the
correct place and adds a test for that.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D145790
2023-03-12 10:31:29 +01:00
Brandon Myers
85fe8e01a0 [mlir] Add mlir::LLVM::FastmathFlags to LLVM instrinsic vector reductions
Rationale:
The LLVM dialect supports passing fastmath flags from floating point ops to LLVMIR instructions. However, not all LLVM ops have the required attribute. This change adds support for fastmath flags to `llvm.intr.vector.reduce.{fmin,fmax}`. One scenario where this is useful is in lowering llvm.intr.vector.reduce.{fmax,fmin} to LLVMIR with `nnan` (NoNans) flag so it may be [[ 115c7beda7/llvm/lib/CodeGen/ExpandReductions.cpp (L159) | lowered to a shuffle reduction ]].

Changes:

  - Make `LLVM_VecReductionF` implement the `FastmathFlagsInterface`; change is modeled on `LLVM_UnaryIntrOpF`
  - Add an assembly format for `LLVM_VecReductionF` ops. The purpose is to keep existing functionality: avoid printing the fastmath flags attribute when it has its default value (`none`). Change is modeled on `LLVM_UnaryIntrOpBase`

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D145692
2023-03-10 09:14:16 -08:00
Eugene Zhulenev
faf697e49b [mlir] Add support for f8 data types to LLVM dialect types
This change allows using fp8 pointers when exporting to LLVM, because we anyway export them as opaque pointers, however full support of fp8 types is not yet implemented on the LLVM side.

Differential Revision: https://reviews.llvm.org/D143008
2023-03-09 18:52:36 -08:00
Théo Degioanni
ac2a60613f [mlir][llvm] Add inalloca attribute to alloca op.
This revision adds the inalloca attribute to the alloca operation in the LLVMIR dialect.
It also adds tests for import and export.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D145483
2023-03-09 08:20:54 +01:00
J. Ryan Stinnett
ede0fbb19a [DebugInfo] Remove dbg.addr from MLIR
Part of `dbg.addr` removal
Discussed in https://discourse.llvm.org/t/what-is-the-status-of-dbg-addr/62898

Differential Revision: https://reviews.llvm.org/D144796
2023-03-02 09:29:43 +00:00
Tobias Gysi
b30422eac5 [mlir][llvm] Add AliasAnalysis and AccessGroup interfaces to intrinsics.
This revision updates the memcpy, memove, and memset intrinsics to
implement the AliasAnalysis and AccessGroup interfaces. The changes
will enable the import and export of alias scope, tbaa, and
access group metadata attached to these intrinsics. It also
renames the requiresAliasScope flag to requiresAliasAnalysis since
the intrinsics also support tbaa and not only access scope metadata.

The revision still maintains the string based attribute lookup
in the translation from MLIR to LLVMIR. Using the interfaces
instead of the string based lookup is left to a followup revision.

Depends on D144851

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D144965
2023-03-02 10:21:37 +01:00