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3 Commits

Author SHA1 Message Date
Matt Arsenault
fa5f767a38 AMDGPU: Improve splitting 64-bit bit ops by constants 
This addresses a TODO to handle operations besides and. This
also starts eliminating no-op operations with a constant that
can emerge later.

llvm-svn: 281488
 2016-09-14 15:19:03 +00:00
Matt Arsenault
a65e6b8335 AMDGPU: Remove brev intrinsic 
llvm-svn: 275620
 2016-07-15 21:27:13 +00:00
Matt Arsenault
d079285e05 AMDGPU: Use generic bitreverse intrinsic 
Also fix bug in vector legalization for bitreverse.

llvm-svn: 255512
 2015-12-14 17:25:38 +00:00