27 Commits

Author SHA1 Message Date
Sergei Barannikov
a479be0f39 [MC] Change tryParseRegister to return ParseStatus (NFC)
This finishes the work of replacing OperandMatchResultTy with
ParseStatus, started in D154101.
As a drive-by change, rename some RegNo variables to just Reg
(a leftover from the days when RegNo had 'unsigned' type).
2023-09-06 10:28:12 +03:00
wanglei
d6675b6a61 [LoongArch] Add definition for LVZ/LBT instructions
This patch defines the `LVZ` and `LBT` extension instructions, which
provide enough definitions for llvm-mc and llvm-objdump to correctly
handle these instructions.

It also defines the `SCR` (Scratchpad Register) register class, which
are used by the `LBT` extension instructions.

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D155917
2023-07-24 13:11:02 +08:00
wanglei
1aa3b64ed2 [LoongArch] Add definition for LSX instructions
This patch adds the definition for the `LSX` registers and instructions.
It also adds handling for new immediate operands in the AsmParser. This
patch ensures that llvm-mc and llvm-objdump correctly handle the `LSX`
instructions.

We expand those pseudo-instructions `vrepli.{b,h,w,d}` in the
MCCodeEmitter. This increases the readability of the output when
generating assembly files.

Reviewed By: SixWeining

Differential Revision: https://reviews.llvm.org/D154183
2023-07-07 11:21:53 +08:00
Sergei Barannikov
fda24e86a5 [MC/AsmParser] Remove no-op overrides of parseDirective (NFC)
Remove overrides of parseDirective that unconditionally return NoMatch.
This is what the base implementation does.

This is a follow-up to D154101 based on post-commit review feedback.
2023-07-05 00:01:55 +03:00
Sergei Barannikov
cc6fabf44e [LoongArch] Replace OperandMatchResultTy with ParseStatus (NFC)
ParseStatus is slightly more convenient to use due to implicit
conversion from bool, which allows to do something like:
```
  return Error(L, "msg");
```
when with MatchOperandResultTy it had to be:
```
  Error(L, "msg");
  return MatchOperand_ParseFail;
```
It also has more appropriate name since parse* methods are not only for
parsing operands.

Reviewed By: xen0n

Differential Revision: https://reviews.llvm.org/D154318
2023-07-04 22:26:34 +03:00
Sergei Barannikov
af20c1c129 [MC] Add three-state parseDirective as a replacement for ParseDirective
Conventionally, parsing methods return false on success and true on
error. However, directive parsing methods need a third state: the
directive is not target specific. AsmParser::parseStatement detected
this case by using a fragile heuristic: if the target parser did not
consume any tokens, the directive is assumed to be not target-specific.

Some targets fail to follow the convention: they return success after
emitting an error or do not consume the entire line and return failure
on successful parsing. This was partially worked around by checking for
pending errors in parseStatement.

This patch tries to improve the situation by introducing parseDirective
method that returns ParseStatus -- three-state class. The new method
should eventually replace the old one returning bool.

ParseStatus is intentionally implicitly constructible from bool to allow
uses like `return Error(Loc, "message")`. It also has a potential to
replace OperandMatchResulTy as it is more convenient to use due to the
implicit construction from bool and more type safe.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D154101
2023-07-01 04:33:28 +03:00
Fangrui Song
f03a16e633 [LoongArch] Use parseOptionalToken. NFC 2023-06-15 12:01:16 -07:00
wanglei
3b78065e30 [LoongArch] Handle out-fo-range uimm8 operands in LoongArchAsmParser
With this fix, when encountering an out-of-range uimm8 operand, the code
now triggers an appropriate error message, clearly indicating that the
immediate value must be an integer within the range of 0 to 255.
2023-05-19 09:38:49 +08:00
Craig Topper
7ad4b2622a [RISCV][CSKY][Loong] Pass Twine by const reference instead of by value. NFC
I think RISCV was the original here and the CSKY and Loong copied it.
2023-04-26 10:43:55 -07:00
WANG Xuerui
af6c43c8e9 [LoongArch] Allow %pc_lo12 relocs in JIRL's immediate operand position
Currently, gcc-13 will generate such assembly when `-mcmodel=medium`,
which is ostensibly a dirty hack to allow bigger offsets for extern
function calls without having to add more reloc types. This is not the
best way to accomplish the original goal, but such usages will appear
soon and we have to support it anyway.

Example:

```c
extern int foo(int);

int bar(int x) {
    return foo(x + 123);
}
```

will produce the following (simplified) assembly when compiled with
`-O2 -mcmodel=medium`:

```
    .globl  bar
    .type   bar, @function
bar:
    .cfi_startproc
    addi.w  $r4,$r4,123
    pcalau12i   $r12,%pc_hi20(foo)
    jirl    $r0,$r12,%pc_lo12(foo)
    .cfi_endproc
```

Reviewed By: SixWeining, wangleiat, MaskRay, xry111

Differential Revision: https://reviews.llvm.org/D142278
2023-01-22 18:49:29 +08:00
Sergei Barannikov
6ae84d668f [MC] Use MCRegister instead of unsigned in MCInstPrinter (NFC)
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D140654
2023-01-17 22:39:39 +03:00
Weining Lu
43cf2f8103 [LoongArch] Refine the condition to return Match_RequiresAMORdDifferRkRj in AsmParser. NFC
This can suppress compilation warning like `enumerated mismatch in conditional expression`.

See:
https://lab.llvm.org/staging/#/builders/236/builds/645/steps/6/logs/warnings__1_
2023-01-11 17:16:21 +08:00
Sergei Barannikov
4d48ccfc88 [MC] Use MCRegister instead of unsigned in MCTargetAsmParser
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D140273
2022-12-18 12:12:05 -08:00
wanglei
899226adac [LoongArch] Add custom parser for atomic instructions' memory operand
In order to be compatible with the form of the atomic instruction in
GAS that accepts the fourth operand as 0 (i.e. `am* $rd, $rk, $rj, 0`),
we need to treat `$rj, 0` as one operand, but only print `$rj`.

For this, the number of result operands of inline assembly memory
operand `ZB` constraint is modified to 2 (reg + 0).

Restrictions on register usage in `am*` instructions have also been
adjusted. When `$rd` is equal to `$r0`, the instruction must be
considered legal, because of some special usage like `PseudoUNIMP`.

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D139303
2022-12-13 11:46:53 +08:00
wanglei
f873c50caa [LoongArch] AsmParser support for the li.[wd] pseudo instructions
The `li.[wd]` pseudo instructions are used to load an immediate value
into a GPR. These expand directly during asm parsing. As the result,
only real MC instructions are emitted to the MCStreamer. The actual
expansion to real instructions is similar to the expansion performed by
the GAS.

Note: The `li.w` always treats the imm operand as a 32-bit signed value.

Reviewed By: SixWeining

Differential Revision: https://reviews.llvm.org/D138086
2022-11-21 16:33:47 +08:00
wanglei
a7ec7f6d77 [LoongArch] Support parsing la* pseudo instructions
This patch makes `IAS` compatible with `GAS`. It accepts `la*` pseudo
instructions, and expands `la{,.local,.global}` into different
instructions according to different features.

```
 Default:
     la = la.global = la.got
     la.local = la.pcrel
 With feature "+la-global-with-pcrel":
     la = la.global = la.pcrel
 With feature "+la-global-with-abs":
     la = la.global = la.abs
 With feature "+la-local-with-abs":
     la.local = la.abs
 With features "+la-global-with-pcrel,+la-global-with-abs"(disorder):
     la = la.global = la.pcrel
```
Note: To keep consistent with `GAS` behavior, the "la" can only have
      one register operand.

Reviewed By: SixWeining

Differential Revision: https://reviews.llvm.org/D138021
2022-11-21 15:33:30 +08:00
Weining Lu
c98add7a11 [LoongArch] Report error in AsmParser when rd == rk or rd == rj for AM* instructions
Do this check because the ISA manual says (edited from the original translation):

> If the AM* instruction has its rd == rj, an Instruction Non-defined Exception will be triggered when the instruction is executed.
>
> If the AM* instruction has its rd == rk, the execution result is unpredictable. It is software's responsibility to avoid this situation.

Note that binutils does the same check except when rd == r0 but this
is undocumented.

Differential Revision: https://reviews.llvm.org/D136076
2022-10-21 09:56:45 +08:00
wanglei
bf47954703 [LoongArch] Add more fixups and relocations
This patch makes the assembler support all modifiers defined in gnu-as.
Also changes some diagnostic information.

Differential Revision: https://reviews.llvm.org/D132633
2022-09-05 14:55:18 +08:00
wanglei
c2ee21cf3f [LoongArch] Add some fixups and relocations
This patch only add %pc_hi20/%pc_lo12/%plt relocations in order
to be able to generate gnu ld linkable relocation file for the
`hello world` IR :
```
@.str = private unnamed_addr constant [14 x i8] c"Hello world!\0A\00", align 1

define dso_local signext i32 @main() nounwind {
entry:
  %call = call signext i32 (ptr, ...) @printf(ptr noundef @.str)
  ret i32 0
}

declare dso_local signext i32 @printf(ptr noundef, ...)
```

This patch also updates some test cases due to new modifiers introduced.
New test: test/MC/LoongArch/Relocations/relocations.s

Differential Revision: https://reviews.llvm.org/D132108
2022-08-20 11:19:24 +08:00
Weining Lu
904a87ace3 [LoongArch] Use end namespace xxx style comment. NFC 2022-07-26 15:01:29 +08:00
Weining Lu
11ec7307a3 [LoongArch] Add privilege instructions definition
These instructions are added by following the `LoongArch Reference
Manual Volume 1: Basic Architecture Version 1.00`.

Differential Revision: https://reviews.llvm.org/D124826
2022-05-14 17:46:02 +08:00
Weining Lu
24532d05f8 [LoongArch] Check msb is not less than lsb for the bstr{ins/pick}.{w/d} instructions
Differential Revision: https://reviews.llvm.org/D124825
2022-05-12 09:31:44 +08:00
Weining Lu
3a49ad717c [LoongArch] Add basic floating-point instructions definition
These instructions are added by following the `LoongArch Reference
Manual Volume 1: Basic Architecture Version 1.00`.

Differential Revision: https://reviews.llvm.org/D123988
2022-04-21 10:04:20 +08:00
Fangrui Song
88436afe30 [LoongArch] Fix several Clang warnings. NFC 2022-03-25 22:15:35 -07:00
Weining Lu
c008a697ff [LoongArch] Add some missing comments. NFC
Add more comments /*Lower=*/ and /*Upper=*/ calling generateImmOutOfRangeError.
2022-03-16 14:57:08 +08:00
Weining Lu
097035f308 [LoongArch] Use getLoc() directly to construct error message 2022-03-11 11:55:35 +08:00
Weining Lu
3347f77b80 [LoongArch] Add basic support to AsmParser
This patch adds basic support to AsmParser which can handle basic
instructions with register or immediate operands. With the addition of
the parser, now it's possible to test instructions encoding with `llvm-mc`.

Disassembler will be added later and then we can do `round-trip` test.

Reviewed By: xen0n, MaskRay, myhsu

Differential Revision: https://reviews.llvm.org/D120476
2022-03-09 16:20:36 +08:00