Rather than shepherding a type name all the way to the backend as a
string and attempting to parse it, get the element type out of the AST
and store that in the resource annotation metadata directly.
Pull Request: https://github.com/llvm/llvm-project/pull/75674
Since e39f6c1844fa "[opt] Infer DataLayout from triple if not
specified", this test (correctly) emits a load of an i64 with 8 byte
alignment, rather than with 4 byte alignment.
One big issue with DirectXShaderCompiler was test coverage: DXIL and
SPIR-V backends had their own tests. When a bug was found in one, the
other wasn't always checked. This lead to unequal support of HLSL for
both backends. We'd like to avoid those issues here, hence the
test-sharing.
By default, all the tests in this folder are marked as requiring
DirectX. But as SPIR-V support grows, each test drop this requirement,
and check the SPIR-V behavior.
I would have preferred to mark new tests as XFAIL for SPIR-V by default,
so we could differentiate real unsupported tests (as SPIR-V has no
equivalent), from newly added tests. But the way LIT is built, I don't
think this is possible.
---------
Signed-off-by: Nathan Gauër <brioche@google.com>
When emit NoOp bitcast for GEP Ptr Operand, should use SourceElementType
instead of ResultElementType.
**Behavior Before Change**
Redundant bitcast like
` bitcast ptr addrspace(3) @gs to ptr addrspace(3)`
will be generated for llvm/test/CodeGen/DirectX/typed_ptr.ll
**Behavior After Change**
No bitcast will be generated.
Fixes https://github.com/llvm/llvm-project/issues/65183
When emitting assembly we don't particularly want the binary DXIL
embedded in the output. This was mostly there for testing purposes, so
we update those tests to run the test directly using `opt` and
restrict the -dxil-embed and -dxil-globals passes to running normally
only in the case where we're trying to emit a DXContainer.
Differential Revision: https://reviews.llvm.org/D158051
This is a follow-up to b71edfaa4ec3c998aadb35255ce2f60bba2940b0
since I forgot the lit.local.cfg files in that one.
Reformatting is done with `black`.
If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.
If you run into any problems, post to discourse about it and
we will try to help.
RFC Thread below:
https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style
Reviewed By: barannikov88, kwk
Differential Revision: https://reviews.llvm.org/D150762
class ConstantBuffer is added to save information for cbuffer.
Also add CBufferDataLayout to calculate the size for cbuffer.
Now always use legacy cbuffer layout.
https://reviews.llvm.org/D134998 will add control to disable legacy cbuffer layout.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D136031
PartSize for a part in dx container is only the size of the content of the part, not include size of the PartHeader.
Differential Revision: https://reviews.llvm.org/D141207
New named metadata "dx.entryPoints" is added to save all entries.
Each entry is in format of
!{ptr to function, name, signature, resource table, extra}
For compute shader, the extra will save num of threads in format of {i32 x, i32 y, i32 z}
For library profile, an empty entry will be added to save the resource table for the library.
Signature and resource table metadata is not generated yet.
Differential Revision: https://reviews.llvm.org/D131807
DXIL shader bitcode is hashed and the hash is placed into the final
output object file in its own data part.
This change modifies the DXContainerGlobals pass to compute the shader
hash (just an MD5 of the bitcode) and put the shader hash data into a
global for the HASH part.
This also sets the hash flag as appropriate for if the hashed shader
contained debug information. There is additional handling required to
get debug information in shaders working correctly with our tooling,
but that will be addressed in subsequent patches.
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D139357
Set target triple to "dxil-ms-dx" for DXIL at the end of DXILTranslateMetadata.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D131545
As @python3kgae pointed out we're going to want to assign these IDs
after optimization so that we can remove unused resrouces. This patch
just removes the unused ID value from the frontend metadata, clang code
generation, and updates associated test cases.
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D136271
DXContainer files have a handful of sections that need to be written.
This adds a pass to write the section data into IR globals, and writes
the shader flag data into a global.
The test cases here verify that the shader flags are correctly written
from the IR into the global and emitted to the DXContainer.
This change also fixes a bug in the MCDXContainerWriter, where the size
of the dxbc::ProgramHeader was not being included in the part offset
calcuations. This is verified to be working by the new testcases where
obj2yaml can properly dump part data for parts after the DXIL part.
Resolves issue #57742 (https://github.com/llvm/llvm-project/issues/57742)
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D135793
''register(ID, space)'' like register(t3, space1) will be translated into
i32 3, i32 1 as the last 2 operands for resource annotation metadata.
NamedMetadata for CBuffers and SRVs are added as "hlsl.srvs" and "hlsl.cbufs".
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D130951
When DXC prints IR output it adds a bunch of IR comments in a header
that describe the DXIL metadata in a more human-readable format. This
pass will serve that purpose for LLVM by printing out ahead of the IR
printer.
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D135802
This adds infrastructural pieces for an analysis to compute the DXIL
shader flags. In this state the analysis can compute two fairly
straightforward feature flags for use of double-precision floating
point values and the DX 11.1 extended double support.
This patch does conflict with D135190, conflicts will be resolved prior
to merging.
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D135393
# Conflicts:
# llvm/lib/Target/DirectX/CMakeLists.txt
# llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
Now only DXILTranslateMetadata uses DXILResources, so DXILResourceWrapper is only used by DXILTranslateMetadata.
Once we add lower for createHandle, DXILResourceWrapper will be used in more passes.
Also we can add resource index allocation in DXILResourceWrapper.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D135190
This code adds initial support for generating the HLSL resources
metadata entries. It has a lot of `FIXMEs` laying around because there
is a lot more work to do here, but this lays a solid groundwork and can
accurately handle some trivial cases.
I've filed a swath of issues covering the deficiencies here and left the
issues in comments so that we can easily follow them.
One big change to make sooner rather than later is to move some of this
code into a new libLLVMFrontendHLSL so that we can share it with the
Clang CodeGen layer.
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D134682
This captures the target shader model and pipeline stage into the DXIL
metadata for consumption by the DirectX runtime.
Reviewed By: python3kgae
Differential Revision: https://reviews.llvm.org/D134469
Put DXIL validation version into separate NamedMetadata to avoid update ModuleFlags.
Currently DXIL validation version is saved in ModuleFlags in clang codeGen.
Then in DirectX backend, the data will be extracted from ModuleFlags and cause rebuild of ModuleFlags.
This patch will build NamedMetadata for DXIL validation version and remove the code to rebuild ModuleFlags.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D130207
`dxil` is an architecture supported by the DirectX backend. These
intrinsics will likely be shared with other DirectX architectures like
`dxbc`. Using a common prefix `dx` will make it more intuitive.
Also the `dx` prefix is already set in the Triple, which causes
intrinsics described here to be unmatchable via the ClangBuiltin
mechanism.
Add DXIL operation for thread/group id operations.
ID Name Description
93 ThreadId reads the thread ID
94 GroupId reads the group ID (SV_GroupID)
95 ThreadIdInGroup reads the thread ID within the group (SV_GroupThreadID)
96 FlattenedThreadIdInGroup provides a flattened index for a given thread within a given group (SV_GroupIndex)
Also add llvm intrinsic which map to these intrinsics to DXIL operation.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D127990
This is the last piece to bring together writing DXContainer files
containing DXIL through the DirectX backend.
While this change only has one test, all of the tests under
llvm/test/tools/dxil-dis also exercise this code. With this change the
output object file type for the dxil target is now DXContainer. Each of
the existing tests will generate DXContainer files, and the dxil-dis
tests additionally verify that the DXContainers generated are
well-formed and can be parsed by the DirectXShaderCompiler tools.
Depends on D127153 and D127165
Differential Revision: https://reviews.llvm.org/D127166
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.
A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums.
More tableGen backends will be added to replace manually written table in DirectX backend.
The unused fields in dxil_inst will be used in future PR.
Reviewed By: bogner
Differential Revision: https://reviews.llvm.org/D125435
Check supportsTypedPointers instead of hasSetOpaquePointersValue when query if has typed ptr.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D127268
At the end of the codegen pipeline for DXIL we will emit the DXIL into
a global variable in the Module annotated for the "DXIL" section.
This will be used by the MCDXContainerStreamer to emit the DXIL into a
DXContainer DXIL part.
Other parts of the DXContainer will be constructed similarly by
serializing their values into GlobalVariables.
This will allow DXIL to flow into DXContainers through the normal
MCStreamer flow used in the MC layer.
Depends on D122270
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D125334
Only remove dx.valver from module flags when cleanup module flags in DXILTranslateMetadataPass.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D125842
A new pass DxilEmitMetadata is added to translate information saved in llvm ir into metadata to match DXIL spec.
Only generate DXIL validator version in this PR.
In llvm ir, validator version is saved in ModuleFlag with "dx.valver" as Key.
!llvm.module.flags = !{!0, !1}
!1 = !{i32 6, !"dx.valver", !2}
!2 = !{i32 1, i32 1}
DXIL validator version has major and minor versions that are specified as named metadata:
!dx.valver = !{!2}
!2 = !{i32 1, i32 7}
Reviewed By: kuhar, beanz
Differential Revision: https://reviews.llvm.org/D125158
A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function.
Then translate call instructions on the intrinsic into call on dxil op function.
dxil op function will add i32 argument to the begining of args for dxil opcode.
So cannot use setCalledFunction to update the call instruction on intrinsic.
This commit only support sin to start the work.
Reviewed By: kuhar, beanz
Differential Revision: https://reviews.llvm.org/D124805
In supporting opaque pointers we need to re-materialize typed pointers
in bitcode emission. Because of how the value-enumerator pre-allocates
types and instructions we need to insert some no-op bitcasts in the
places that we'll need bitcasts for the pointer types.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D122269
The DXIL Prepare pass handles the IR mutations required to convert
modern LLVM IR into something that more closely resembles LLVM-3.7 IR
so that the DXIL bitcode writer can emit 3.7 IR.
This change adds the codegen pass handling the first two IR
transformations:
* stripping new function attributes
* converting fneg into fsub
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D122081
