Prior to this change, stack realignment was achieved using the SRLI/SLLI
instructions in two steps. With this patch, stack realignment is
optimized using a single `BSTRINS` instruction.
Reviewed By: SixWeining, xen0n
Differential Revision: https://reviews.llvm.org/D158384
An emergency spill slot is created when the stack size cannot be
represented by an 11-bit signed number.
This patch also modifies how the `sp` is adjusted in the prologue.
`RegScavenger` will place the spill instruction before the prologue
if a VReg is created in the prologue. This will pollute the caller's
stack data. Therefore, until there is better way, we just use the
`addi.w/d` instruction for stack adjustment to ensure that VReg will
not be created. (RISCV has the same issue #58286)
Due to the addition of emergency spill slot, some test cases that use
exact stacksize need to be updated.
Differential Revision: https://reviews.llvm.org/D135757
This patch split the SP adjustment to reduce the instructions in
prologue and epilogue. In this way, the offset of the callee saved
register could fit in a single store.
Similar to D68011(RISCV).
Differential Revision: https://reviews.llvm.org/D136222
