shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
484,696 Commits 1,713 Branches 298 Tags
Commit Graph

4 Commits

Author SHA1 Message Date
Diego Caballero
98f6289a34 [mlir][Vector] Add support for Value indices to vector.extract/insert 
`vector.extract/insert` ops only support constant indices. This PR is
extending them so that arbitrary values can be used instead.

This work is part of the RFC: https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops

Differential Revision: https://reviews.llvm.org/D155034
 2023-09-22 00:39:32 +00:00
Matthias Springer
15ea2306a4 [mlir][NVGPU] Support N-D masks in transform.nvgpu.create_async_groups 
Support IR that is generated by the vector-to-scf lowering of N-D vector transfers with a mask. (Until now only 1-D and 2-D transfers were supported.) Only transfers that were fully unrolled are supported.

Differential Revision: https://reviews.llvm.org/D157286
 2023-08-08 14:30:03 +02:00
Matthias Springer
39d8876da3 [mlir][NVGPU] Support 2D masks in transform.nvgpu.create_async_groups 
Support IR that is generated by the vector-to-scf lowering of 2D vector transfers with a mask. Only 2D transfers that were fully unrolled are supported at the moment.

Differential Revision: https://reviews.llvm.org/D156695
 2023-08-07 15:46:54 +02:00
Matthias Springer
db393288ff [mlir][NVGPU][transform] Add create_async_groups transform op 
This transform looks for suitable vector transfers from global memory to shared memory and converts them to async device copies.

Differential Revision: https://reviews.llvm.org/D155569
 2023-07-18 14:36:41 +02:00