484696 Commits

Author SHA1 Message Date
Mariusz Sikora
9a41a80e76
[AMDGPU] Handle object size and bail if assume-like intrinsic is used in PromoteAllocaToVector (#68744)
Attached test will cause crash without this change.

We should not remove isAssumeLikeIntrinsic instruction if it is used by
other instruction.
2023-12-20 07:47:49 +01:00
Brandon Wu
fb51aae702
[RISCV] Add missing lmul info for SiFive extensions (#76006) 2023-12-20 14:42:47 +08:00
Brandon Wu
379d32dab8
Recommit [RISCV] Implement multi-lib reuse rule for RISC-V bare-metal toolchain (#73765) (#75890)
Extend the multi-lib re-use selection mechanism for RISC-V.
This funciton will try to re-use multi-lib if they are compatible.
Definition of compatible:
  - ABI must be the same.
  - multi-lib is a subset of current arch, e.g. multi-lib=march=rv32im
    is a subset of march=rv32imc.
  - march that contains atomic extension can't reuse multi-lib that
    doesn't has atomic, vice versa. e.g. multi-lib=march=rv32im and
    march=rv32ima are not compatible, because software and hardware
    atomic operation can't work together correctly.
2023-12-20 14:42:11 +08:00
cor3ntin
c853676061
[Clang] Fix a crash when incorrectly calling an explicit object member function template (#75913)
Fixes #75732
2023-12-20 07:41:24 +01:00
Matthias Springer
f7096428b4
[mlir][GPU] Add RecursiveMemoryEffects to gpu.launch (#75315)
Infer the side effects of `gpu.launch` from its body.
2023-12-20 15:25:25 +09:00
Christopher Di Bella
3903438860
[libcxx] adds ranges::fold_left_with_iter and ranges::fold_left (#75259)
Notable things in this commit:

* refactors `__indirect_binary_left_foldable`, making it slightly
different (but equivalent) to _`indirect-binary-left-foldable`_, which
improves readability (a [patch to the Working Paper][patch] was made)
* omits `__cpo` namespace, since it is not required for implementing
niebloids (a cleanup should happen in 2024)
* puts tests ensuring invocable robustness and dangling correctness
inside the correctness testing to ensure that the algorithms' results
are still correct

[patch]: https://github.com/cplusplus/draft/pull/6734
2023-12-19 21:57:50 -08:00
XinWang10
037c220702
[X86][MC] Support Enc/Dec for EGPR for promoted SHA instruction (#75582)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the encoding/decoding for promoted SHA instruction
in EVEX space.

RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
2023-12-20 13:54:50 +08:00
Matthias Springer
c4457e10fe
[mlir][IR] Change block/region walkers to enumerate this block/region (#75020)
This change makes block/region walkers consistent with operation
walkers. An operation walk enumerates the current operation. Similarly,
block/region walks should enumerate the current block/region.

Example:
```
// Current behavior:
op1->walk([](Operation *op2) { /* op1 is enumerated */ });
block1->walk([](Block *block2) { /* block1 is NOT enumerated */ });
region1->walk([](Block *block) { /* blocks of region1 are NOT enumerated */ });
region1->walk([](Region *region2) { /* region1 is NOT enumerated });

// New behavior:
op1->walk([](Operation *op2) { /* op1 is enumerated */ });
block1->walk([](Block *block2) { /* block1 IS enumerated */ });
region1->walk([](Block *block) { /* blocks of region1 ARE enumerated */ });
region1->walk([](Region *region2) { /* region1 IS enumerated });
```
2023-12-20 14:51:45 +09:00
Fangrui Song
207cbbd710
DiagnosticHandler: refactor error checking (#75889)
In LLVMContext::diagnose, set `HasErrors` for `DS_Error` so that all
derived `DiagnosticHandler` have correct `HasErrors` information.

An alternative is to set `HasErrors` in
`DiagnosticHandler::handleDiagnostics`, but all derived
`handleDiagnostics` would have to call the base function.
2023-12-19 21:51:26 -08:00
Fangrui Song
47413bb276
[libunwind] Bump to CXX_STANDARD 17 (#75986)
libunwind uses C-style and low-level C++, so the language standard
doesn't matter that much, but bumping to C++17 aligns with the rest of
LLVM and enables some features that would cause pedantic warnings in
C++11 (e.g. -Wc++17-attribute-extensions for [[fallthrough]]/
[[nodiscard]]/[[maybe_unused]]). (Contributors might use these features
unaware of the pedantic warnings).

Suggested-by: Christopher Di Bella <cjdb@google.com>
2023-12-19 21:51:05 -08:00
Matthias Springer
f10302e3fa
[mlir] Require folders to produce Values of same type (#75887)
This commit adds extra assertions to `OperationFolder` and `OpBuilder`
to ensure that the types of the folded SSA values match with the result
types of the op. There used to be checks that discard the folded results
if the types do not match. This commit makes these checks stricter and
turns them into assertions.

Discarding folded results with the wrong type (without failing
explicitly) can hide bugs in op folders. Two such bugs became apparent
in MLIR (and some more in downstream projects) and are fixed with this
change.

Note: The existing type checks were introduced in
https://reviews.llvm.org/D95991.

Migration guide: If you see failing assertions (`folder produced value
of incorrect type`; make sure to run with assertions enabled!), run with
`-debug` or dump the operation right before the failing assertion. This
will point you to the op that has the broken folder. A common mistake is
a mismatch between static/dynamic dimensions (e.g., input has a static
dimension but folded result has a dynamic dimension).
2023-12-20 14:39:22 +09:00
Jakub Kuderski
560564f51c
[mlir][vector][gpu] Align minf/maxf reduction kind names with arith (#75901)
This is to avoid confusion when dealing with reduction/combining kinds.
For example, see a recent PR comment:
https://github.com/llvm/llvm-project/pull/75846#discussion_r1430722175.

Previously, they were picked to mostly mirror the names of the llvm
vector reduction intrinsics:
https://llvm.org/docs/LangRef.html#llvm-vector-reduce-fmin-intrinsic. In
isolation, it was not clear if `<maxf>` has `arith.maxnumf` or
`arith.maximumf` semantics. The new reduction kind names map 1:1 to
arith ops, which makes it easier to tell/look up their semantics.

Because both the vector and the gpu dialect depend on the arith dialect,
it's more natural to align names with those in arith than with the
lowering to llvm intrinsics.

Issue: https://github.com/llvm/llvm-project/issues/72354
2023-12-20 00:14:43 -05:00
Mingming Liu
5136c167a2
[compiler-rt][test]Mark thinlto icp test as UNSUPPORTED on ppc. (#76008)
The test failure is about failed to build instrumented binary on ppc
(https://lab.llvm.org/buildbot/#/builders/18/builds/13228). Not sure how
to fix this for now. Mark the test unsupported on ppc.

```
RUN: at line 46: /home/buildbots/ppc64be-sanitizer/sanitizer-ppc64be/build/build_gcc/./bin/clang  --driver-mode=g++  -m64  -ldl  -fprofile-generate -fuse-ld=lld -O2 lib.cpp main.cpp -o main
+ /home/buildbots/ppc64be-sanitizer/sanitizer-ppc64be/build/build_gcc/./bin/clang --driver-mode=g++ -m64 -ldl -fprofile-generate -fuse-ld=lld -O2 lib.cpp main.cpp -o main
ld.lld: error: /lib/../lib64/Scrt1.o: ABI version 1 is not supported
clang: error: linker command failed with exit code 1 (use -v to see invocation)
```
2023-12-19 21:10:41 -08:00
Mingming Liu
92f17714e8
[test]For ThinLTO icp test, require llvm-64-bit given the raw profile data is generated on 64-bit systems (#76005) 2023-12-19 20:11:39 -08:00
Mingming Liu
bdd76e691f
[test] Restrict thinlto icp IR test to little endian systems, and the compiler-rt test to three tested platforms. (#76001)
- The IR test failed to import indirect callees on big-endian systems.
The raw profiles are generated on little-endian systems. Going to
require little-endian.
- Limit the compiler-rt test to three tested platforms.
2023-12-19 19:55:27 -08:00
Jinyang He
a8081ed8ff
[LoongArch] Allow delayed decision for ADD/SUB relocations (#72960)
Refer to RISCV [1], LoongArch also need delayed decision for ADD/SUB
relocations. In handleAddSubRelocations, just return directly if SecA !=
SecB, handleFixup usually will finish the the rest of creating PCRel
relocations works. Otherwise we emit relocs depends on whether
relaxation is enabled. If not, we return true and avoid record ADD/SUB
relocations.
Now the two symbols separated by alignment directive will return without
folding symbol offset in AttemptToFoldSymbolOffsetDifference, which has
the same effect when relaxation is enabled.

[1] https://reviews.llvm.org/D155357
2023-12-20 10:54:51 +08:00
Michael Liao
e6a7175c6d [SPIR-V] Avoid using zero value of target-specific types. NFC
- After #73887, spirv.Image cannot has a zeroinitializer, even though
  it's only used in metadata to pass down the type info to the backend.
  Instead of creating zeros, create undef ones of that target-specific
  types.
2023-12-19 21:48:40 -05:00
hstk30-hw
e5eef6e24f
[Clang][Wswitch-default] Warning for enum even completely covered the cases (#75900)
Adding a test case that this warns even for completely covered switches.
2023-12-20 10:26:27 +08:00
Matthias Springer
10056c821a
[mlir][SCF] scf.parallel: Make reductions part of the terminator (#75314)
This commit makes reductions part of the terminator. Instead of
`scf.yield`, `scf.reduce` now terminates the body of `scf.parallel` ops.
`scf.reduce` may contain an arbitrary number of reductions, with one
region per reduction.

Example:
```mlir
%init = arith.constant 0.0 : f32
%r:2 = scf.parallel (%iv) = (%lb) to (%ub) step (%step) init (%init, %init)
    -> f32, f32 {
  %elem_to_reduce1 = load %buffer1[%iv] : memref<100xf32>
  %elem_to_reduce2 = load %buffer2[%iv] : memref<100xf32>
  scf.reduce(%elem_to_reduce1, %elem_to_reduce2 : f32, f32) {
    ^bb0(%lhs : f32, %rhs: f32):
      %res = arith.addf %lhs, %rhs : f32
      scf.reduce.return %res : f32
  }, {
    ^bb0(%lhs : f32, %rhs: f32):
      %res = arith.mulf %lhs, %rhs : f32
      scf.reduce.return %res : f32
  }
}
```

`scf.reduce` operations can no longer be interleaved with other ops in
the body of `scf.parallel`. This simplifies the op and makes it possible
to assign the `RecursiveMemoryEffects` trait to `scf.reduce`. (This was
not possible before because the op was not a terminator, causing the op
to be DCE'd.)
2023-12-20 11:06:27 +09:00
Joseph Huber
ac029e02a9
[Libomptarget] Remove __tgt_image_info and use the ELF directly (#75720)
Summary:
This patch reorganizes a lot of the code used to check for compatibility
with the current environment. The main bulk of this patch involves
moving from using a separate `__tgt_image_info` struct (which just
contains a string for the architecture) to instead simply checking this
information from the ELF directly. Checking information in the ELF is
very inexpensive as creating an ELF file is simply writing a base
pointer.

The main desire to do this was to reorganize everything into the ELF
image. We can then do the majority of these checks without first
initializing the plugin. A future patch will move the first ELF checks
to happen without initializing the plugin so we no longer need to
initialize and plugins that don't have needed images.

This patch also adds a lot more sanity checks for whether or not the ELF
is actually compatible. Such as if the images have a valid ABI, 64-bit
width, executable, etc.
2023-12-19 20:01:31 -06:00
Joseph Huber
deab58d127
[ELF] Add CPU name detection for CUDA architectures (#75964)
Summary:
Recently we added support for detecting the CUDA processor with the ELF
flags. This allows us to get a string representation of it in other
code. This will be used by the offloading runtime.
2023-12-19 20:01:15 -06:00
Kai Luo
56414220df
[PowerPC] Use 'sync; ld; cmp; bc; isync' for atomic load seq-cst on 32-bit platform (#75905)
`cmp; bc; isync` is more performant than `lwsync` theoretically.

64-bit platform already features it, now implement it for 32-bit
platform.
2023-12-20 10:01:02 +08:00
long.chen
227bfa1fb1
[mlir] fix a crash when lower parallel loop to gpu (#75811) (#75946) 2023-12-20 09:13:15 +08:00
Jeffrey Byrnes
f1156fb622
[AMDGPU][IGLP]: Add SchedGroupMask::TRANS (#75416)
Makes constructing SchedGroups of this type easier, and provides ability
to create them with __builtin_amdgcn_sched_group_barrier
2023-12-19 16:54:18 -08:00
Jon Roelofs
394e481a38
fixup! [builtins] Refactor cpu_model support to reduce #if nesting. NFCI
https://github.com/llvm/llvm-project/pull/75635#issuecomment-1863662913
2023-12-19 17:48:24 -07:00
Arthur Eubanks
358fe49649 [gn build] Manually port 9237cfa6 2023-12-19 16:37:48 -08:00
ZijunZhaoCCK
fdd089b500
[libc++] Implement ranges::contains (#65148)
Differential Revision: https://reviews.llvm.org/D159232
```
Running ./ranges_contains.libcxx.out
Run on (10 X 24.121 MHz CPU s)
CPU Caches:
  L1 Data 64 KiB (x10)
  L1 Instruction 128 KiB (x10)
  L2 Unified 4096 KiB (x5)
Load Average: 3.37, 6.77, 5.27
--------------------------------------------------------------------
Benchmark                          Time             CPU   Iterations
--------------------------------------------------------------------
bm_contains_char/16             1.88 ns         1.87 ns    371607095
bm_contains_char/256            7.48 ns         7.47 ns     93292285
bm_contains_char/4096           99.7 ns         99.6 ns      7013185
bm_contains_char/65536          1296 ns         1294 ns       540436
bm_contains_char/1048576       23887 ns        23860 ns        29302
bm_contains_char/16777216     389420 ns       389095 ns         1796
bm_contains_int/16              7.14 ns         7.14 ns     97776288
bm_contains_int/256             90.4 ns         90.3 ns      7558089
bm_contains_int/4096            1294 ns         1290 ns       543052
bm_contains_int/65536          20482 ns        20443 ns        34334
bm_contains_int/1048576       328817 ns       327965 ns         2147
bm_contains_int/16777216     5246279 ns      5239361 ns          133
bm_contains_bool/16             2.19 ns         2.19 ns    322565780
bm_contains_bool/256            3.42 ns         3.41 ns    205025467
bm_contains_bool/4096           22.1 ns         22.1 ns     31780479
bm_contains_bool/65536           333 ns          332 ns      2106606
bm_contains_bool/1048576        5126 ns         5119 ns       135901
bm_contains_bool/16777216      81656 ns        81574 ns         8569
```

---------

Co-authored-by: Nathan Gauër <brioche@google.com>
2023-12-19 16:34:19 -08:00
Nick Desaulniers
22764918b5
[libc] try fixing LlvmLibcStackChkFail.Smash a third time (#75988)
Build bots are failing in post submit. Unclear why but can't reproduce
locally.
Disable this test for asan for now.
2023-12-19 16:23:29 -08:00
Arthur Eubanks
71a9292298 Revert "[SLP]Improve findReusedOrderedScalars processing, NFCI."
This reverts commit 44dc1e0baae7c4b8a02ba06dcf396d3d452aa873.

Causes non-determinism, see #75987.
2023-12-19 16:14:04 -08:00
Jakub Kuderski
9f74e6e615
[mlir][vector][gpu] Use makeArithReduction in lowering patterns. NFC. (#75952)
Use the `vector::makeArithReduction` helper as the source-of-truth of
reduction to arith ops lowering.
2023-12-19 19:04:27 -05:00
Nick Desaulniers
8f6352fcb3
[libc] remove unnecessary dependency on assert from __stack_check_fail (#75985) 2023-12-19 15:55:22 -08:00
James Y Knight
394274965a [bazel] Port 35b366ace73d0ede3cdeeb4d09150a9945750b7f 2023-12-19 18:13:58 -05:00
Craig Topper
05abe8a7e8
[RISCV] Remove Zfbfmin dependency from Zvfbfmin. (#75851)
Zvfbfmin does not have any scalar operands making this an unnecessary
dependency. The spec was just updated to remove this. See
86d7a74f4b

This fixes a correctness issue where Xsfvfwmaccqqq was incorrectly
depending on Zfbfmin. The SiFive CPUs that support Xsfvfwmaccqqq do not
implement Zfbfmin, but do implement Zvfbfmin based on a previous
understanding that it only requires Zve32f. I've added tests for this
feature to raise the bar for adding dependencies to it in the future.
2023-12-19 15:07:38 -08:00
Pete Lawrence
8ddf98ad4b
[lldb] Remove unused GetChildAtIndexPath(...) methods from ValueObject.cpp (#75870)
This a follow-up PR from this other one:
https://github.com/llvm/llvm-project/pull/74413

Nothing calls into these two methods, so we (@DavidSpickett,
@adrian-prantl, and I) agreed to remove them once we merged the previous
PR.
2023-12-19 15:00:56 -08:00
Ben Langmuir
dc58f781b6
[ORC-RT] Fix ptrauth signing for dlsym return value (#75972)
dlsym signs text symbols as functions rather than data in dyld, so match
that for orc runtime dlsym. This fixes run_program on arm64e.
2023-12-19 14:56:42 -08:00
Mingming Liu
85525f8fb6
[test]Mark thinlto icp test as unsupported on powerpc (#75979)
Test failed on ppc
(https://lab.llvm.org/buildbot/#/builders/231/builds/18902), and logs
shows missed import.

Cannot reproduce this with machines I could access so far.
https://gcc.gnu.org/wiki/CompileFarm seems to provide ppc64 machine.
Mark the thinlto icp test as unsupported for now.
2023-12-19 14:51:18 -08:00
Cyndy Ishida
e6ebe8bf81
[TextAPI] use unique sorted vector for holding target triples for (#75959)
reading dylibs

* This is a better fix than what I originally did to appease CI.
2023-12-19 14:49:57 -08:00
Igor Kudrin
98e20e15ba
[CommandLine][NFC] Replace 'std::function' with 'function_ref' (#75973)
This implements a post-commit suggestion for #75679.
2023-12-20 05:14:57 +07:00
Sang Ik Lee
8197ea2a08
[MLIR] Update FindSyclRuntime.cmake to handle SYCL library path chang… (#75861)
…e introduced by oneAPI DPC++ compiler 2024.0
2023-12-19 15:55:33 -06:00
Nick Desaulniers
b3d024c673
[libc] try fixing LlvmLibcStackChkFail.Smash again (#75967)
Looks like adding attributes to lambdas wasn't added to ISO C++ until
C++23.
Forget lambdas and just use a static function.
2023-12-19 13:32:52 -08:00
quic-akaryaki
535520c663
[llvm-objcopy] --gap-fill and 0-size sections (#75837)
In the change that added `--gap-fill`, the condition to choose the
sections to write in `BinaryWriter::write()` did not exclude zero-size
sections. However, zero-size sections did not have correct offsets
assigned in `BinaryWriter::finalize()`. The result is either a failed
assertion, or memory corruption due to writing to the buffer beyond its
size.
To fix this, exclude zero-size sections from writing. Also, add a zero-size
section to the test, which would trigger the problem.
2023-12-19 15:30:29 -06:00
Jon Roelofs
52e7b6f5c5
fixup! [builtins] Refactor cpu_model support to reduce #if nesting. NFCI
https://github.com/llvm/llvm-project/pull/75635#issuecomment-1863433937

```
/b/s/w/ir/x/w/llvm_build/./bin/clang --target=aarch64-unknown-linux-gnu --sysroot=/b/s/w/ir/x/w/cipd/linux -DHAS_ASM_LSE -DVISIBILITY_HIDDEN  --target=aarch64-unknown-linux-gnu -O2 -g -DNDEBUG -fno-lto -std=c11 -fPIC -fno-builtin -fvisibility=hidden -fomit-frame-pointer -DCOMPILER_RT_HAS_FLOAT16 -MD -MT CMakeFiles/clang_rt.builtins-aarch64.dir/cpu_model/aarch64.c.o -MF CMakeFiles/clang_rt.builtins-aarch64.dir/cpu_model/aarch64.c.o.d -o CMakeFiles/clang_rt.builtins-aarch64.dir/cpu_model/aarch64.c.o -c /b/s/w/ir/x/w/llvm-llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64.c
In file included from /b/s/w/ir/x/w/llvm-llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64.c:43:
/b/s/w/ir/x/w/llvm-llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/sysauxv.inc:5:41: error: use of undeclared identifier 'HWCAP_ATOMICS'
    5 |   __aarch64_have_lse_atomics = (hwcap & HWCAP_ATOMICS) != 0;
      |                                         ^
1 error generated.
```
2023-12-19 14:20:27 -07:00
Shoaib Meenai
85d5ed81b1 [compiler-rt] Fix obvious syntax error
This is breaking Android compiler-rt builds.
2023-12-19 12:59:05 -08:00
Kazu Hirata
8c296d58c5 [Interpreter] Fix warnings
This patch fixes:

  clang/lib/Interpreter/CodeCompletion.cpp:126:35: error: 'startswith'
  is deprecated: Use starts_with instead
  [-Werror,-Wdeprecated-declarations]

  clang/lib/Interpreter/CodeCompletion.cpp:189:42: error: 'startswith'
  is deprecated: Use starts_with instead
  [-Werror,-Wdeprecated-declarations]
2023-12-19 12:57:10 -08:00
Kazu Hirata
8dd77fa5ae [Support] Fix warnings
This patch fixes:

  third-party/unittest/googletest/include/gtest/gtest.h:1379:11:
  error: comparison of integers of different signs: 'const int' and
  'const unsigned int' [-Werror,-Wsign-compare]

  llvm/unittests/Support/CommandLineTest.cpp:2294:3: note: in
  instantiation of function template specialization
  'testing::internal::EqHelper::Compare<int, unsigned int, nullptr>'
  requested here
2023-12-19 12:57:08 -08:00
Fred Fu
35b366ace7
[ClangRepl] Reland Semanic Code Completion (#75556)
This patch contains changes from
002d471a4a3cd8b429e4ca7c84fd54a642e50e4c, in
addition to a bug fix that added a virtual destructor to
`CompletionContextHandler`

The original changes in the orginal commit piggybacks on clang's
semantic modules to enable semantic completion.  In particular, we use
`CodeCompletionContext` to differentiate two types of code completion.
We also
extract the relevant type information from it.
2023-12-19 22:53:02 +02:00
Nick Desaulniers
edbd034248
[libc] disable asan for LlvmLibcStackChkFail.Smash (#75966)
Otherwise for ASAN configured runs of the test, the test will fail due
to the
sanitizer rather than via SIGABRT.
2023-12-19 12:39:27 -08:00
Joseph Huber
219355d4c0
[Libomptarget] Use scoped atomics in the device runtime (#75834)
Summary:
A recent patch allowed us to easily replace GNU atomics with scoped
variants that make use of the backend's handling for more permissive
scopes. The default is full "system" scope, that means the atomic
operation must be consistent with operations that may happen on the
host's memory. This is generally only required for processes that are
communicating with something via global fine-grained memory. This patch
uses these atomics to make everything device scoped, as nothing in the
OpenMP runtime should depend on the host.

This is only provided as a very new clang extension but the DeviceRTL is
only compiled with clang so it is always available.
2023-12-19 14:30:34 -06:00
Mingming Liu
78a195e100
Reland the reland "[PGO][GlobalValue][LTO]In GlobalValues::getGlobalIdentifier, use semicolon as delimiter for local-linkage varibles. " (#75954)
Simplify the compiler-rt test to make it more general for different
platforms, and use `*DAG` matchers for lines that may be emitted
out-of-order.
- The compiler-rt test passed on a Windows machine. Previously name
matchers don't work for MSVC mangling
(https://lab.llvm.org/buildbot/#/builders/127/builds/59907)
- `*DAG` matchers fixed the error in
https://lab.llvm.org/buildbot/#/builders/94/builds/17924

This is the second reland and fixed errors caught in first reland
(https://github.com/llvm/llvm-project/pull/75860)

**Original commit message**
Commit fe05193 (phab D156569), IRPGO names uses format
`[<filepath>;]<linkage-name>` while prior format is
`[<filepath>:<mangled-name>`. The format change would break the use case
demonstrated in (updated)
`llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll` and
`compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp`

This patch changes `GlobalValues::getGlobalIdentifer` to use the
semicolon.

To elaborate on the scenario how things break without this PR
1. IRPGO raw profiles stores (compressed) IRPGO names of functions in
one section, and per-function profile data in another section. The
[NameRef](fc715e4cd9/compiler-rt/include/profile/InstrProfData.inc (L72))
field in per-function profile data is the MD5 hash of IRPGO names.
2. When raw profiles are converted to indexed format profiles, the
profiled address is
[mapped](fc715e4cd9/llvm/lib/ProfileData/InstrProf.cpp (L876-L885))
to the MD5 hash of the callee.
3. In `pgo-instr-use` thin-lto prelink pipeline, MD5 hash of IRPGO names
will be
[annotated](fc715e4cd9/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp (L1707))
as value profiles, and used to import indirect-call-prom candidates. If
the annotated MD5 hash is computed from the new format while import uses
the prior format, the callee cannot be imported.

*
`compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp`
is added to have an end-to-end test.
* `llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll`
is updated to have better test coverage from another aspect (as runtime
tests are more sensitive to the environment and may be skipped by some
contributors)
2023-12-19 12:25:56 -08:00
Christian Sigg
99045b60b5
[mlir][bazel] Fix build after c0d2ea9d4202 2023-12-19 21:03:33 +01:00