243021 Commits

Author SHA1 Message Date
Roman Lebedev
1e2c548150
[NFC] Port all LICM tests to -passes= syntax 2022-12-08 02:38:45 +03:00
Roman Lebedev
8205a68da8
[NFC] Port all LCSSA tests to -passes= syntax 2022-12-08 02:38:45 +03:00
Roman Lebedev
b487f2e96f
[NFC] Port all JumpThreading tests to -passes= syntax 2022-12-08 02:38:45 +03:00
Roman Lebedev
5b4b842ffb
[NFC] Port all InstSimplify tests to -passes= syntax 2022-12-08 02:38:45 +03:00
Roman Lebedev
230129ab75
[NFC] Port all InstMerge tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
5fb9e84047
[NFC] Port all InstCombine tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
67bbdd05c4
[NFC] Port all IndVarSimplify tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
0ec421d024
[NFC] Port all IRCE tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
42e2512479
[NFC] Port all GuardWidening tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
d579885e32
[NFC] Port all GlobalOpt tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
08cb876024
[NFC] Port all GlobalDCE tests to -passes= syntax 2022-12-08 02:38:44 +03:00
Roman Lebedev
2adab06db9
[NFC] Port all GVNSink tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
4d16d036f7
[NFC] Port all GVNHoist tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
c67f0701bb
[NFC] Port all GVN tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
a1314b2f62
[NFC] Port all FunctionSpecialization tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
091aabc181
[NFC] Port all FunctionAttrs tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
d87e607e47
[NFC] Port all ForcedFunctionAttrs tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
77f2db23d0
[NFC] Port all Float2Int tests to -passes= syntax 2022-12-08 02:38:43 +03:00
Roman Lebedev
5dfee9c25f
[NFC] Port all DivRemPairs tests to -passes= syntax 2022-12-08 02:38:42 +03:00
Roman Lebedev
c421210da2
[NFC] Port all DeadStoreElimination tests to -passes= syntax 2022-12-08 02:38:42 +03:00
Roman Lebedev
ccab5b7a39
[NFC] Port all DeadArgElim tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
641a684fa0
[NFC] Port all DFAJumpThreading tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
394a34b46c
[NFC] Port all CrossDSOCFI tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
6d5ff9970b
[NFC] Port all CorrelatedValuePropagation tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
c51e98929e
[NFC] Port all Coroutines tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
27d1d8bcdb
[NFC] Port all ConstraintElimination tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
33b939c3c8
[NFC] Port all ConstantHoisting tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
c626e39502
[NFC] Port all CodeExtractor tests to -passes= syntax 2022-12-08 02:38:41 +03:00
Roman Lebedev
6db544e1d4
[NFC] Port all CanonicalizeFreezeInLoops tests to -passes= syntax 2022-12-08 02:38:40 +03:00
Roman Lebedev
54c4609f18
[NFC] Port all CallSiteSplitting tests to -passes= syntax 2022-12-08 02:38:40 +03:00
Roman Lebedev
da02ecb302
[NFC] Port all BlockExtractor tests to -passes= syntax 2022-12-08 02:38:40 +03:00
Roman Lebedev
f3a2595711
[NFC] Port all Attributor tests to -passes= syntax 2022-12-08 02:38:40 +03:00
Roman Lebedev
679eaeb2f6
[NFC] Port all ArgumentPromotion tests to -passes= syntax 2022-12-08 02:38:40 +03:00
Roman Lebedev
8f92fe83ca
[NFC] Port all ADCE tests to -passes= syntax 2022-12-08 02:38:40 +03:00
Krzysztof Parzyszek
49e75ebd85 [Bitcode(Reader|Writer)] Convert Optional to std::optional 2022-12-07 15:27:38 -08:00
Johannes Doerfert
f6e3a89cc0 [AMDGPU] Annotate the intrinsics to be default and nocallback
Differential Revision: https://reviews.llvm.org/D135155
2022-12-07 14:25:25 -08:00
Jon Chesterfield
d77ae7f251 [amdgpu] Reimplement LDS lowering
Renames the current lowering scheme to "module" and introduces two new
ones, "kernel" and "table", plus a "hybrid" that chooses between those three
on a per-variable basis.

Unit tests are set up to pass with the default lowering of "module" or "hybrid"
with this patch defaulting to "module", which will be a less dramatic codegen
change relative to the current. This reflects the sparsity of test coverage for
the table lowering method. Hybrid is better than module in every respect and
will be default in a subsequent patch.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D139433
2022-12-07 22:02:54 +00:00
Simon Pilgrim
7bb16b0207 [llvm-exegesis][x86] Add test coverage for Issue #38507
Ensure that the PBLENDVBrr0 destination register is never xmm0
2022-12-07 21:52:17 +00:00
Chris Bieneman
c861ea8736 Generate DXIL Shader hash
DXIL shader bitcode is hashed and the hash is placed into the final
output object file in its own data part.

This change modifies the DXContainerGlobals pass to compute the shader
hash (just an MD5 of the bitcode) and put the shader hash data into a
global for the HASH part.

This also sets the hash flag as appropriate for if the hashed shader
contained debug information. There is additional handling required to
get debug information in shaders working correctly with our tooling,
but that will be addressed in subsequent patches.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D139357
2022-12-07 15:22:55 -06:00
Alexander Yermolovich
f2f8f70953 Revert "[llvm][dwwarf] Change CU/TU index to 64-bit"
This reverts commit 5ebd28f3e56c00a739fda46c72c9e0f6528add87.
2022-12-07 13:14:23 -08:00
Alexander Yermolovich
a77376479d Revert "[DWARFLibrary] Add support to re-construct cu-index"
This reverts commit a5bd76a6e3119af9dd9c1d8af89e2b89f5267deb.
2022-12-07 13:14:11 -08:00
Alexander Yermolovich
a5bd76a6e3 [DWARFLibrary] Add support to re-construct cu-index
Summary:

According to DWARF5 specification and gnu specification for DWARF4 the offset
entry in the CU/TU Index is 32 bits. This presents a problem when
.debug_info.dwo in DWP file grows beyond 4GB. The CU Index becomes partially
corrupted.

This diff adds manual parsing of .debug_info.dwo/.debug_abbrev.dwo to
reconstruct CU index in general, and TU index for DWARF5. This is a work around
until DWARF6 spec is finalized.

Next patch will change internal CU/TU struct to 64 bit, and change uses as
necessary. The plan is to land all the patches in one go after all are approved.

This patch originates from the discussion in: https://discourse.llvm.org/t/dwarf-dwp-4gb-limit/63902

Differential Revision: https://reviews.llvm.org/D137882
2022-12-07 13:08:35 -08:00
Alexander Yermolovich
5ebd28f3e5 [llvm][dwwarf] Change CU/TU index to 64-bit
Summary:

Changed contribution data structure to 64 bit. I added the 32bit and 64bit
accessors to make it explicit where we use 32bit and where we use 64bit. Also to
make sure sure we catch all the cases where this data structure is used.
2022-12-07 13:08:35 -08:00
Craig Topper
2c52d516da Revert "[RISCV] Return InstSeq from generateInstSeqImpl instead of using an output parameter. NFC"
This reverts commit d24915207c631b7cf637081f333b41bc5159c700.

Thinking about this more this probably chewed up 100+ bytes of stack
for each recursive call. So this probably needs more thought. The
code simplification wasn't that much.
2022-12-07 12:59:31 -08:00
Matt Arsenault
90f60a6a73 NVPTX: Cleanup check for denormal mode
Go through the common query and be explicit about the supported flush
type.
2022-12-07 15:56:21 -05:00
Matt Arsenault
5460b45564 AMDGPU: Rename test functions and add some cases for consistency
Test all the permutations.
2022-12-07 15:56:21 -05:00
Nicolai Hähnle
1598dc84bd GISel/Combiner: maintain created instructions in a SetVector
This is not a correctness fix because the set is only used for debug
output. However, it helps avoid noise when looking at diffs between
compiler runs.

The set is only maintained with debug output enabled, so the added cost
should be acceptable.

Differential Revision: https://reviews.llvm.org/D139465
2022-12-07 21:40:34 +01:00
Koakuma
f8f41c3fcd [SPARC] Lower SELECT_CC to MOVr on 64-bit target whenever possible
On 64-bit target, when doing i64 SELECT_CC where one of the comparison operands
is a constant zero, try to fold the compare and MOVcc into a MOVr instruction.

For all integers, EQ and NE comparison are available, additionally for signed
integers, GT, GE, LT, and LE is also available.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D138922
2022-12-07 15:34:58 -05:00
Shilei Tian
7ec057ff4a [NFC][Object] Include header BitcodeReader.h instead of using forward declaration for BitcodeModule
`BitcodeModule` is used as element of a vector in `IRSymtabFile`, while in the
header there is only a forward declaration. It will work if the header `BitcodeReader.h`
is included before including `IRObjectFile.h`. However, it is not always the case,
causing compilation error. This patch simply includes the header and remove the
forward declaration.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D139556
2022-12-07 15:32:04 -05:00
Brad Smith
7806f86a5e Revert "[SPARC] Mark the %g0 register as constant & use it to materialize zeros"
2 of the Sparc tests are now failing.

This reverts commit 2c41310fc146a1f609147c65ac5f30e5a57e84a8.
2022-12-07 15:27:57 -05:00