3 Commits

Author SHA1 Message Date
Matt Arsenault
cc5a1b3dd9 llvm-reduce: Add cloning of target MachineFunctionInfo
MIR support is totally unusable for AMDGPU without this, since the set
of reserved registers is set from fields here.

Add a clone method to MachineFunctionInfo. This is a subtle variant of
the copy constructor that is required if there are any MIR constructs
that use pointers. Specifically, at minimum fields that reference
MachineBasicBlocks or the MachineFunction need to be adjusted to the
values in the new function.
2022-06-07 10:14:48 -04:00
Fangrui Song
ef437a7d3f [CSKY] Fix some Clang warnings. NFC
Reviewed By: zixuan-wu

Differential Revision: https://reviews.llvm.org/D122872
2022-04-06 20:09:32 -07:00
Zi Xuan Wu
cf78715cae [CSKY] First patch to construct codegen infra and generate first add instruction
Ooops. It constructs codegen infra and provide only basic code to generate first add instruction successfully.

Differential Revision: https://reviews.llvm.org/D112206
2021-11-01 10:06:56 +08:00