29 Commits

Author SHA1 Message Date
Chris Bieneman
c861ea8736 Generate DXIL Shader hash
DXIL shader bitcode is hashed and the hash is placed into the final
output object file in its own data part.

This change modifies the DXContainerGlobals pass to compute the shader
hash (just an MD5 of the bitcode) and put the shader hash data into a
global for the HASH part.

This also sets the hash flag as appropriate for if the hashed shader
contained debug information. There is additional handling required to
get debug information in shaders working correctly with our tooling,
but that will be addressed in subsequent patches.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D139357
2022-12-07 15:22:55 -06:00
Xiang Li
ad68c66a38 [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Fix build and test error caused by
a2620e00ff#
and
304f1d59ca

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D137815
2022-11-14 12:50:23 -08:00
Xiang Li
996267d20e [DirectX backend] set target triple to "dxil-ms-dx"
Set target triple to "dxil-ms-dx" for DXIL at the end of DXILTranslateMetadata.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D131545
2022-10-24 14:49:31 -07:00
Chris Bieneman
4c7218e770 [HLSL] Remove unused frontend-generated ID
As @python3kgae pointed out we're going to want to assign these IDs
after optimization so that we can remove unused resrouces. This patch
just removes the unused ID value from the frontend metadata, clang code
generation, and updates associated test cases.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D136271
2022-10-21 12:41:09 -05:00
Chris Bieneman
607be386e7 [DX] Fix missing preserved analysis
The ShaderFlagsAnalysisWrapper needs to be marked to preserve all
analyssis.

Fixes #58474 (https://github.com/llvm/llvm-project/issues/58474)
2022-10-19 12:11:03 -05:00
Chris Bieneman
97ef68806f [DirectX] Disabling currently failing test
The pretty-printer isn't working because the resource analysis isn't
properly preservered.
2022-10-19 11:52:05 -05:00
Chris Bieneman
6e05c8dfc8 [DX] Create globals for DXContainer parts
DXContainer files have a handful of sections that need to be written.
This adds a pass to write the section data into IR globals, and writes
the shader flag data into a global.

The test cases here verify that the shader flags are correctly written
from the IR into the global and emitted to the DXContainer.

This change also fixes a bug in the MCDXContainerWriter, where the size
of the dxbc::ProgramHeader was not being included in the part offset
calcuations. This is verified to be working by the new testcases where
obj2yaml can properly dump part data for parts after the DXIL part.

Resolves issue #57742 (https://github.com/llvm/llvm-project/issues/57742)

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135793
2022-10-18 11:48:08 -05:00
Xiang Li
13163dd8ab [HLSL] CodeGen hlsl resource binding.
''register(ID, space)'' like register(t3, space1) will be translated into
i32 3, i32 1 as the last 2 operands for resource annotation metadata.

NamedMetadata for CBuffers and SRVs are added as "hlsl.srvs" and "hlsl.cbufs".

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D130951
2022-10-17 14:29:19 -07:00
Chris Bieneman
e530a1188e [DX] Add pass to pretty-print DXIL metadata in asm
When DXC prints IR output it adds a bunch of IR comments in a header
that describe the DXIL metadata in a more human-readable format. This
pass will serve that purpose for LLVM by printing out ahead of the IR
printer.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135802
2022-10-14 13:32:59 -05:00
Chris Bieneman
2b2afb2529 [DX] Add analysis and printer for shader flags
This adds infrastructural pieces for an analysis to compute the DXIL
shader flags. In this state the analysis can compute two fairly
straightforward feature flags for use of double-precision floating
point values and the DX 11.1 extended double support.

This patch does conflict with D135190, conflicts will be resolved prior
to merging.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135393

# Conflicts:
#	llvm/lib/Target/DirectX/CMakeLists.txt
#	llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
2022-10-11 14:27:05 -05:00
Xiang Li
220185552f [DirectX backend] Add analysis to collect DXILResources
Now only DXILTranslateMetadata uses DXILResources, so DXILResourceWrapper is only used by DXILTranslateMetadata.
Once we add lower for createHandle, DXILResourceWrapper will be used in more passes.
Also we can add resource index allocation in DXILResourceWrapper.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D135190
2022-10-06 19:34:29 -07:00
Chris Bieneman
618e5006a5 [DirectX] Generate dx.resources metadata entry
This code adds initial support for generating the HLSL resources
metadata entries. It has a lot of `FIXMEs` laying around because there
is a lot more work to do here, but this lays a solid groundwork and can
accurately handle some trivial cases.

I've filed a swath of issues covering the deficiencies here and left the
issues in comments so that we can easily follow them.

One big change to make sooner rather than later is to move some of this
code into a new libLLVMFrontendHLSL so that we can share it with the
Clang CodeGen layer.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D134682
2022-10-04 12:36:39 -05:00
Chris Bieneman
c0a76c2c71 [DirectX] Add DXIL metadata dx.shaderModel
This captures the target shader model and pipeline stage into the DXIL
metadata for consumption by the DirectX runtime.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D134469
2022-10-03 13:00:11 -05:00
Xiang Li
208d0f04a6 [NFC] legalize triple for dxil tests. 2022-09-26 18:09:33 -07:00
Xiang Li
1e3d4c4344 [DirectX backend] Remove Attribute not for DXIL on CallInst
Remove Attribute on CallInst which is not for DXIL when prepare for DXIL.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D133279
2022-09-13 13:45:19 -07:00
Xiang Li
6917799e37 [DirectX backend] change MinVectorRegisterBitWidth to 32.
This is to avoid vector-combine generate vector4 on float.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D132826
2022-08-30 23:20:12 -07:00
Xiang Li
a0ecb4a299 [HLSL] Move DXIL validation version out of ModuleFlags
Put DXIL validation version into separate NamedMetadata to avoid update ModuleFlags.

Currently DXIL validation version is saved in ModuleFlags in clang codeGen.
Then in DirectX backend, the data will be extracted from ModuleFlags and cause rebuild of ModuleFlags.
This patch will build NamedMetadata for DXIL validation version and remove the code to rebuild ModuleFlags.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D130207
2022-08-26 09:20:45 -07:00
Xiang Li
a9c875b19a [NFC] [DirectX] Cleanup test for comput_ids.
Cleanup test for review in https://reviews.llvm.org/D127990
2022-07-07 14:02:32 -07:00
Chris Bieneman
e0b5208650 [NFC] [DirectX] Prefix for intrinsics should be dx
`dxil` is an architecture supported by the DirectX backend. These
intrinsics will likely be shared with other DirectX architectures like
`dxbc`. Using a common prefix `dx` will make it more intuitive.

Also the `dx` prefix is already set in the Triple, which causes
intrinsics described here to be unmatchable via the ClangBuiltin
mechanism.
2022-07-06 13:27:12 -05:00
Xiang Li
43dc319049 [DirectX] add thread/group id DXIL operations.
Add DXIL operation for thread/group id operations.

ID  Name	                     Description
93  ThreadId	                 reads the thread ID
94  GroupId	                  reads the group ID (SV_GroupID)
95  ThreadIdInGroup	          reads the thread ID within the group (SV_GroupThreadID)
96  FlattenedThreadIdInGroup	 provides a flattened index for a given thread within a given group (SV_GroupIndex)

Also add llvm intrinsic which map to these intrinsics to DXIL operation.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D127990
2022-07-01 10:56:07 -07:00
Chris Bieneman
2af61e620e [DirectX] Add DirectX target object writer
This is the last piece to bring together writing DXContainer files
containing DXIL through the DirectX backend.

While this change only has one test, all of the tests under
llvm/test/tools/dxil-dis also exercise this code. With this change the
output object file type for the dxil target is now DXContainer. Each of
the existing tests will generate DXContainer files, and the dxil-dis
tests additionally verify that the DXContainers generated are
well-formed and can be parsed by the DirectXShaderCompiler tools.

Depends on D127153 and D127165

Differential Revision: https://reviews.llvm.org/D127166
2022-06-17 21:33:08 -05:00
python3kgae
435897b41d [TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.

A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums.

More tableGen backends will be added to replace manually written table in DirectX backend.
The unused fields in dxil_inst will be used in future PR.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D125435
2022-06-14 17:31:58 -07:00
python3kgae
12ca031b0d [DirectX][Fail crash in DXILPrepareModule pass when input has typed ptr.
Check supportsTypedPointers instead of hasSetOpaquePointersValue when query if has typed ptr.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D127268
2022-06-07 21:11:24 -07:00
Chris Bieneman
d401a99306 [DirectX] Embed DXIL in LLVM Module
At the end of the codegen pipeline for DXIL we will emit the DXIL into
a global variable in the Module annotated for the "DXIL" section.

This will be used by the MCDXContainerStreamer to emit the DXIL into a
DXContainer DXIL part.

Other parts of the DXContainer will be constructed similarly by
serializing their values into GlobalVariables.

This will allow DXIL to flow into DXContainers through the normal
MCStreamer flow used in the MC layer.

Depends on D122270

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D125334
2022-06-06 15:04:26 -05:00
python3kgae
c6c13d4e5f [DirectX backend] When cleanup module flags only remove unused flags.
Only remove dx.valver from module flags when cleanup module flags in DXILTranslateMetadataPass.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D125842
2022-05-19 14:50:11 -07:00
python3kgae
0c7f7f1b01 [DirectX backend] Add pass to emit dxil metadata.
A new pass DxilEmitMetadata is added to translate information saved in llvm ir into metadata to match DXIL spec.

Only generate DXIL validator version in this PR.

In llvm ir, validator version is saved in ModuleFlag with "dx.valver" as Key.

  !llvm.module.flags = !{!0, !1}
  !1 = !{i32 6, !"dx.valver", !2}
  !2 = !{i32 1, i32 1}

DXIL validator version has major and minor versions that are specified as named metadata:

  !dx.valver = !{!2}
  !2 = !{i32 1, i32 7}

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D125158
2022-05-11 08:40:13 -07:00
Xiang Li
85285be9c3 [DirectX backend] Add pass to lower llvm intrinsic into dxil op function.
A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function.
Then translate call instructions on the intrinsic into call on dxil op function.
dxil op function will add i32 argument to the begining of args for dxil opcode.
So cannot use setCalledFunction to update the call instruction on intrinsic.

This commit only support sin to start the work.

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D124805
2022-05-11 00:03:05 -07:00
Chris Bieneman
f5d054cdc1 Modify DXILPrepare to emit no-op bitcasts
In supporting opaque pointers we need to re-materialize typed pointers
in bitcode emission. Because of how the value-enumerator pre-allocates
types and instructions we need to insert some no-op bitcasts in the
places that we'll need bitcasts for the pointer types.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D122269
2022-05-09 13:40:47 -05:00
Chris Bieneman
6599fdab2c Add DXILPrepare CodeGen pass
The DXIL Prepare pass handles the IR mutations required to convert
modern LLVM IR into something that more closely resembles LLVM-3.7 IR
so that the DXIL bitcode writer can emit 3.7 IR.

This change adds the codegen pass handling the first two IR
transformations:

* stripping new function attributes
* converting fneg into fsub

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D122081
2022-04-05 11:50:07 -05:00