23890 Commits

Author SHA1 Message Date
Matt Arsenault
29e4363dda ValueTracking: Look through fneg in isKnownNeverNaN 2022-11-17 08:35:49 -08:00
luxufan
3053a323c7 [MemorySSA] Relax assert condition in createDefinedAccess
If globals-aa is enabled, because of the deletion of memory instructions, there
may be call instruction that is not in ModOrRefSet but is a MemoryUseOrDef.
This causes the crash in the process of cloning uses and defs.

Fixes https://github.com/llvm/llvm-project/issues/58719

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D137553
2022-11-17 23:43:20 +08:00
Sanjay Patel
3682180e5f [PhaseOrdering] add test for load combining; NFC
Based on an example in issue #17113
2022-11-17 10:33:35 -05:00
David Green
662b5f1846 [ARM] Add an extra test for low trip count MVE vectorization. NFC
This is quite reduced from the original example, but hopefully shows
where vectorization is unprofitable because of multiple factors
including the low trip count of the loop.
2022-11-17 15:07:28 +00:00
Evgeniy Brevnov
50f8eb05af Revert "[JT] Preserve exisiting BPI/BFI during JumpThreading"
This reverts commit 52a4018506e39f50d0c06ac5a1c987eb83b900c7.
2022-11-17 17:11:47 +07:00
Evgeniy Brevnov
52a4018506 [JT] Preserve exisiting BPI/BFI during JumpThreading
Currently, JT creates and updates local instances of BPI\BFI. As a result global ones have to be invalidated if JT made any changes.
In fact, JT doesn't use any information from BPI/BFI for the sake of the transformation itself. It only creates BPI/BFI to keep them up to date. But since it updates local copies (besides cases when it updates profile metadata) it just waste of time.

Current patch is a rework of D124439. D124439 makes one step and replaces local copies with global ones retrieved through AnalysisPassManager. Here we do one more step and don't create BPI/BFI if the only reason of creation is to keep BPI/BFI up to date. Overall logic is the following. If there is cached BPI/BFI then update it along the transformations. If there is no existing BPI/BFI, then create it only if it is required to update profile metadata.

Please note if BPI/BFI exists on exit from JT (either cached or created) it is always up to date and no reason to invalidate it.

Differential Revision: https://reviews.llvm.org/D136827
2022-11-17 17:00:00 +07:00
Fangrui Song
3ea86a13f4 [Sink] Add a single successor test 2022-11-17 00:12:42 -08:00
Matt Arsenault
ba1669c81f ValueTracking: Look through fabs and fneg in isKnownNeverInfinity 2022-11-17 00:06:15 -08:00
Matt Arsenault
d24fe812ec ValueTracking: Look through canonicalize in isKnownNeverInfinity 2022-11-17 00:06:15 -08:00
Alexey Bataev
9f9fdab9f1 [SLP]Fix PR58766: deleted value used after vectorization.
If same instruction is reduced several times, but in one graph is part
of buildvector sequence and in another it is vectorized, we may loose
information that it was part of buildvector and must be extracted from
later vectorized value.
2022-11-16 10:57:03 -08:00
Alexey Bataev
2f8f17c157 [SLP]Fix PR58956: fix insertpoint for reduced buildvector graphs.
If the graph is only the buildvector node without main operation, need
to inherit insrtpoint from the redution instruction. Otherwise the
compiler crashes trying to insert instruction at the entry block.
2022-11-16 07:38:49 -08:00
Matt Arsenault
fde4ef1973 InstSimplify: Fold arithmetic_fence as idempotent 2022-11-15 22:29:34 -08:00
Paul Kirth
0cc8752fa1 Revert "[pgo] Avoid introducing relocations by using private alias"
This reverts commit 2b8917f8ad792c4c484975b82039bbdebe556881.

This breaks with lld and gold
2022-11-16 03:38:14 +00:00
eopXD
c0ef83e3b9 [LSR] Check if terminating value is safe to expand before transformation
According to report by @JojoR, the assertion error was hit hence we need
to have this check before the actual transformation.

Reviewed By: Meinersbur, #loopoptwg

Differential Revision: https://reviews.llvm.org/D136415
2022-11-15 14:56:47 -08:00
Arthur Eubanks
70dc3b811e [AggressiveInstCombine] Remove legacy PM pass
As part of legacy PM optimization pipeline removal.

This shouldn't be used in codegen pipelines so it should be ok to remove.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D137116
2022-11-15 14:35:15 -08:00
Alexey Bataev
0a33ceee01 [SLP]Fix a crash on analysis of the vectorized node.
Need to use advanced check for the same vectorized node to avoid
possible compiler crash. We may have 2 similar nodes (vector one and
gather) after graph nodes rotation, need to do extra checks for the
exact match.
2022-11-15 13:40:28 -08:00
Roman Lebedev
8e37b53360
[X86] Rewrite getScalarizationOverhead()
All of our insert/extract ops work on 128-bit lanes.

For `Insert`, we need to extract affected 128-bit lane,
unless it's being fully overwritten (FIXME: do we need to be
careful about legalization-induced padding that we obviously don't demand?),
perform insertions, and then insert the 128-bit lane back.

But hold on. If we are operating on an 256-bit legal vector,
and thus have two 128-bit subvectors, and are fully overwriting them both,
we don't actually need to insert *both* subvectors,
only the second one, into the implicitly-widened first one.

Also, `Insert` wasn't actually querying the costs,
but just assuming them to be `1`.

`getShuffleCost(TTI::SK_ExtractSubvector)` notes:
```
  // Note that in general, the insertion starting at the beginning of a vector
  // isn't free, because we need to preserve the rest of the wide vector.
```
... so as far as i can tell, we didn't account for that.

I was hoping this would allow vectorization at a higher VF at one case i looked at,
but the subvector insertion cost is still dis-advising that.

The change for `Extract` is NFC, and is for consistency only,
i wanted to get rid of of that weird explicit discounting of insertion of 0'th element,
since the general code should already deal with that.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D137913
2022-11-15 21:07:12 +03:00
Paul Kirth
2b8917f8ad [pgo] Avoid introducing relocations by using private alias
Instead of using the public, interposable symbol, we can use a private
alias and avoid relocations and addends.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D137982
2022-11-15 16:05:24 +00:00
Bradley Smith
daf1a1f690 [AArch64][SVE] Add instcombine to convert ptest.last/first to ptest.any
This allow for better optimization later in the backend.

This fixes the remaining missed optimizations in D137717.

Depends on D137930

Differential Revision: https://reviews.llvm.org/D137947
2022-11-15 15:59:21 +00:00
Sameer Sahasrabuddhe
376d0469b9 [AAPointerInfo] refactor how offsets and Access objects are tracked
This restores commit b756096b0cbef0918394851644649b3c28a886e2, which was
originally reverted in 00b09a7b18abb253d36b3d3e1c546007288f6e89.

AAPointerInfo now maintains a list of all Access objects that it owns, along
with the following maps:

- OffsetBins: OffsetAndSize -> { Access }
- InstTupleMap: RemoteI x LocalI -> Access

A RemoteI is any instruction that accesses memory. RemoteI is different from
LocalI if and only if LocalI is a call; then RemoteI is some instruction in the
callgraph starting from LocalI.

Motivation: When AAPointerInfo recomputes the offset for an instruction, it sets
the value to Unknown if the new offset is not the same as the old offset. The
instruction must now be moved from its current bin to the bin corresponding to
the new offset. This happens for example, when:

- A PHINode has operands that result in different offsets.
- The same remote inst is reachable from the same local inst via different paths
  in the callgraph:

```
               A (local inst)
               |
               B
              / \
             C1  C2
              \ /
               D (remote inst)

```
This fixes a bug where a store is incorrectly eliminated in a lit test.

Reviewed By: jdoerfert, ye-luo

Differential Revision: https://reviews.llvm.org/D136526
2022-11-15 18:52:11 +05:30
Sanjay Patel
0a37290dc8 [InstSimplify] restrict logic fold with partial undef vector
https://alive2.llvm.org/ce/z/4ncsnX

Fixes #58977
2022-11-14 12:09:23 -05:00
Nikita Popov
458ae539df [AST] Remove legacy AliasSetPrinter pass
A NewPM version of this pass exists, drop the legacy version of
this testing-only pass.
2022-11-14 15:50:38 +01:00
Thomas Symalla
034df6f732 [InstCombine][NFC] Add extractelement tests 2022-11-14 12:55:39 +01:00
HanSheng Zhang
200f3410cd [reg2mem] Skip non-sized Instructions (PR58890)
We can only convert sized values into alloca/load/store, skip
instructions returning other types.

Fixes https://github.com/llvm/llvm-project/issues/58890.

Differential Revision: https://reviews.llvm.org/D137700
2022-11-14 12:47:39 +01:00
Joshua Cao
8ad88f129c Do not write a comma when varargs is the only argument
Fixes https://github.com/llvm/llvm-project/issues/56544

AsmWriter always writes ", ..." when a tail call has a varargs argument. This patch only writes the ", " when there is an argument before the varargs argument.

I did not write a dedicated test this for this change, but I modified an existing test that will test for a regression.

Reviewed By: avogelsgesang

Differential Revision: https://reviews.llvm.org/D137893

Signed-off-by: Adrian Vogelsgesang <avogelsgesang@salesforce.com>
2022-11-14 02:46:11 -08:00
Sebastian Neubauer
ce879a03c9 [Coroutines] Do not add allocas for retcon coroutines
Same as for async-style lowering, if there are no resume points in a
function, the coroutine frame pointer will be replaced by an undef,
making all accesses to the frame undefinde behavior.

Fix this by not adding allocas to the coroutine frame if there are no
resume points.

Differential Revision: https://reviews.llvm.org/D137866
2022-11-14 10:46:46 +01:00
Sebastian Neubauer
0387679e3e [Coroutines] Presubmit retcon without suspend test
The test gets incorrectly optimized to unreachable.
2022-11-14 10:46:33 +01:00
Nikita Popov
30982a595d [ConstraintElimination] Make decompose() infallible
decompose() currently returns a mix of {} and 0 + 1*V on failure.
This changes it to always return the 0 + 1*V form, thus making
decompose() infallible.

This makes the code marginally more powerful, e.g. we now fold
sub_decomp_i80 by treating the constant as a symbolic value.

Differential Revision: https://reviews.llvm.org/D137847
2022-11-14 10:42:04 +01:00
Dmitry Makogon
10ab29ec6e [IRCE] Bail out if AddRec in icmp is for another loop (PR58912)
When IRCE runs on outer loop and sees a check of an AddRec of
inner loop, it crashes with an assert in SCEV that the AddRec
must be loop invariant.
This adds a bail out if the AddRec which is checked in icmp
is for another loop.

Fixes https://github.com/llvm/llvm-project/issues/58912.

Differential Revision: https://reviews.llvm.org/D137822
2022-11-14 15:06:13 +07:00
luxufan
98eb917939 [LoopFlatten] Forget all block and loop dispositions after flatten
Method forgetLoop only forgets expression of phi or its users. SCEV
expressions except the above mentioned may still has loop dispositions
that point to the destroyed loop, which might cause a crash.

Fixes: https://github.com/llvm/llvm-project/issues/58865

Reviewed By: nikic, fhahn

Differential Revision: https://reviews.llvm.org/D137651
2022-11-14 10:19:11 +08:00
gonglingqin
19ae5391e3 [LoongArch] Expand atomicrmw fadd/fsub/fmin/fmax with CmpXChg
Differential Revision: https://reviews.llvm.org/D137311
2022-11-14 10:11:37 +08:00
Florian Hahn
758699c399
[VectorUtils] Skip interleave members with diff type and alloca sizes.
Currently, codegen doesn't support cases where the type size doesn't
match the alloc size. Skip them for now.

Fixes #58722.
2022-11-13 22:06:20 +00:00
Florian Hahn
7854a1abfd
[SimpleLoopUnswitch] Forget SCEVs for replaced phis.
Forget SCEVs based on exit phis in case SCEV looked through the phi.
After unswitching, it may not be possible to look through the phi due to
it having multiple incoming values, so it needs to be re-computed.

Fixes #58868
2022-11-13 17:38:39 +00:00
Sanjay Patel
362c23500a Revert "[InstCombine] allow more folds for multi-use selects (2nd try)"
This reverts commit 6eae6b3722d9204fa93b772e24afab93406cc143.

This version of the patch results in the same DFSAN bot failure as before,
so my guess about the SimplifyQuery context instruction was wrong.
I don't know what the real bug is.
2022-11-13 11:47:21 -05:00
Sanjay Patel
6eae6b3722 [InstCombine] allow more folds for multi-use selects (2nd try)
The 1st try ( 681a6a399022 ) was reverted because it caused
a DataFlowSanitizer bot failure.

This try modifies the existing calls to simplifyBinOp() to
not use a query that sets the context instruction because
that seems like a likely source of failure. Since we already
try those simplifies with multi-use patterns in some cases,
that means the bug is likely present even without this patch.

However, I have not been able to reduce a test to prove that
this was the bug, so if we see any bot failures with this patch,
then it should be reverted again.

The reduced simplify power does not affect any optimizations
in existing, motivating regression tests.

Original commit message:

The 'and' case showed up in a recent bug report and prevented
more follow-on transforms from happening.

We could handle more patterns (for example, the select arms
simplified, but not to constant values), but this seems
like a safe, conservative enhancement. The backend can
convert select-of-constants to math/logic in many cases
if it is profitable.

There is a lot of overlapping logic for these kinds of patterns
(see SimplifySelectsFeedingBinaryOp() and FoldOpIntoSelect()),
so there may be some opportunity to improve efficiency.

There are also optimization gaps/inconsistency because we do
not call this code for all bin-opcodes (see TODO for ashr test).
2022-11-13 10:28:06 -05:00
Michał Górny
f6f1fd443f Revert "[InstCombine] allow more folds more multi-use selects"
This reverts commit 681a6a3990226c667fb648952731d2753df2716d.
It broke sanitizer tests (as seen on buildbots), see:
https://reviews.llvm.org/rG681a6a399022#1143137
2022-11-13 07:27:01 +01:00
Matt Arsenault
a58541f14d AMDGPU: Fold llvm.amdgcn.sqrt(undef) 2022-11-11 17:02:19 -08:00
Mengxuan Cai
ec210f3942 [LoopFuse] Ensure inner loops are in loop simplified form under new PM
LoopInfo doesn't give all loops in a loop nest, it gives top level loops
only. While isLoopSimplifyForm() only checkes for the outter most loop of a
loop nest. As a result, inner loops that are not in simplied form can
not be simplified with the original code.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D137672
2022-11-11 15:55:59 -05:00
Sanjay Patel
681a6a3990 [InstCombine] allow more folds more multi-use selects
The 'and' case showed up in a recent bug report and prevented
more follow-on transforms from happening.

We could handle more patterns (for example, the select arms
simplified, but not to constant values), but this seems
like a safe, conservative enhancement. The backend can
convert select-of-constants to math/logic in many cases
if it is profitable.

There is a lot of overlapping logic for these kinds of patterns
(see SimplifySelectsFeedingBinaryOp() and FoldOpIntoSelect()),
so there may be some opportunity to improve efficiency.

There are also optimization gaps/inconsistency because we do
not call this code for all bin-opcodes (see TODO for ashr test).
2022-11-11 15:26:54 -05:00
Sanjay Patel
095f7bd512 [InstCombine] add tests for binop with select operand; NFC 2022-11-11 15:26:22 -05:00
Matt Arsenault
3e4280c04d AMDGPU: Disable some class simplifications for strictfp 2022-11-11 09:22:37 -08:00
Sanjay Patel
c2c48f0c96 [InstSimplify] add test for fsub with inf operand; NFC
Verify that constant negation works with a partial undef vector.
Also, remove a bogus TODO comment on a related test.
2022-11-11 09:17:20 -05:00
Nikita Popov
4d33cf4166 [MemCpyOpt] Avoid moving lifetime marker above def (PR58903)
This is unlikely to happen with opaque pointers, so just bail out
of the transform, rather than trying to move bitcasts/etc as well.

Fixes https://github.com/llvm/llvm-project/issues/58903.
2022-11-11 15:06:34 +01:00
Sanjay Patel
21f1b2da95 [InstSimplify] fold fsub nnan with Inf operand
Similar to fbc2c8f2fbbb, but if we have a non-canonical
fsub with constant operand 1, then flip the sign of the
Infinity:
https://alive2.llvm.org/ce/z/vKWfhW

If Infinity is operand 0, then the sign remains:
https://alive2.llvm.org/ce/z/73d97C
2022-11-11 08:42:44 -05:00
Dmitry Makogon
b1e9c4334e [Test] Add test for crash in IRCE when IV is AddRec for another loop
This adds a test for https://github.com/llvm/llvm-project/issues/58912.
IRCE crashes when it tries to check whether it is possible to safely
calculate the bounds of a loop with IV AddRec which is in another loop.
2022-11-11 16:49:55 +07:00
Matt Arsenault
3cfa03856f AtomicExpand: Support cmpxchg expansion for small FP types
Handles f16 atomics for AMDGPU.
2022-11-10 22:16:11 -08:00
Sanjay Patel
fbc2c8f2fb [InstSimplify] fold X +nnan Inf
If we exclude NaN (and therefore the opposite Inf),
anything plus Inf is Inf:
https://alive2.llvm.org/ce/z/og3dj9
2022-11-10 17:13:26 -05:00
Sanjay Patel
58167f67dc [InstSimplify] add tests for fadd/fsub with inf constant operand; NFC 2022-11-10 17:13:26 -05:00
William Huang
bd2b5ec803 [InstCombine] PR58901 - fix bug with swapping GEP of different types
Fix https://github.com/llvm/llvm-project/issues/58901 by adding stricter check whether non-opaque GEP can be swapped. This will not affect GEP swapping optimization in the future since we are switching to opaque GEP

Reviewed By: clin1

Differential Revision: https://reviews.llvm.org/D137752
2022-11-10 20:24:41 +00:00
Sanjay Patel
b57819e130 [VectorCombine] widen a load with subvector insert
This adapts/copies code from the existing fold that allows
widening of load scalar+insert. It can help in IR because
it removes a shuffle, and the backend can already narrow
loads if that is profitable in codegen.

We might be able to consolidate more of the logic, but
handling this basic pattern should be enough to make a small
difference on one of the motivating examples from issue #17113.
The final goal of combining loads on those patterns is not
solved though.

Differential Revision: https://reviews.llvm.org/D137341
2022-11-10 14:11:32 -05:00