8 Commits

Author SHA1 Message Date
Tim Northover
7346f062b6 AArch64/ARM64: implement remaining TLS relocations (purely MC).
llvm-svn: 207668
2014-04-30 16:13:26 +00:00
Tim Northover
624928134f ARM64: support relocated "TBZ/TBNZ" instructions.
llvm-svn: 207110
2014-04-24 12:56:34 +00:00
Tim Northover
0815a43e7c AArch64/ARM64: support relocated ADR instruction
llvm-svn: 207109
2014-04-24 12:56:30 +00:00
Tim Northover
597ccb200c AArch64/ARM64: add support for :abs_gN_s: MOVZ modifiers
We only need assembly support, so it's fairly easy.

llvm-svn: 207108
2014-04-24 12:56:27 +00:00
Tim Northover
79ec019261 AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands
These can have different relocations in ELF. In particular both:

    b.eq global
    ldr x0, global

are valid, giving different relocations. The only possible way to distinguish
them is via a different fixup, so the operands had to be separated throughout
the backend.

llvm-svn: 207105
2014-04-24 12:12:10 +00:00
James Molloy
650cb57067 [ARM64] Add a big endian version of the ARM64 target machine, and update all users.
This completes the porting of r202024 (cpirker "Add AArch64 big endian Target (aarch64_be)") to ARM64.

llvm-svn: 206965
2014-04-23 10:26:40 +00:00
Tim Northover
3e69958b6b AArch64/ARM64: produce correct relocation for conditional branches.
llvm-svn: 206391
2014-04-16 15:27:52 +00:00
Tim Northover
00ed9964c6 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
2014-03-29 10:18:08 +00:00