4323 Commits

Author SHA1 Message Date
Owen Anderson
53b677e4e8 Add register pairs to the list to check for local interferences.
llvm-svn: 44987
2007-12-13 05:53:03 +00:00
Owen Anderson
1f93edd08a Remove ugly and horrible code. It's not necessary for correctness, and can be added back later if it causes code quality issues.
llvm-svn: 44986
2007-12-13 05:43:37 +00:00
Evan Cheng
6e68381e02 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
Dan Gohman
7a7742c2fe Allow vector integer constants to be created with
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954
2007-12-12 22:21:26 +00:00
Owen Anderson
499e5bffcf Forgot to remove a register from the PHI-union after I'd determined that it
interfered with other registers.  Seems like that might be a good thing to do. :-)

llvm-svn: 44902
2007-12-12 01:25:08 +00:00
Evan Cheng
6766d2fa4f If deleting a reload instruction due to reuse (value is available in register R and reload is targeting R), make sure to invalidate the kill information of the last kill.
llvm-svn: 44894
2007-12-11 23:36:57 +00:00
Bill Wendling
38236ef6cb Need to grow the indexed map. Added debug statements.
llvm-svn: 44892
2007-12-11 23:27:51 +00:00
Bill Wendling
642e15a7cb Simplify slightly.
llvm-svn: 44881
2007-12-11 22:22:22 +00:00
Owen Anderson
f24dd1c1eb More progress on StrongPHIElimination. Now we actually USE the DomForest!
llvm-svn: 44877
2007-12-11 20:12:11 +00:00
Bill Wendling
b678ae7c38 Blark! How in the world did this work without this?!
llvm-svn: 44874
2007-12-11 19:40:06 +00:00
Bill Wendling
7717a8a37d - Update the virtual reg to machine instruction map when hoisting.
- Fix subtle bug when creating initially creating this map.

llvm-svn: 44873
2007-12-11 19:17:04 +00:00
Bill Wendling
5143d898c8 Checking for "zero operands" during the "CanHoistInst()" method isn't necessary
because those with side effects will be caught by other checks in here.

Also, simplify the check for a BB in a sub loop.

llvm-svn: 44871
2007-12-11 18:45:11 +00:00
Evan Cheng
303417d242 Switch over to MachineLoopInfo.
llvm-svn: 44838
2007-12-11 02:09:15 +00:00
Evan Cheng
f54030231e Pretty print shuffle mask operand.
llvm-svn: 44837
2007-12-11 02:08:35 +00:00
Gordon Henriksen
7843c16f31 CollectorMetadata and Collector are rejiggered to get along with
per-function collector model. Collector is now the factory for
CollectorMetadata, so the latter may be subclassed.

llvm-svn: 44827
2007-12-11 00:30:17 +00:00
Owen Anderson
ba61806ef1 A little more progress on StrongPHIElimination, now that I have a better sense of
how the CodeGen machinery works.

llvm-svn: 44786
2007-12-10 08:07:09 +00:00
Christopher Lamb
d202e03fe5 Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
llvm-svn: 44785
2007-12-10 07:24:06 +00:00
Chris Lattner
64443973c0 Duncan points out that the subtraction is unneeded since hte code
knows the vector is not pow2

llvm-svn: 44740
2007-12-09 17:56:34 +00:00
Chris Lattner
69d3298777 Add support for splitting the operand of a return instruction.
llvm-svn: 44728
2007-12-09 00:06:19 +00:00
Bill Wendling
3f19dfe794 Reverting 44702. It wasn't correct to rename them.
llvm-svn: 44727
2007-12-08 23:58:46 +00:00
Chris Lattner
e48fc80446 add many new cases to SplitResult. SplitResult now handles all the cases that LegalizeDAG does.
llvm-svn: 44726
2007-12-08 23:58:27 +00:00
Chris Lattner
de9046af54 Implement splitting support for store, allowing us to compile:
%f8 = type <8 x float>

define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
	%p = load %f8* %P		; <%f8> [#uses=1]
	%q = load %f8* %Q		; <%f8> [#uses=1]
	%R = add %f8 %p, %q		; <%f8> [#uses=1]
	store %f8 %R, %f8* %S
	ret void
}

into:

_test_f8:
	movaps	16(%rdi), %xmm0
	addps	16(%rsi), %xmm0
	movaps	(%rdi), %xmm1
	addps	(%rsi), %xmm1
	movaps	%xmm0, 16(%rdx)
	movaps	%xmm1, (%rdx)
	ret

llvm-svn: 44725
2007-12-08 23:24:26 +00:00
Chris Lattner
de87224cd9 implement vector splitting of load, undef, and binops.
llvm-svn: 44724
2007-12-08 23:08:49 +00:00
Chris Lattner
1ef437d4e1 implement some methods.
llvm-svn: 44723
2007-12-08 22:40:18 +00:00
Chris Lattner
a5e7db115e add scaffolding for splitting of vectors.
llvm-svn: 44722
2007-12-08 22:37:41 +00:00
Chris Lattner
8c8eaf6b92 reorganize header to separate into functional blocks.
llvm-svn: 44719
2007-12-08 21:59:32 +00:00
Chris Lattner
4063bd6eae split scalarization out to its own file.
llvm-svn: 44718
2007-12-08 20:30:28 +00:00
Chris Lattner
5c7c46baaf Split expansion out into its own file.
llvm-svn: 44717
2007-12-08 20:27:32 +00:00
Chris Lattner
029c816460 Split promotion support out to its own file.
llvm-svn: 44716
2007-12-08 20:24:38 +00:00
Chris Lattner
757d4beba9 Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cpp
llvm-svn: 44715
2007-12-08 20:17:13 +00:00
Chris Lattner
92288147b6 Split the class definition of DAGTypeLegalizer out into a header.
Leave it visibility hidden, but not in an anon namespace.

llvm-svn: 44714
2007-12-08 20:16:06 +00:00
Bill Wendling
2b07d8c5a0 Renaming:
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702
2007-12-08 07:17:56 +00:00
Bill Wendling
4375173ba0 Incorporated comments from Evan and Chris:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html

llvm-svn: 44696
2007-12-08 01:47:01 +00:00
Bill Wendling
fb706bc52b Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
2007-12-07 21:42:31 +00:00
Evan Cheng
85cdba29b0 Add an option to control this heuristic tweak so I can test it.
llvm-svn: 44671
2007-12-07 00:28:32 +00:00
Dale Johannesen
5eff4de9c8 Redo previous patch so optimization only done for i1.
Simpler and safer.

llvm-svn: 44663
2007-12-06 17:53:31 +00:00
Evan Cheng
8393dc7378 Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta.
llvm-svn: 44660
2007-12-06 08:54:31 +00:00
Chris Lattner
eedaf92fcf third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)

llvm-svn: 44658
2007-12-06 07:47:55 +00:00
Chris Lattner
b5fdfb9612 Actually, disable this code for now. More analysis and improvements to
the X86 backend are needed before this should be enabled by default.

llvm-svn: 44657
2007-12-06 07:44:31 +00:00
Chris Lattner
7c709a5d08 implement a readme entry, compiling the code into:
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656
2007-12-06 07:33:36 +00:00
Chris Lattner
42558bf664 implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp
llvm-svn: 44654
2007-12-06 05:53:43 +00:00
Dale Johannesen
05bbbda78a Fix PR1842.
llvm-svn: 44649
2007-12-06 01:43:46 +00:00
Evan Cheng
7fc1d98353 Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.
llvm-svn: 44644
2007-12-06 00:01:56 +00:00
Evan Cheng
678b86d6ce MachineInstr can change. Store indexes instead.
llvm-svn: 44612
2007-12-05 10:24:35 +00:00
Evan Cheng
06353b48b5 If a split live interval is spilled again, remove the kill marker on its last use.
llvm-svn: 44611
2007-12-05 09:51:10 +00:00
Evan Cheng
64b3baaaea Clobber more bugs.
llvm-svn: 44610
2007-12-05 09:05:34 +00:00
Evan Cheng
d7de56ac93 Fix kill info for split intervals.
llvm-svn: 44609
2007-12-05 08:16:32 +00:00
Chris Lattner
c9693c60a5 more scalarization
llvm-svn: 44608
2007-12-05 07:45:02 +00:00
Chris Lattner
1a0d49a63c scalarize vector binops
llvm-svn: 44607
2007-12-05 07:36:58 +00:00
Evan Cheng
269dbd31d0 - Mark last use of a split interval as kill instead of letting spiller track it.
This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
  low spill weight so it would not be picked in case spilling is needed (avoid
  pushing other intervals in the same BB to be spilled).

llvm-svn: 44601
2007-12-05 03:22:34 +00:00