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5042 Commits

Author SHA1 Message Date
Eli Friedman
ab7b99ab9c Convert more tests to new atomic instructions. 
llvm-svn: 140567
 2011-09-26 21:36:10 +00:00
Eli Friedman
6fb0c1e474 Convert more tests over to the new atomic instructions. 
I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.

llvm-svn: 140566
 2011-09-26 21:30:17 +00:00
Eli Friedman
c064f2c33e Convert more tests over to the new atomic instructions. 
llvm-svn: 140559
 2011-09-26 20:27:49 +00:00
Justin Holewinski
1395cf8423 PTX: Fix detection of stack load/store vs. global load/store, as well as fix the 
printing of local offsets

llvm-svn: 140547
 2011-09-26 18:57:22 +00:00
Justin Holewinski
55f340eb62 PTX: Add .align tests to stack object test file 
llvm-svn: 140537
 2011-09-26 16:20:38 +00:00
Justin Holewinski
14defde057 PTX: Fix some lingering issues with stack allocation 
llvm-svn: 140535
 2011-09-26 16:20:34 +00:00
Justin Holewinski
d40f5ababf PTX: Unify handling of loads/stores 
llvm-svn: 140533
 2011-09-26 16:20:28 +00:00
David Meyer
1748b37acd Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are supported 
llvm-svn: 140517
 2011-09-26 06:44:27 +00:00
David Meyer
b1fbf9ff26 PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval 
llvm-svn: 140516
 2011-09-26 06:13:20 +00:00
Jakob Stoklund Olesen
55cf2ed148 Only run MF.verify() with EXPENSIVE_CHECKS=1. 
llvm-svn: 140441
 2011-09-24 01:11:19 +00:00
Jakob Stoklund Olesen
3bb99bc957 Verify that terminators follow non-terminators. 
This exposes a -segmented-stacks bug.

llvm-svn: 140429
 2011-09-23 22:45:39 +00:00
Eli Friedman
8a15a5aa93 PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that. 
llvm-svn: 140428
 2011-09-23 22:41:57 +00:00
Jakob Stoklund Olesen
2056d15bd9 Also match negative offsets for addrmode3 and addrmode5. 
Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

llvm-svn: 140425
 2011-09-23 22:10:33 +00:00
Justin Holewinski
37f35f0083 PTX: Handle function call return values 
llvm-svn: 140386
 2011-09-23 16:48:41 +00:00
Justin Holewinski
6c23d2ee55 PTX: Start fixing function calls 
llvm-svn: 140378
 2011-09-23 14:31:12 +00:00
Eli Friedman
64a4bf1788 PR10989: Don't print .hidden on Windows. 
llvm-svn: 140356
 2011-09-23 00:13:02 +00:00
Eli Friedman
87c844cdf8 PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.) 
llvm-svn: 140355
 2011-09-22 23:41:28 +00:00
Dan Gohman
e83e1b2d2c Fix SimplifySelectCC to add newly created nodes to the DAGCombiner 
worklist, as it may be possible to perform further optimization on them.

llvm-svn: 140349
 2011-09-22 23:01:29 +00:00
Duncan Sands
0e4fcb8e3b Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from 
floating point add/sub of appropriate shuffle vectors.  Does not
synthesize the 256 bit AVX versions because they work differently.

llvm-svn: 140332
 2011-09-22 20:15:48 +00:00
Justin Holewinski
5862332f59 PTX: fixup test cases for register changes 
llvm-svn: 140311
 2011-09-22 16:45:51 +00:00
Devang Patel
5e6b65cf0d Do not unnecessarily use AT_specification DIE because it does not add any value. 
Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.

llvm-svn: 140282
 2011-09-21 23:41:11 +00:00
Akira Hatanaka
4ce4a61cac Remove +. 
llvm-svn: 140266
 2011-09-21 17:43:48 +00:00
Akira Hatanaka
24b6588743 Re-enable some of the disabled tests. Use FileCheck instead of grep to check 
output.

llvm-svn: 140263
 2011-09-21 17:36:30 +00:00
Nadav Rotem
253a7391ee add another testcase for pr10902 
llvm-svn: 140257
 2011-09-21 17:13:40 +00:00
Nadav Rotem
bc9ba30158 [VECTOR-SELECT] Address one of the bugs in pr10902. 
Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.

llvm-svn: 140249
 2011-09-21 14:34:38 +00:00
Eric Christopher
155137bd10 Remove llvm-gcc and various compiler handling from llvm. It's not needed 
here anymore and has been migrated to the test-suite project.

llvm-svn: 140216
 2011-09-20 23:58:15 +00:00
Bill Wendling
36faa4d49c This test is completely invalid with the modern EH model. Delete. 
llvm-svn: 140213
 2011-09-20 23:52:09 +00:00
Bruno Cardoso Lopes
6cb23f6e7f Add a DAGCombine for subvector extracts to remove useless chains of 
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.

llvm-svn: 140204
 2011-09-20 23:19:33 +00:00
Bruno Cardoso Lopes
8058234b32 Revert r140097, working on a better approach 
llvm-svn: 140203
 2011-09-20 23:19:29 +00:00
Evan Cheng
61a003315e Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911. 
llvm-svn: 140181
 2011-09-20 21:38:18 +00:00
NAKAMURA Takumi
011be52871 test/CodeGen/X86/avx-minmax.ll: Unbreak Win32. 
On Windows x64, 128-bit arguments are not passed by reg but by indirect. eg.

maxpd:
        vmovapd (%rcx), %xmm0
        vmaxpd  (%rdx), %xmm0, %xmm0

FIXME: I don't care YMM on x64 for now.
llvm-svn: 140143
 2011-09-20 14:11:35 +00:00
Craig Topper
68c92d86da Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd. 
llvm-svn: 140140
 2011-09-20 07:38:59 +00:00
Andrew Trick
8586e62d91 ARM isel bug fix for adds/subs operands. 
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile

llvm-svn: 140134
 2011-09-20 03:17:40 +00:00
Bruno Cardoso Lopes
0828ab04bf Attempt to fix -mtriple=i686-{cygwin|mingw|win32} regressions. Nakamura, 
if this doesn't work, please provide more details.

llvm-svn: 140107
 2011-09-20 00:08:12 +00:00
Bruno Cardoso Lopes
51792dcc4d Based on the small opt Zvi's patch was trying to achieve, eliminate 
128-bit undef subvector insertion into a 256-bit vector

llvm-svn: 140097
 2011-09-19 23:36:50 +00:00
Eli Friedman
eb1bd24134 Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier). 
llvm-svn: 140074
 2011-09-19 22:02:33 +00:00
Bruno Cardoso Lopes
d4a3d452d4 Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix 
PR10955 and PR10948.

llvm-svn: 140069
 2011-09-19 21:29:24 +00:00
Nadav Rotem
261a10a007 setOperationAction should be done on the return value of the type, not the operands. 
llvm-svn: 140001
 2011-09-18 14:57:03 +00:00
Nadav Rotem
7ae11279e9 When promoting integer vectors we often create ext-loads. This patch adds a 
dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.

llvm-svn: 139995
 2011-09-18 10:39:32 +00:00
Benjamin Kramer
98e5736295 Apply Duncan's test fix from r139986 to the avx version of that test too. 
llvm-svn: 139992
 2011-09-18 00:41:38 +00:00
Duncan Sands
f2b8c854dd Synthesize x86 max/min instructions also for vectors (i.e. produce 
maxps and maxpd).  This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it.  Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.

llvm-svn: 139986
 2011-09-17 16:49:39 +00:00
Andrew Trick
31004375fc Test case trial and error. Not sure the proper way to check MBB names. 
llvm-svn: 139900
 2011-09-16 03:57:19 +00:00
Andrew Trick
b57d9c38a2 Reduced a stronger test case for coalescer bug PR10920. 
llvm-svn: 139898
 2011-09-16 03:46:49 +00:00
Eli Friedman
ee8f14a799 Some legalization fixes for atomic load and store. 
llvm-svn: 139851
 2011-09-15 21:20:49 +00:00
Jakob Stoklund Olesen
53e2e48de7 VirtRegMap is counting spill slots, not register spills. 
Fix the stats counters to reflect that.

llvm-svn: 139819
 2011-09-15 18:31:13 +00:00
Bruno Cardoso Lopes
fa1ca3070b Change all checks regarding the presence of any SSE level to always 
take into consideration the presence of AVX. This change, together with
the SSEDomainFix enabled for AVX, makes AVX codegen to always (hopefully)
emit the same code as SSE for 128-bit vector ops. I don't
have a testcase for this, but AVX now beats SSE in performance for
128-bit ops in the majority of programas in the llvm testsuite

llvm-svn: 139817
 2011-09-15 18:27:36 +00:00
Andrew Trick
76a86d3d4c [regcoalescing] bug fix for RegistersDefinedFromSameValue. 
An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal.
Fixes PR10920 401.bzip2 miscompile with no IV rewrite.

llvm-svn: 139765
 2011-09-15 01:09:33 +00:00
Nadav Rotem
d748dbacb0 Add integer promotion support for vselect 
llvm-svn: 139692
 2011-09-14 14:42:15 +00:00
Bruno Cardoso Lopes
333a59eced Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss". 
llvm-svn: 139686
 2011-09-14 02:36:14 +00:00
Devang Patel
edc216515e Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 
llvm-svn: 139675
 2011-09-14 00:29:50 +00:00