1613 Commits

Author SHA1 Message Date
Nico Weber
184ca39529
[llvm] Move CodeGenTypes library to its own directory (#79444)
Finally addresses https://reviews.llvm.org/D148769#4311232 :)

No behavior change.
2024-01-25 12:01:31 -05:00
Wang Pengcheng
a2af374284
[SelectionDAG] Add space-optimized forms of OPC_CheckPredicate (#77763)
We record the usage of each `Predicate` and sort them by usage.

For the top 8 `Predicate`s, we will emit a `PC_CheckPredicateN` to
save one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 61K.

This is a recommit of 1a57927, which was reverted in bc98c31.

The CI failures occurred when doing expensive checks (with option
`LLVM_ENABLE_EXPENSIVE_CHECKS` being ON).

The key point here is that we need stable sorting result in the
test, but doing expensive checks uncovered the non-determinism of
`llvm::sort`. So `llvm::sort` is changed to `llvm::stable_sort`
in this revised patch.

And we use `llvm::MapVector` to keep insertion order.
2024-01-12 11:38:05 +08:00
Mikhail Goncharov
bc98c3103a Revert "[SelectionDAG] Add space-optimized forms of OPC_CheckPredicate (#73488)"
This reverts commit 1a5792735aa0bb10e5624a438bcf7fd5091ee265.

Test address-space-patfrags.td.test is failing

https://lab.llvm.org/buildbot/#/builders/104/builds/15012
2024-01-11 12:25:00 +01:00
Wang Pengcheng
1a5792735a
[SelectionDAG] Add space-optimized forms of OPC_CheckPredicate (#73488)
We record the usage of each `Predicate` and sort them by usage.

For the top 8 `Predicate`s, we will emit a `PC_CheckPredicateN` to
save one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 61K.
2024-01-11 15:43:40 +08:00
Wang Pengcheng
5c8d123838
[SelectionDAG] Add space-optimized forms of OPC_CheckPatternPredicate (#73319)
We record the usage of each `PatternPredicate` and sort them by
usage.

For the top 8 `PatternPredicate`s, we will emit a
`OPC_CheckPatternPredicateN` to save one byte.

The old `OPC_CheckPatternPredicate2` is renamed to
`OPC_CheckPatternPredicateTwoByte`.

Overall this reduces the llc binary size with all in-tree targets by
about 93K.
2024-01-11 15:36:21 +08:00
Wang Pengcheng
211abe38d8
[SelectionDAG] Add space-optimized forms of OPC_CheckComplexPat (#73310)
We record the usage of each `ComplexPat` and sort the `ComplexPat`s
by usage.

For the top 8 `ComplexPat`s, we will emit a `OPC_CheckComplexPatN`
to save one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 89K.
2024-01-11 15:28:12 +08:00
Alex Bradbury
197214e39b
[RFC][SelectionDAG] Add and use SDNode::getAsZExtVal() helper (#76710)
This follows on from #76708, allowing
`cast<ConstantSDNode>(N)->getZExtValue()` to be replaced with just
`N->getAsZextVal();`
    
Introduced via `git grep -l "cast<ConstantSDNode>\(.*\).*getZExtValue" |
xargs sed -E -i
's/cast<ConstantSDNode>\((.*)\)->getZExtValue/\1->getAsZExtVal/'` and
then using `git clang-format` on the result.
2024-01-09 12:25:17 +00:00
Orlando Cazalet-Hyams
10b03e6662
[RemoveDIs] Handle DPValues in FastISel (#76952)
The change is fairly mechanical:
1. Factor code from `FastISel::selectIntrinsicCall`, which converts
debug intrinsics into debug instructions, into functions (NFC).
2. Call those functions for DPValues attached to instructions too.

The test updates look the same as other RemoveDIs changes: re-run the
tests with `--try-experimental-debuginfo-iterators`, which checks the
output is identical using the new debug info format (if it has been
enabled in the cmake configuration).

Depends on #76941 (otherwise some modified tests spuriously fail).
2024-01-05 15:11:47 +00:00
Alex Bradbury
80aeb62211
[llvm][NFC] Use SDValue::getConstantOperandVal(i) where possible (#76708)
This helper function shortens examples like
`cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();` to
`Node->getConstantOperandVal(1);`.

Implemented with:
`git grep -l
"cast<ConstantSDNode>\(.*->getOperand\(.*\)\)->getZExtValue\(\)" | xargs
sed -E -i

's/cast<ConstantSDNode>\((.*)->getOperand\((.*)\)\)->getZExtValue\(\)/\1->getConstantOperandVal(\2)/`
and `git grep -l
"cast<ConstantSDNode>\(.*\.getOperand\(.*\)\)->getZExtValue\(\)" | xargs
sed -E -i

's/cast<ConstantSDNode>\((.*)\.getOperand\((.*)\)\)->getZExtValue\(\)/\1.getConstantOperandVal(\2)/'`.
With a couple of simple manual fixes needed. Result then processed by
`git clang-format`.
2024-01-02 13:14:28 +00:00
Wang Pengcheng
9348d437f5
[SelectionDAG] Add space-optimized forms of OPC_EmitRegister (#73291)
The followed byte of `OPC_EmitRegister` is a MVT type, which is
usually i32 or i64.

We add `OPC_EmitRegisterI32` and `OPC_EmitRegisterI64` so that we
can reduce one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 10K.
2023-12-19 17:31:49 +08:00
Ulrich Weigand
82a1bffd34
[SelectionDAG] Do not crash on large integers in CheckInteger (#75787)
The CheckInteger routine called from TableGen-generated selection logic
uses getSExtValue - which will abort if the underlying APInt does not
fit into an int64_t.

This case is now triggered by the SystemZ back-end since i128 is a legal
type on certain machines. While we do not have any regular instructions
that take 128-bit immediates (like most other platforms), there are
patterns in the .td files that recognize an i128 "xor ..., -1" as a
"not".

These patterns cause code to be generated that calls the CheckInteger
routine on some i128-valued integer, which may trigger the assert.

Fix by using trySExtValue instead.

Fixes https://github.com/llvm/llvm-project/issues/75710
2023-12-18 14:03:57 +01:00
Orlando Cazalet-Hyams
5ee088134f
[DebugInfo][RemoveDIs] Handle dbg.declares in SelectionDAGISel (#73496)
This is a boring mechanical update to support DPValues that look like
dbg.declares in SelectionDAG.

The tests will become "live" once #74090 lands (see for more info).
2023-12-12 11:32:19 +00:00
Wang Pengcheng
714417455d
[SelectionDAG] Add OPC_MoveSibling (#73643)
There are a lot of operations to move current node to parent and
then move to another child.

So `OPC_MoveSibling` and its space-optimized forms are added to do
this "move to sibling" operations.

These new operations will be generated when optimizing matcher in
`ContractNodes`. Currently `MoveParent+MoveChild` will be optimized
to `MoveSibling` and sequences `MoveParent+RecordChild+MoveChild`
will be transformed into `MoveSibling+RecordNode`.

Overall this reduces the llc binary size with all in-tree targets by
about 30K.
2023-12-12 17:48:45 +08:00
Wang Pengcheng
0d5f1cc4d0
[SelectionDAG] Add space-optimized forms of OPC_EmitNode/OPC_MorphNodeTo (#73502)
If there is only one bit set in EmitNodeInfo, then we can encode it
implicitly to save one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 168K.
2023-12-12 17:45:32 +08:00
Wang Pengcheng
6111f5c592
[SelectionDAG] Add instantiated OPC_CheckChildType (#73297)
The most common type is i32 or i64 so we add `OPC_CheckChildTypeI32`
and `OPC_CheckChildTypeI64` to save one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 70K.
2023-12-12 17:31:12 +08:00
Wang Pengcheng
cbf1d58820
[SelectionDAG] Add space-optimized forms of OPC_EmitCopyToReg (#73293)
These new opcodes implicitly indicate the RecNo.

The old `OPC_EmitCopyToReg2` is renamed to `OPC_EmitCopyToRegTwoByte`.

Overall this reduces the llc binary size with all in-tree targets by
about 33K (most are from RISCV target).
2023-12-12 17:25:33 +08:00
Wang Pengcheng
50c174f99f
[SelectionDAG] Add space-optimized forms of OPC_EmitConvertToTarget (#73286)
These new opcodes implicitly indicate the RecNo.

Overall this reduces the llc binary size with all in-tree targets by
about 13K.
2023-12-12 17:13:43 +08:00
Wang Pengcheng
e052c68869
[SelectionDAG] Add instantiated OPC_CheckType (#73283)
The most common type is i32 or i64 so we add `OPC_CheckTypeI32` and
`OPC_CheckTypeI64` to save one byte.

Overall this reduces the llc binary size with all in-tree targets by
about 29K.
2023-12-12 17:12:08 +08:00
Wang Pengcheng
d49e9d88a2
[SelectionDAG][NFC] Replace C-style casting with static_cast (#74060)
Fix comments in #73283.
2023-12-04 15:36:54 +08:00
Wang Pengcheng
2e6c01be0d
[SelectionDAG] Add instantiated OPC_EmitInteger and OPC_EmitStringInteger (#73241)
These two opcodes are used to be followed by a MVT operand, which is
always one of i8/i16/i32/i64.

We add instantiated `OPC_EmitInteger` and `OPC_EmitStringInteger` with
i8/i16/i32/i64 so that we can reduce one byte.

We reserve `OPC_EmitInteger` and `OPC_EmitStringInteger` in case that
we may need them someday, though I haven't found one usage after this
change.

Overall this reduces the llc binary size with all in-tree targets by
about 200K.
2023-11-27 11:08:28 +08:00
Jeremy Morse
4495485eb6
[DebugInfo][RemoveDIs] Interpret DPValue objects in SelectionDAG (#72253)
DPValues are the non-intrinsic replacements for dbg.values, and when an
IR function is converted by SelectionDAG we need to convert the variable
location information in the same way. Happily all the information is in
the same format, it's just stored in a slightly different object,
therefore this patch refactors a few things to store the set of
{Variable,Expr,DILocation,Location} instead of just a pointer to a
DbgValueInst.

This also adds a hook in llc that's much like the one I've added to opt
in PR #71937, allowing tests to optionally ask for the use RemoveDIs
mode if support for it is built into the compiler.

I've added that flag to a variety of SelectionDAG debug-info tests to
ensure that we get some coverage on the RemoveDIs / debug-info-iterator
buildbot.
2023-11-21 17:10:25 +00:00
Min-Yih Hsu
0e24179797
[SelectionDAG] Add support to filter SelectionDAG dumps during ISel by function names (#72696)
`-debug-only=isel-dump` is the new debug type for printing SelectionDAG
after each ISel phase. This can be furthered filter by
`-filter-print-funcs=<function names>`.
Note that the existing `-debug-only=isel` will take precedence over the
new behavior and print SelectionDAG dumps of every single function
regardless of `-filter-print-funcs`'s values.
2023-11-20 14:00:47 -08:00
Felipe de Azevedo Piovezan
83729e6716
[SelectionDAG] Disable FastISel for swiftasync functions (#70741)
Most (x86) swiftasync functions tend to use both SelectionDAGISel and
FastISel lowering:
* FastISel argument lowering can only handle C calling convention.
* FastISel fails mid-BB in a number of ways, including in simple `ret
void` instructions under certain circumstances.

This dance of SelectionDAG (argument) -> FastISel (some instructions) ->
SelectionDAG(remaining instructions) is lossy; in particular, Argument
information lowering is cleared after that first SelectionDAG run.

Since swiftasync functions rely heavily on proper Argument lowering for
debug information, this patch disables the use of FastISel in such
functions.
2023-11-13 08:27:29 -08:00
Craig Topper
98bd0d9dd2
[SelectionDAG] Adjust placement of blank lines in debug output. NFC (#70969)
Also add a blank line to the beginning of every dump of the SelectionDAG
to visually separate it from whatever the last message was.

Add a blank line before "Legalizing node:" in the type legalizer. Remove
the blank line after things like "Promote integer result:".

This keeps all of the messages for the legalization of a single node
grouped together with no blank lines in the middle. This is consistent
with the operation legalizers.
2023-11-02 09:35:04 -07:00
Kazu Hirata
f9306f6de3
[ADT] Rename llvm::erase_value to llvm::erase (NFC) (#70156)
C++20 comes with std::erase to erase a value from std::vector.  This
patch renames llvm::erase_value to llvm::erase for consistency with
C++20.

We could make llvm::erase more similar to std::erase by having it
return the number of elements removed, but I'm not doing that for now
because nobody seems to care about that in our code base.

Since there are only 50 occurrences of erase_value in our code base,
this patch replaces all of them with llvm::erase and deprecates
llvm::erase_value.
2023-10-24 23:03:13 -07:00
Arthur Eubanks
0a1aa6cda2
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::
2023-09-14 14:10:14 -07:00
Nick Desaulniers
86735a4353
reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66264)
reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66003)

This reverts commit ee643b706be2b6bef9980b25cc9cc988dab94bb5.

Fix up build failures in targets I missed in #66003

Kept as 3 commits for reviewers to see better what's changed. Will
squash when
merging.

- reland [InlineAsm] wrap ConstraintCode in enum class NFC (#66003)
- fix all the targets I missed in #66003
- fix off by one found by llvm/test/CodeGen/SystemZ/inline-asm-addr.ll
2023-09-13 13:31:24 -07:00
Reid Kleckner
ee643b706b Revert "[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)"
This reverts commit 2ca4d136124d151216aac77a0403dcb5c5835bcd.

Also revert the followup, "[InlineAsm] fix botched merge conflict resolution"

This reverts commit 8b9bf3a9f715ee5dce96eb1194441850c3663da1.

There were SystemZ and Mips build errors, too many to fix forward.
2023-09-13 09:58:02 -07:00
Nick Desaulniers
2ca4d13612
[InlineAsm] wrap ConstraintCode in enum class NFC (#66003)
Similar to
commit 2fad6e69851e ("[InlineAsm] wrap Kind in enum class NFC")

Fix the TODOs added in
commit 93bd428742f9 ("[InlineAsm] refactor InlineAsm class NFC
(#65649)")
2023-09-13 08:48:09 -07:00
Nick Desaulniers
93bd428742
[InlineAsm] refactor InlineAsm class NFC (#65649)
I would like to steal one of these bits to denote whether a kind may be
spilled by the register allocator or not, but I'm afraid to touch of any
this code using bitwise operands.

Make flags a first class type using bitfields, rather than launder data
around via `unsigned`.
2023-09-11 09:27:37 -07:00
Fangrui Song
111fcb0df0 [llvm] Fix duplicate word typos. NFC
Those fixes were taken from https://reviews.llvm.org/D137338
2023-09-01 18:25:16 -07:00
Daniel Paoliello
0c5c7b52f0 Emit the CodeView S_ARMSWITCHTABLE debug symbol for jump tables
The CodeView `S_ARMSWITCHTABLE` debug symbol is used to describe the layout of a jump table, it contains the following information:

* The address of the branch instruction that uses the jump table.
* The address of the jump table.
* The "base" address that the values in the jump table are relative to.
* The type of each entry (absolute pointer, a relative integer, a relative integer that is shifted).

Together this information can be used by debuggers and binary analysis tools to understand what an jump table indirect branch is doing and where it might jump to.

Documentation for the symbol can be found in the Microsoft PDB library dumper: 0fe89a942f/cvdump/dumpsym7.cpp (L5518)

This change adds support to LLVM to emit the `S_ARMSWITCHTABLE` debug symbol as well as to dump it out (for testing purposes).

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D149367
2023-08-31 12:06:50 -07:00
Nick Desaulniers
2fad6e6985 [InlineAsm] wrap Kind in enum class NFC
Should add some minor type safety to the use of this information, since
there's quite a bit of metadata being laundered through an `unsigned`.

I'm looking to potentially add more bitfields to that `unsigned`, but I
find InlineAsm's big ol' bag of enum values and usage of `unsigned`
confusing, type-unsafe, and un-ergonomic. These can probably be better
abstracted.

I think the lack of static_cast outside of InlineAsm indicates the prior
code smell fixed here.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D159242
2023-08-31 08:54:51 -07:00
Arthur Eubanks
0a4fc4ac1c Revert "Emit the CodeView S_ARMSWITCHTABLE debug symbol for jump tables"
This reverts commit 8d0c3db388143f4e058b5f513a70fd5d089d51c3.

Causes crashes, see comments in https://reviews.llvm.org/D149367.

Some follow-up fixes are also reverted:

This reverts commit 636269f4fca44693bfd787b0a37bb0328ffcc085.
This reverts commit 5966079cf4d4de0285004eef051784d0d9f7a3a6.
This reverts commit e7294dbc85d24a08c716d9babbe7f68390cf219b.
2023-08-25 18:34:15 -07:00
Daniel Paoliello
8d0c3db388 Emit the CodeView S_ARMSWITCHTABLE debug symbol for jump tables
The CodeView `S_ARMSWITCHTABLE` debug symbol is used to describe the layout of a jump table, it contains the following information:

* The address of the branch instruction that uses the jump table.
* The address of the jump table.
* The "base" address that the values in the jump table are relative to.
* The type of each entry (absolute pointer, a relative integer, a relative integer that is shifted).

Together this information can be used by debuggers and binary analysis tools to understand what an jump table indirect branch is doing and where it might jump to.

Documentation for the symbol can be found in the Microsoft PDB library dumper: 0fe89a942f/cvdump/dumpsym7.cpp (L5518)

This change adds support to LLVM to emit the `S_ARMSWITCHTABLE` debug symbol as well as to dump it out (for testing purposes).

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D149367
2023-08-25 10:19:17 -07:00
Felipe de Azevedo Piovezan
88417098bb [CodeGen][DebugInfo] Append OP_deref when converting an EntryValue dbg.declare
When we convert an EntryValue dbg.declare into an entry of the MF side table, we
currently copy its DIExpression as is, and rely on subsequent layers to "know"
that this expression is implicitly indirect. This is bad because it adds an
implicit assumption to the IR representation, and requires subsequent layers to
know about this assumption. This also limits the reusability of this table:
what if, in the future, we want to use this table for dbg.values?

This patch changes existing behavior so that the entities converting
dbg_declares explicitly add an OP_deref when converting EntryValue dbg.declares.

Differential Revision: https://reviews.llvm.org/D158437
2023-08-23 12:25:12 -04:00
Craig Topper
a3a7e76893 [SelectionDAG] Add Opc_CheckPatternPredicate2 to support targets with more than 256 predicates.
This is an alternative to D156967 where I suggested the author
could use a VBR type.

This patch takes inspirations from Opc_EmitRegister2 that is used
for two byte registers.

I'm assuming 1 or 2 byte predicates should be enough so we don't
need the fully generality of VBR.

This avoids impacting the table size on targets that have more than
128 predicates already like X86.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D157196
2023-08-05 16:59:45 -07:00
Felipe de Azevedo Piovezan
2da29955fb [SelectionDAG][DebugInfo] Implement translation of entry_value vars
This commit implements SelectionDAG lowering of dbg.declare intrinsics targeting
swiftasync Arguments, by putting them in the MachineFunction's table of
variables whose location doesn't change throughout the function.

Depends on D149882

Differential Revision: https://reviews.llvm.org/D149883
2023-05-12 12:00:13 -04:00
Felipe de Azevedo Piovezan
a524f84780 [SelectionDAG][NFCI] Use common logic for identifying MMI vars
After function argument lowering, but prior to instruction selection,
dbg declares pointing to function arguments are lowered using special
logic.

Later, during instruction selection (both "fast" and regular ISel), this
logic is "repeated" in order to identify which intrinsics have already
been lowered. This is bad for two reasons:

1. The logic is not _really_ repeated, the code is different, which
could lead to duplicate lowering of the intrinsic.
2. Even if the logic were repeated properly, this is still code
duplication.

This patch addresses these issues by storing all preprocessed
dbg.declare intrinsics in a set inside FuncInfo; the set is queried upon
instruction selection.

Differential Revision: https://reviews.llvm.org/D149682
2023-05-03 10:58:31 -04:00
NAKAMURA Takumi
c1221251fb Restore CodeGen/MachineValueType.h from Support
This is rework of;

  - rG13e77db2df94 (r328395; MVT)

Since `LowLevelType.h` has been restored to `CodeGen`, `MachinveValueType.h`
can be restored as well.

Depends on D148767

Differential Revision: https://reviews.llvm.org/D149024
2023-05-03 00:13:20 +09:00
OCHyams
2ccbd19473 [Assignment Tracking][SelectionDAG] Fix dbg.declare location nullptr deref
Debug intrinsics sometimes end up with empty metadata location operands. The
debug intrinsic interfaces return nullptr when retrieving location operand in
this case.

When assignment tracking is not enabled a dbg.declare with a nullptr location
operand is skipped. Do the same when assignment tracking is enabled (a nullptr
address component of a dbg.assign is already handled correctly.

Reviewed By: jmorse

Differential Revision: https://reviews.llvm.org/D148203
2023-04-18 08:43:54 +01:00
Alexis Engelke
8e59fe2d8e [FastISel] Correctly report prototype on miss
The type of a function is nowadays just an opaque pointer, which is not
helpful when analyzing FastISel misses. Instead print the actual
function type of the function.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D147716
2023-04-11 11:49:08 +02:00
Craig Topper
b5f207e5b2 [SelectionDAG] Rename Flag->Glue. NFC 2023-04-02 19:46:51 -07:00
Phoebe Wang
0efe111365 Reland "[Windows SEH]: HARDWARE EXCEPTION HANDLING (MSVC -EHa) - Part 2"
This reverts commit db6a979ae82410e42430e47afa488936ba8e3025.

Reland D102817 without any change. The previous revert was a mistake.

Differential Revision: https://reviews.llvm.org/D102817
2023-03-29 08:59:56 +08:00
OCHyams
7d89437455 [Assignment Tracking][NFC] Use RawLocationWrapper in VarLocInfo [2/x]
Use RawLocationWrapper rather than a Value to represent the location operand(s)
so that it's possible to represent multiple location
operands. AssignmentTrackingAnalysis still converts variadic debug intrinsics
to kill locations so this patch is NFC.

Reviewed By: StephenTozer

Differential Revision: https://reviews.llvm.org/D145911
2023-03-16 09:55:15 +00:00
pvanhout
1f1fea6c38 Reland: [DAG/AMDGPU] Use UniformityAnalysis in DAGISel
Switch DAGISel over to UniformityAnalysis, which was one of the last remaining users of the DivergenceAnalysis.
No explosions seen during internal testing so this looks like a smooth transition.

Reviewed By: sameerds

Differential Revision: https://reviews.llvm.org/D145918
2023-03-14 14:38:45 +01:00
pvanhout
0e79106fc9 Revert "[DAG/AMDGPU] Use UniformityAnalysis in DAGISel"
This reverts commit 0022b5803fd4f5a4e9fcf233267c0ffa1b88f763.
2023-03-14 11:48:58 +01:00
pvanhout
0022b5803f [DAG/AMDGPU] Use UniformityAnalysis in DAGISel
Switch DAGISel over to UniformityAnalysis, which was one of the last remaining users of the DivergenceAnalysis.
No explosions seen during internal testing so this looks like a smooth transition.

Reviewed By: sameerds

Differential Revision: https://reviews.llvm.org/D145918
2023-03-14 11:18:28 +01:00
Philip Reames
3be1ae24fb [CodeGen] Add standard print/debug utilities to MVT
Doing so makes it easier to do printf style debugging in idiomatic manner. I followed the code structure of Value with only the definition of dump being #ifdef out in non-debug builds. Not sure if this is the "right" option; we don't seem to have any single consistent scheme on how dump is handled.

Note: This is a follow up to D143454 which did the same for EVT.

Differential Revision: https://reviews.llvm.org/D143511
2023-02-07 10:50:14 -08:00
Stefan Gränitz
3b387d1070 Lift EHPersonalities from Analysis to IR (NFC)
Computing EH-related information was only relevant for analysis passes so far. Lifting it to IR will allow the IR Verifier to calculate EH funclet coloring and validate funclet operand bundles in a follow-up step.

Reviewed By: rnk, compnerd

Differential Revision: https://reviews.llvm.org/D138122
2023-01-27 18:05:13 +01:00