33653 Commits

Author SHA1 Message Date
Vasileios Porpodas
dda2a5d457 [SLP][NFC] Rename a couple of variables and replace an if-else with an std::min
- Rename `LimitForRegisterSize` to `MaxVFOnly` to make the meaning of the limit less ambiguous
- Rename `OpsWidth` to `ActualVF`, which makes it clear that this is the VF we are using for vectorization.
- Replace the if-else code for the initialization of OpsWidth with an std::min.

Differential Revision: https://reviews.llvm.org/D150241
2023-05-10 09:37:58 -07:00
Benjamin Kramer
a414db1d8e Revert "[SimpleLoopUnswitch] unswitch selects"
This reverts commit 21f226fc4591db6e98faf380137a42067c909582. Crashes on
this test case:

define void @test2() nounwind {
entry:
  br label %bb.nph

bb.nph:                                           ; preds = %entry
  %and.i13521 = and <4 x i1> undef, undef
  br label %for.body

for.body:                                         ; preds = %for.body, %bb.nph
  %or.i = select <4 x i1> %and.i13521, <4 x i32> undef, <4 x i32> undef
  br i1 false, label %for.body, label %for.end

for.end:                                          ; preds = %for.body, %entry
  ret void
}
2023-05-10 15:12:21 +02:00
Joshua Cao
21f226fc45 [SimpleLoopUnswitch] unswitch selects
The old LoopUnswitch pass unswitched selects, but the changes were never
ported to the new SimpleLoopUnswitch.

We unswitch by turning:

```
S = select %cond, %a, %b
```

into:

```
head:
br %cond, label %then, label %tail

then:
br label %tail

tail:
S = phi [ %a, %then ], [ %b, %head ]
```

Unswitch selects are always nontrivial, since the successors do not exit
the loop and the loop body always needs to be cloned.

Unswitch selects always need to freeze the conditional if the
conditional could be poison or undef. Selects don't propagate
poison/undef, and branches on poison/undef causes UB.

Reviewed By: nikic, kachkov98, vitalybuka

Differential Revision: https://reviews.llvm.org/D138526
2023-05-10 00:40:28 -07:00
Enna1
11dd1fe32f [NFC][HWASAN] replace redundant calls to IRBuilder::get*Ty() with saved types
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D149628
2023-05-10 09:29:32 +08:00
Nathan Sidwell
03fde97d49 [NFC] Refactor loop metadata movement
* Use 'if (T v = expr)' idiom
* llvm.loop is a fixed metadata ID

Differential Revision: https://reviews.llvm.org/D150109

Reviewed By: kazu
2023-05-09 18:43:59 -04:00
Jordan Rupprecht
e08c397a88 Revert "[AggressiveInstCombine] folding load for constant global patterened arrays and structs by GEP-indices Differential Revision: https://reviews.llvm.org/D146622 Fixes https://github.com/llvm/llvm-project/issues/61615"
This reverts commit 0574a4be879e07b48ba9be8d63eebba49a04dfe8. It causes a compiler crash due to a div by zero.
2023-05-09 10:38:46 -07:00
Zain Jaffal
5d3a884229 [IRGen] Change annotation metadata to support inserting tuple of strings into annotation metadata array.
Annotation metadata supports adding singular annotation strings to annotation block. This patch adds the ability to insert a tuple of strings into the metadata array.

The idea here is that each tuple of strings represents a piece of information that can be all related. It makes it easier to parse through related metadata information given it will be contained in one tuple.
For example in remarks any pass that implements annotation remarks can have different type of remarks and pass additional information for each.

The original behaviour of annotation remarks is preserved here and we can mix tuple annotations and single annotations for the same instruction.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D148328
2023-05-09 17:51:28 +03:00
khei4
0574a4be87 [AggressiveInstCombine] folding load for constant global patterened arrays and structs by GEP-indices Differential Revision: https://reviews.llvm.org/D146622 Fixes https://github.com/llvm/llvm-project/issues/61615 2023-05-09 23:22:21 +09:00
Florian Hahn
c096e91735
[VPlan] Address missed suggestions from D149082.
This address 2 comments missed from D149082. It sets inbounds directly
when creating the GEP and fixes the order in the enum.
2023-05-09 15:17:20 +01:00
Vedant Paranjape
438e1cff7b [PartialInlining] Fix incorrect costing when IR has unreachable BBs
Partial Inlining identifies basic blocks that can be outlined into a
function. It is possible that an unreachable basic block is marked for
outlining. During costing of the outlined region, such unreachable basic
blocks are included as well. However, the CodeExtractor eliminates such
unreachable basic blocks and emits outlined function without them.

Thus, during costing of the outlined function, it is possible that the
cost of the outlined function comes out to be lesser than the cost of
outlined region, which triggers an assert.

Assertion `OutlinedFunctionCost >= Cloner.OutlinedRegionCost && "Outlined
function cost should be no less than the outlined region"' failed.

This patch adds code to eliminate unreachable blocks from the function
body before passing it on to be inlined. It also adds a test that checks
for behaviour of costing in case of unreachable basic blocks.

Discussion: https://discourse.llvm.org/t/incorrect-costing-in-partialinliner-if-ir-has-unreachable-basic-blocks/70163

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D149130
2023-05-09 11:58:05 +00:00
Florian Hahn
5f3343985b
[VPlan] Use VPRecipeWithIRFlags for VPWidenGEPRecipe (NFCI).
Extend VPRecipeWithIRFlags to also include InBounds and use for VPWidenGEPRecipe.

The last remaining recipe that needs updating for
MayGeneratePoisonRecipes is VPReplicateRecipe.

Depends on D149081.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D149082
2023-05-09 12:33:28 +01:00
Alexandros Lamprineas
929a8c9f72 [FuncSpec][NFC] Rename cryptic variable to better describe it.
UM -> UniqueSpecs

Brought up on the review of D145379. Committing it seperately for now
since the Cost model improvements need rethink.
2023-05-09 11:55:40 +01:00
Alexandros Lamprineas
93ac2dbefc [FuncSpec][NFC] Add an alias for InstructionCost.
Split from D145379. I'll rethink the Cost model improvements and
commit separately.
2023-05-09 11:37:48 +01:00
Kan Wu
b8d2f7177c [MemProf] Add hot allocation type
Add "Hot" AllocationType (in addition to existing cold, notcold).

Use lifetime access density as metric to identify hot allocations.
Treat hot as notcold for MemProfContextDisambiguation for now
before the disambiguation for "hot" is done.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D149932
2023-05-08 10:34:53 -07:00
Zhongyunde
ae337ed595 [MergeICmps] Adapt to non-eq comparisons, bugfix
Fix the last runtime issue as some sequent comparisons need be spilted.
For the origin equal comparisons chain, the new spilted Icmp chain will
still be end with equal, while for the new not-equal comparisons chain,
the new spilted Icmp chain will still be end with equal, so should address
this carefully, see detail wih case partial_sequent_ne

Thanks for @aeubanks, @glandium and @ayzhao report the runtime issue
and carefully examine.
Fix https://github.com/llvm/llvm-project/issues/59740.

Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D141188
2023-05-08 10:05:41 -07:00
Florian Hahn
127b00b25c
[VPlan] Record IR flags on VPWidenRecipe directly (NFC).
This patch introduces a VPRecipeWithIRFlags class to record various IR
flags for a recipe. This allows de-coupling of IR flags from the
underlying instructions. The main benefit is that it allows dropping of
IR flags from recipes directly, without the need to go through
State::MayGeneratePoisonRecipes. The plan is to remove
MayGeneratePoisonRecipes once all relevant recipes are transitioned.

It also allows dropping IR flags during VPlan-to-VPlan transforms, which
will be used in a follow-up patch to implement truncateToMinimalBitwidths
as VPlan-to-VPlan transform.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D149079
2023-05-08 17:28:50 +01:00
Teresa Johnson
1768898680 [MemProf] Control availability of hot/cold operator new from LTO link
Adds an LTO option to indicate that whether we are linking with an
allocator that supports hot/cold operator new interfaces. If not,
at the start of the LTO backends any existing memprof hot/cold
attributes are removed from the IR, and we also remove memprof metadata
so that post-LTO inlining doesn't add any new attributes.

This is done via setting a new flag in the module summary index. It is
important to communicate via the index to the LTO backends so that
distributed ThinLTO handles this correctly, as they are invoked by
separate clang processes and the combined index is how we communicate
information from the LTO link. Specifically, for distributed ThinLTO the
LTO related processes look like:
```
   # Thin link:
   $ lld --thinlto-index-only obj1.o ... objN.o -llib ...
   # ThinLTO backends:
   $ clang -x ir obj1.o -fthinlto-index=obj1.o.thinlto.bc -c -O2
   ...
   $ clang -x ir objN.o -fthinlto-index=objN.o.thinlto.bc -c -O2
```

It is during the thin link (lld --thinlto-index-only) that we have
visibility into linker dependences and want to be able to pass the new
option via -Wl,-supports-hot-cold-new. This will be recorded in the
summary indexes created for the distributed backend processes
(*.thinlto.bc) and queried from there, so that we don't need to know
during those individual clang backends what allocation library was
linked. Since in-process ThinLTO and regular LTO also use a combined
index, for consistency we query the flag out of the index in all LTO
backends.

Additionally, when the LTO option is disabled, exit early from the
MemProfContextDisambiguation handling performed during LTO, as this is
unnecessary.

Depends on D149117 and D149192.

Differential Revision: https://reviews.llvm.org/D149215
2023-05-08 08:02:21 -07:00
Noah Goldstein
8606e91f2b Revert "[InstCombine] Improve bswap + logic_op optimization"
The generic cast to `BinaryOperator` can break if `V` is not a
`BinaryOperator` (i.e a `ConstantExpr`). This occurs in things like
PPC linux build.

This reverts commit fe733f54da6faca95070b36b1640dbca3e43d396.
2023-05-08 00:55:43 -05:00
Florian Hahn
823d35fd3b
[VPlan] Use RecipeBuilder to look up member when fixing IG (NFC).
Recipes for interleave group members are recorded directly in the
RecipeBuilder. Use it directly instead of going indirectly through
VPlan's Value->VPValue mapping.
2023-05-07 18:02:27 +01:00
Dávid Bolvanský
9892094a8b [SLC] Use unsigned char to fix test failures on some platforms 2023-05-07 15:50:49 +02:00
Austin Chang
fe733f54da [InstCombine] Improve bswap + logic_op optimization
The patch implements a helper function that matches and fold the following cases in the InstCombine pass:

    bswap(logic_op(x, bswap(y))) -> logic_op(bswap(x), y)
    bswap(logic_op(bswap(x), y)) -> logic_op(x, bswap(y))
    bswap(logic_op(bswap(x), bswap(y))) -> logic_op(x, y) in multiuse case, which still reduces the number of instructions.

The helper function accepts bswap and bitreverse intrinsics. This patch folds the bswap cases and remain the bitreverse optimization for the future

Differential Revision: https://reviews.llvm.org/D149699
2023-05-07 14:28:07 +01:00
Dávid Bolvanský
6321e4ddf7 [SimplifyLibCalls] Transform memchr(STR, C, N) to chain of ORs
Motivation:

```
#include <string_view>

size_t findFirst_ABCDEF(std::string_view sv) {
  return sv.find_first_of("ABCDEF");
}
```

memchr("ABCDEF", C,  6) != NULL -> (C == 'A' || C == 'B' || C == 'C' || C == 'D' || C == 'E' || C == 'F') != 0

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D128011
2023-05-07 15:12:03 +02:00
Yeting Kuo
42601e116b [ASAN] Support memory checks on vp.load/store.
The patch adds new member MaybeEVL into InterestingMemoryOperand to represent
the effective vector length for vp intrinsics. It may be extended for some target intrinsics in the future.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D146208
2023-05-07 19:30:16 +08:00
Kazu Hirata
053d2471f8 [InstCombine] Remove Descale
The last use of Descale was removed on Apr 6, 2023 in commit
db6b30b1831095c216378a9df215b7c0ae6b959f.

Differential Revision: https://reviews.llvm.org/D150045
2023-05-06 18:20:19 -07:00
Florian Hahn
7b7be685d4
[VPlan] Use operands directly in VPInstructionsToVPRecipes (NFC).
New that def-use chains are modeled directly in VPlan, we can simply use
the operands of the recipe we are replacing. There is no need to use the
operands of the underlying instruction to look up a VPValue.
2023-05-06 12:36:00 +01:00
Florian Hahn
01fa764c9a
[VPlan] Assert instead of check if VF is vector when widening GEPs(NFC)
VPWidenGEPRecipe should not be generated for scalar VFs. Replace
check with an assert.
2023-05-06 09:25:56 +01:00
Kazu Hirata
2b60bd5141 [Vectorize] Use Densemap::contains (NFC) 2023-05-06 00:02:54 -07:00
NAKAMURA Takumi
a29a97d76b Fix a warning in D149117 [-Wunused-but-set-variable] 2023-05-06 11:30:04 +09:00
Teresa Johnson
a28261c711 [MemProf] Create single version of helper function (NFC)
Small clean up to keep a single version of getAllocTypeAttributeString
which was duplicated locally.
2023-05-05 18:31:35 -07:00
Teresa Johnson
cfad2d3a3d [MemProf] Context disambiguation cloning pass [patch 4/4]
Applies ThinLTO cloning decisions made during the thin link and
recorded in the summary index to the IR during the ThinLTO backend.

Depends on D141077.

Differential Revision: https://reviews.llvm.org/D149117
2023-05-05 16:26:32 -07:00
Shoaib Meenai
0e2b4b2dba Revert "[ArgumentPromotion] Bail if any callers are minsize"
This reverts commit 8b8466fd31e5a194fd8ba7a73a0f23d32f164318.

This is causing size regressions with -Oz and FullLTO. Revert while I
come up with a repro.
2023-05-05 14:26:57 -07:00
Teresa Johnson
04f3c5a71e Restore again "[MemProf] Context disambiguation cloning pass [patch 3/4]"
This reverts commit f09807ca9dda2f588298d8733e89a81105c88120, restoring
bfe7205975a63a605ff3faacd97fe4c1bf4c19b3 and follow on fix
e3e6bc699574550f2ed1de07f4e5bcdddaa65557, now that the nondeterminism
has been addressed by D149924.

Differential Revision: https://reviews.llvm.org/D141077
2023-05-05 13:27:33 -07:00
Alexey Bataev
2672c6e4dc [SLP][NFC]Add processBuildVector member function, NFC.
Introduce processBuildVector as a next step to generalize code for cost
estimation and code emission for gather/buildvector nodes.

Differential Revision: https://reviews.llvm.org/D149973
2023-05-05 11:00:53 -07:00
Florian Hahn
8bd02e5aef
[VPlan] Assert instead checking if VF is vec when widening calls (NFC)
VPWidenCallRecipe should not be generated for scalar VFs. Replace check
with an assert.
2023-05-05 18:21:57 +01:00
Vasileios Porpodas
7749f6e976 [SLP][NFC] Cleanup: Outline the code that vectorizes CmpInsts into a seaparate function.
Differential Revision: https://reviews.llvm.org/D149919
2023-05-05 09:56:41 -07:00
Alexey Bataev
ca3f4236e4 [SLP][NFC]Add/use gather and createFreeeze member functions in
ShuffleInstructionBuilder, NFC.
2023-05-05 09:12:54 -07:00
Teresa Johnson
1a3947df85 [MemProf] Use MapVector to avoid non-determinism
Multiple cases of instability in the cloning behavior occurred due to
iteration of maps indexed by pointers. Fix by changing the maps to
MapVector. This necessitated adding DenseMapInfo specializations for the
structure types used in the keys.

These were found while trying to commit patch 3 of the cloning
(bfe7205975a63a605ff3faacd97fe4c1bf4c19b3), but the second one turned
out to be in code committed in patch 2, but just exposed by a new test
added with patch 3. Specifically, the iteration in identifyClones().

Added the portion of the new test cases from patch 3 that only relied on
the already committed changes and exposed the issue.

Differential Revision: https://reviews.llvm.org/D149924
2023-05-05 07:06:41 -07:00
Florian Hahn
e3afe0b89d
[VPlan] Add VPWidenCastRecipe, split off from VPWidenRecipe (NFCI).
To generate cast instructions, the result type is needed. To allow
creating widened casts without underlying instruction, introduce a new
VPWidenCastRecipe that also holds the result type.

This functionality will be used in a follow-up patch to
implement truncateToMinimalBitwidths as VPlan-to-VPlan transform.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D149081
2023-05-05 13:20:16 +01:00
Nicolai Hähnle
d0a125a1e6 Scalarizer: use the canonical form of {extract,insert}element
This leads to a bunch of trivial test churn, plus some extra test changes
that are purely due to update_test_checks.

Pulled out of https://reviews.llvm.org/D149842 as a preparatory change.

Differential Revision: https://reviews.llvm.org/D149944
2023-05-05 13:05:31 +02:00
Nikita Popov
60766678c7 [InstCombine] Use canonical index type (NFC)
Directly use the canonical index type, rather than canonicalizing
it afterwards.
2023-05-05 12:19:18 +02:00
Chuanqi Xu
4247806690 [NFC] [Coroutines] Add a fastpath when computing the cross suspend point information
Mitigate https://github.com/llvm/llvm-project/issues/62348

The root cause for the above issue is that we used a textbook dataflow
analysis for the cross suspend point information. The analysis is
powerful but not scaling.

It is not easy to improve the current algorithm and the patch tries to
prune some branches to mitigate the problems.

Before the patch:

```
n: 20000

real	0m11.081s
user	0m10.597s
sys	0m0.320s

n: 40000

real	0m32.927s
user	0m31.403s
sys	0m1.043s

n: 60000

real	1m2.145s
user	0m58.903s
sys	0m2.268s

n: 80000

real	1m47.143s
user	1m41.630s
sys	0m3.857s

n: 100000

real	2m34.758s
user	2m26.587s
sys	0m5.922s
```

After the patch:

```
n: 20000

real	0m10.418s
user	0m9.945s
sys	0m0.311s

n: 40000

real	0m27.884s
user	0m26.430s
sys	0m1.036s

n: 60000

real	0m52.420s
user	0m49.321s
sys	0m2.267s

n: 80000

real	1m25.389s
user	1m20.247s
sys	0m3.856s

n: 100000

real	2m4.275s
user	1m56.405s
sys	0m5.975s
```

This patch intended to be a NFC patch.
2023-05-05 17:00:40 +08:00
Momchil Velikov
de24d08459 [FuncSpec] Fix inconsistent treatment of global variables
There are a few inaccuracies with how FuncSpec handles global
variables.

When specialisation on non-const global variables is disabled (the
default) the pass could nevertheless perform some specializations,
e.g. on a constant GEP expression, or on a SSA variable, for which the
Solver has determined it has the value of a global variable.

When specialisation on non-const global variables is enabled, the pass
would skip non-scalars, e.g. a global array, but this should be
completely inconsequential, a pointer is a pointer.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D149476

Change-Id: Ic73051b2f8602587306760bf2ec552e5860f8d39
2023-05-05 09:56:06 +01:00
Nikita Popov
00ff746f6e [LoopSimplify] Reduce amount of redundant SCEV invalidation (NFCI)
We are simplifying the loop and all its children. Each time, we
invalidate the top-most loop. The top-most loop is going to be
the same every time. The cost of SCEV invalidation is largely
independent from how data about the loop is actually cached, so
we should avoid redundant invalidations.
2023-05-05 10:03:42 +02:00
Florian Hahn
29712ccda6
[VPlan] Assert instead of check if VF is vector when widening casts.
VPWidenRecipes should not be generated for scalar VFs. Replace check
with an assert. Suggested in preparation for D149081.
2023-05-05 09:02:33 +01:00
Tom Stellard
2e3cabe172 [SeparateConstOffsetFromGEP] Fix bug handling negative offsets
Fix bug constants and sub instructions

When finding constants in a chain starting with the RHS operator of
sub instructions, we were negating the constant before zero extending
it, which is incorrect.

Unfortunately, I was unable to find a simple way to implement this
transformation correctly, so for now I just disabled this optimization
for constants that feed into the RHS of a sub.

Resolves #62379

Transformation from alive2.llvm.org:

    define i16 @src(i8 %a, i8 %b, i8 %c) {
    entry:
    %0 = sub nuw nsw i8 %c, %a
    %1 = sub nuw nsw i8 %b, %0
    %2 = zext i8 %1 to i16
    ret i16 %2
    }

    Before/Bad:

    define i16 @tgt(i8 %a, i8 %b, i8 %c) {
    entry:
    %0 = zext i8 %a to i16
    %1 = zext i8 %b to i16
    %c_neg = sub i8 0, %c
    %c_zext = zext i8 %c_neg to i16
    %2 = sub i16 0, %0
    %3 = sub i16 %1, %2
    %4 = add i16 %3, %c_zext
    ret i16 %4
    }

    Correct:

    define i16 @tgt(i8 %a, i8 %b, i8 %c) {
    entry:
    %0 = zext i8 %a to i16
    %1 = zext i8 %b to i16
    %c_zext = zext i8 %c to i16
    %c_neg = sub i16 0, %c_zext
    %2 = sub i16 0, %0
    %3 = sub i16 %1, %2
    %4 = add i16 %3, %c_neg
    ret i16 %4
    }

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D149507
2023-05-04 18:45:49 -07:00
Alexey Bataev
d726f99d43 [SLP][NFC]Do not try to revectorize instructions with constant operands, NFC.
The pass should not try to revectorize instructions with constant
operands, which were not folded by the IRBuilder. It prevents the
non-terminating loop in the SLP vectorizer for non foldable constant
operations.
2023-05-04 13:52:42 -07:00
Arthur Eubanks
ed443d81d1 [AggressiveInstCombine] Only fold consecutive shifts of loads with constant shift amounts
This is what the code assumed but never actually checked.

Fixes https://github.com/llvm/llvm-project/issues/62509.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D149896
2023-05-04 13:52:25 -07:00
Florian Hahn
1b05e74982
[VPlan] Reorder cases in switch (NFC).
Reorder cases to make sure they are ordered properly in preparation
for D149081.
2023-05-04 21:40:22 +01:00
Florian Hahn
c2bef381fa
[VPlan] Remove setEntry to avoid leaks when replacing entry.
Update the HCFG builder to directly connect the created CFG to the
existing Plan's entry. This allows removing `setEntry`, which can cause
leaks when the existing entry is replaced.

Should fix
https://lab.llvm.org/buildbot/#/builders/5/builds/33455/steps/13/logs/stdio
2023-05-04 19:12:02 +01:00
Alexey Bataev
c0e5e7db9a [SLP]Fix a crash trying finding insert point for GEP nodes with non-gep
insts.

If the vectorizable GEP node is built, which should not be scheduled,
and at least one node is a non-gep instruction, need to insert the
vectorized instructions before the last instruction in the list, not
before the first one, otherwise the instructions may be emitted in the
wrong order.
2023-05-04 09:43:37 -07:00