LSR can include Regs of AddRec SCEVs from different loops, which do not combine
well when added in Scalar Evolution. As they should never produce constant
differences so we can just guard against trying to create them.
Fixes#60927
65420c8041f4 introduced an ICE in combineMinNumMaxNum(...) when
combineMinNumMaxNumImpl(...) returns an SDValue(). Make sure to check that a
value is returned before trying to perform an FNEG on it.
GitHub Issue: #60924
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D144571
Without this patch:
return X < 4 ? 3 : 2;
return X < 9 ? 7 : 6;
are compiled as:
31 c0 xor %eax,%eax
83 ff 04 cmp $0x4,%edi
0f 93 c0 setae %al
83 f0 03 xor $0x3,%eax
31 c0 xor %eax,%eax
83 ff 09 cmp $0x9,%edi
0f 92 c0 setb %al
83 c8 06 or $0x6,%eax
respectively. With this patch, we generate:
31 c0 xor %eax,%eax
83 ff 04 cmp $0x4,%edi
83 d0 02 adc $0x2,%eax
31 c0 xor %eax,%eax
83 ff 04 cmp $0x4,%edi
83 d0 02 adc $0x2,%eax
respectively, saving 3 bytes while reducing the tree height.
This patch recognizes the equivalence of OR and ADD
(if bits do not overlap) and delegates to combineAddOrSubToADCOrSBB
for further processing. The same applies to the equivalence of XOR
and SUB.
Differential Revision: https://reviews.llvm.org/D143838
I introduced new tests in
commit 5cc1016a57b3 ("[llvm][SelectionDAGBuilder] codegen callbr.landingpad intrinsic")
https://reviews.llvm.org/D140160
that fails expensive checks. Disable -verify-machineinstrs in those
tests for now. Enable it in other tests for now, since MachineVerifier
isn't on by default for assertion builds.
Link: https://github.com/llvm/llvm-project/issues/60827
Original version hit assert in `incDecVectorConstant` because VT could
be EVT (as opposed to MVT). Fix is to add check for VT.isSimple() in
`incDecVectorConstant`.
Reviewed By: saugustine
Differential Revision: https://reviews.llvm.org/D142254
This patchs purpose is very similar to https://reviews.llvm.org/D119644
The gist of the issue is that SEH unwinding has certain invariants around call instructions. One of those is that a call instruction must not be immediately followed by the function epilogue. Failing to do so leads to Windows' unwinder not recognizing the frame and skipping it when unwinding the stack.
LLVM ensures this invariant by inserting a noop after a call prior to an epilogue. The implementation however, makes the unfortunate assumption that pseudo instructions may not be calls, leading to statepoints being skipped and no noop being inserted.
This patch fixes that issue by only skipping over pseudo instructions that aren't calls.
Differential Revision: https://reviews.llvm.org/D143812
Recommit bbdf24357932b064f2aa18ea1356b474e0220dde.
Original commit message:
If a chain of two selects share a true/false value and are controlled
by two setcc nodes, that are never both true, we can fold away one of
the selects. So, the following:
(select (setcc X, const0, eq), Y,
(select (setcc X, const1, eq), Z, Y))
Can be combined to:
select (setcc X, const1, eq) Z, Y
Differential Revision: https://reviews.llvm.org/D142535
This doesn't make sense as an option. fneg and fabs are bit
preserving by definition. If a target has some fneg or fabs
instruction that are not bitpreserving it's incorrect to lower
fneg/fabs to use it.
Remove a dead masked store if another one has the same base pointer and mask or
the following store has all true constant mask and size if equal or bigger to
the first store.
Differential Revision: https://reviews.llvm.org/D143069
When both v8i64 and v4f16 are not legal in a v8i64->v8f16 conversion, legalizer will breaks it into v8i64->v4i64->v4f32->v8f32->v8f16.
Given we support v4i64->v8f16, we can combine them with a shuffle instruction.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D143872
Noticed while working on Issue #59867 and Issue #53419 - there's still more to do here, but for "all vector" comparisons, we should try to cast to a scalar integer for sub-128bit types
getFauxShuffleMask can't handle ISD::TRUNCATE itself as it can't handle inputs that are larger than the output
Another step towards removing combineX86ShuffleChainWithExtract
combineX86ShuffleChain and combineX86ShuffleChainWithExtract no longer require the shuffle inputs to be the same width as the root vector, so we can stop generating widening nodes on the fly (combineX86ShuffleChain should handles all of this).
This requires a couple of additional folds to avoid a couple of notable regressions:
getFauxShuffleMask - recognise INSERT_SUBVECTOR(X,Y,C) as a shuffle pattern as long as its not just widening the subvector.
combineConcatVectorOps - folds CONCAT_VECTORS(AssertSext(X,Ty),AssertSext(Y,Ty)) -> AssertSext(CONCAT_VECTORS(X,Y),Ty)
One of the final stages towards fixing Issue #45319 and addressing the regressions in the interleaved tests in D127115
D100808 implemented the new version, but kept version 1 as the
emitted version. This patch changes the version to 2 and updates the
codegen tests.
Differential Revision: https://reviews.llvm.org/D139799
This reverts commit cce239c45d6ef3865a017b5b3f935964e0348734.
HHVM calling conventions are unused. Remove them by partially reverting the commit.
Reviewed By: MaskRay, MatzeB
Differential Revision: https://reviews.llvm.org/D124330
Alignment of an alloca in IR can be lower than the preferred alignment
on purpose, but this override essentially treats the preferred
alignment as the minimum alignment.
The patch changes this behavior to always use the specified
alignment. If alignment is not set explicitly in LLVM IR, it is set to
DL.getPrefTypeAlign(Ty) in computeAllocaDefaultAlign.
Tests are changed as well: explicit alignment is increased to match
the preferred alignment if it changes output, or omitted when it is
hard to determine the right value (e.g. for pointers, some structs, or
weird types).
Differential Revision: https://reviews.llvm.org/D135462
This function was added for ARM targets, but aligning global/stack pointer
arguments passed to memcpy/memmove/memset can improve code size and
performance for all targets that don't have fast unaligned accesses.
This adds a generic implementation that adjusts the alignment to pointer
size if unaligned accesses are slow.
Review D134168 suggests that this significantly improves performance on
synthetic benchmarks such as Dhrystone on RV32 as it avoids memcpy() calls.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D134282
YAML specification does not allow keys duplication an a mapping. However, YAML
parser in LLVM does not have any check on that and uses only the last key entry.
In this change duplicated keys are merged to satisfy the spec.
Differential Revision: https://reviews.llvm.org/D141848
The original change mistakenly excluded parameter registers from the
list of callee-saved-registers. This reland fixes it - it only excludes
the return registers for preserve_all/preserve_most CCs.
Original description:
> Currently both calling conventions preserve registers that are used to
> store a return value. This causes the returned value to be lost:
>
> define i32 @bar() {
> %1 = call preserve_mostcc i32 @foo()
> ret i32 %1
> }
>
> define preserve_mostcc i32 @foo() {
> ret i32 2
> ; preserve_mostcc will restore %rax,
> ; whatever it was before the call.
> }
>
> This contradicts the current documentation (preserve_allcc "behaves
> identical to the `C` calling conventions on how arguments and return
> values are passed") and also breaks [[clang::preserve_most]].
>
> This change makes CSRs be preserved iff they are not used to store a
> return value (e.g. %rax for scalars, {%rax:%rdx} for __int128, %xmm0
> for double). For void functions no additional registers are
> preserved, i.e. the behaviour is backward compatible with existing
> code.
Differential Revision: https://reviews.llvm.org/D143425
Adding a module flag 'MaxTLSAlign' describing the maximum alignment a global TLS
variable can have. Optimizers are prevented from increasing the alignment of such
variables beyond this threshold.
Reviewed By: probinson
Differential Revision: https://reviews.llvm.org/D140123
One of the cleanups necessary for D136529 - another being how we're going to handle moving freeze through multiple result nodes (like uaddo and subcarry)
Emit all constant integers produced by SanitizerBinaryMetadata as
ULEB128 to further reduce binary space used. Increasing the version is
not necessary given this change depends on (and will land) along with
the bump to v2.
To support this, the !pcsections metadata format is extended to allow
for per-section options, encoded in the first MD operator which must
always be a string and contain the section: "<section>!<options>".
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D143484
