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Author	SHA1	Message	Date
Harvin Iriawan	db158c7c83	[AArch64] Update generic sched model to A510 Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799	2023-08-21 12:25:15 +01:00
David Green	7740216f2e	[DAG] Combine insert(shuffle(load), load, 0) into a single load Given an insert of a scalar load into a vector shuffle with mask u,0,1,2,3,4,5,6 or 1,2,3,4,5,6,7,u (depending on the insert index), it can be more profitable to convert to a single load and avoid the shuffles. This adds a DAG combine for it, providing the new load is still fast. Differential Revision: https://reviews.llvm.org/D151029	2023-05-31 19:48:57 +01:00
David Green	8d82f12ac3	[ARM][AArch64] Add tests for shuffles load patterns. NFC See D151029	2023-05-31 18:42:01 +01:00

Author

SHA1

Message

Date

Harvin Iriawan

db158c7c83

[AArch64] Update generic sched model to A510

Refresh of the generic scheduling model to use A510 instead of A55.
  Main benefits are to the little core, and introducing SVE scheduling information.
  Changes tested on various OoO cores, no performance degradation is seen.

  Differential Revision: https://reviews.llvm.org/D156799

2023-08-21 12:25:15 +01:00

David Green

7740216f2e

[DAG] Combine insert(shuffle(load), load, 0) into a single load

Given an insert of a scalar load into a vector shuffle with mask
u,0,1,2,3,4,5,6 or 1,2,3,4,5,6,7,u (depending on the insert index),
it can be more profitable to convert to a single load and avoid the
shuffles. This adds a DAG combine for it, providing the new load is
still fast.

Differential Revision: https://reviews.llvm.org/D151029

2023-05-31 19:48:57 +01:00

David Green

8d82f12ac3

[ARM][AArch64] Add tests for shuffles load patterns. NFC

See D151029

2023-05-31 18:42:01 +01:00

3 Commits