shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
498,792 Commits 1,713 Branches 298 Tags
Commit Graph

7 Commits

Author SHA1 Message Date
Fangrui Song
9e9907f1cf
[AMDGPU,test] Change llc -march= to -mtriple= (#75982) 
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
 2024-01-16 21:54:58 -08:00
Matt Arsenault
b5bc205d75 AMDGPU: Convert some bit operation tests to opaque pointers 2022-11-29 18:36:53 -05:00
Jay Foad
f510045d82 [CodeGen] Remove unneeded regex escaping in FileCheck patterns. NFC. 
Take advantage of D117117 to simplify all {{\[}} to [ and {{\]}} to ].

Differential Revision: https://reviews.llvm.org/D117298
 2022-02-18 16:10:56 +00:00
Alexander Timofeev
982aee6a38 [AMDGPU] Switch scalarize global loads ON by default 
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
 2017-07-04 17:32:00 +00:00
Stanislav Mekhanoshin
d445455643 [AMDGPU] Add pattern for v_alignbit_b32 with immediate 
If immediate in shift is less than 32 we can use alignbit too.

Differential Revision: https://reviews.llvm.org/D34729

llvm-svn: 306500
 2017-06-28 02:52:39 +00:00
Stanislav Mekhanoshin
eb40733bf0 Allow to truncate left shift with non-constant shift amount 
That is pretty common for clang to produce code like
(shl %x, (and %amt, 31)). In this situation we can still perform
trunc (shl) into shl (trunc) conversion given the known value
range of shift amount.

Differential Revision: https://reviews.llvm.org/D34723

llvm-svn: 306499
 2017-06-28 02:37:11 +00:00
Stanislav Mekhanoshin
e8bf6c9629 [AMDGPU] Add 2 new alignbit patterns 
Differential Revision: https://reviews.llvm.org/D34655

llvm-svn: 306449
 2017-06-27 19:10:47 +00:00