77 Commits

Author SHA1 Message Date
Cullen Rhodes
9816edc9f3
[mlir][vector] add result type to vector.extract assembly format (#66499)
The vector.extract assembly format currently only contains the source
type, for example:

  %1 = vector.extract %0[1] : vector<3x7x8xf32>

it's not immediately obvious if this is the source or result type. This
patch improves the assembly format to make this clearer, so the above
becomes:

  %1 = vector.extract %0[1] : vector<7x8xf32> from vector<3x7x8xf32>
2023-09-28 11:11:16 +01:00
Diego Caballero
98f6289a34 [mlir][Vector] Add support for Value indices to vector.extract/insert
`vector.extract/insert` ops only support constant indices. This PR is
extending them so that arbitrary values can be used instead.

This work is part of the RFC: https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops

Differential Revision: https://reviews.llvm.org/D155034
2023-09-22 00:39:32 +00:00
Nicolas Vasilache
1b8b556443
[mlir][Vector] Add fastmath flags to vector.reduction (#66905)
This revision pipes the fastmath attribute support through the
vector.reduction op. This seemingly simple first step already requires
quite some genuflexions, file and builder reorganization. In the
process, retire the boolean reassoc flag deep in the LLVM dialect
builders and just use the fastmath attribute.

During conversions, templated builders for predicated intrinsics are
partially cleaned up. In the future, to finalize the cleanups, one
should consider adding fastmath to the VPIntrinsic ops.
2023-09-20 16:57:20 +02:00
Benjamin Maxwell
2f11ce5579
[mlir][VectorOps] Extend vector.constant_mask to support 'all true' scalable dims (#66638)
This extends `vector.constant_mask` so that mask dim sizes that
correspond to a scalable dimension are treated as if they're implicitly
multiplied by vscale. Currently this is limited to mask dim sizes of 0
or the size of the dim/vscale. This allows constant masks to represent
all true and all false scalable masks (and some variations):

```
// All true scalable mask
%mask = vector.constant_mask [8] : vector<[8]xi1>

// All false scalable mask
%mask = vector.constant_mask [0] : vector<[8]xi1>

// First two scalable rows
%mask = vector.constant_mask [2,4] : vector<4x[4]xi1>
```
2023-09-20 14:54:42 +01:00
Daniil Dudkin
4a831250b8 [mlir][vector] Rename vector reductions: maxfmaximumf, minfminimumf
This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.

Here, we are addressing task 2.1 from the plan, which involves renaming the vector reductions to align with the semantics of the corresponding LLVM intrinsics.

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D158618
2023-09-13 22:49:07 +00:00
Andrzej Warzyński
718af88376
[mlir][vector] Extend mask calculation for vector.contract (#65733)
Make sure that when calculating the expected mask for `vector.contract`,
scalable sizes are correctly taken into account.

Depends on: #65724
2023-09-11 11:34:47 +01:00
Andrzej Warzyński
7ec8fd4cc7
[mlir][Vector] Make vector.contract work with scalable vectors (#65724)
This is just a small fix that makes sure that `vector.contract` works
with scalable vectors.

Rather than duplicating all the roundtrip tests for vector.contract, I'm
treating scalable vectors as an edge case and just adding a couple to
verify that this works.
2023-09-11 09:14:25 +01:00
Lei Zhang
73ddc4474b [mlir][vector] Enable distribution over multiple dimensions
This commit starts enabling vector distruction over multiple
dimensions. It requires delinearize the lane ID to match the
expected rank. shape_cast and transfer_read now can properly
handle multiple dimensions.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D157931
2023-08-16 12:08:43 -07:00
Diego Caballero
51ef80a7c2 [mlir][Vector] Add support for 0-D vectors to vector.insert/extract
This is part of the process to remove vector.insertelement/extractelement
from the Vector dialect.

RFC: https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops

Differential Revision: https://reviews.llvm.org/D152644
2023-07-11 19:28:16 +00:00
Diego Caballero
7ce2c3d71b [mlir][Vector] Add 0-d vector support to 'vector.shape_cast`
This patch adds support to shape cast a vector<1x1x1...1xElemenType> to
a vector<ElementType> and the other way around.

Differential Revision: https://reviews.llvm.org/D151169
2023-05-23 17:22:55 +00:00
Diego Caballero
7b70baa9ef [mlir][Vector] Remove lhs and rhs masks from vector.contract
This patch removes the historical lhs and rhs masks in vector.contract,
now that vector.mask supports vector.contract and the lhs and rhs masks
are barely supported by all the vector.contract lowerings and
transformations.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D144430
2023-03-29 19:53:29 +00:00
Adam Paszke
61f33def13 [mlir][Vector] Make sure that vector.contract preserves extra attributes while parsing
The old implementation parsed the optional attribute dict, only to replace its
contents by using `assign`.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D146707
2023-03-23 10:31:46 +00:00
Diego Caballero
51f235c444 [mlir][Vector] Add folding for masked reductions and vector.mask
This patch adds support for folding trivial masked reductions and
multi-reductions (e.g., multi-reductions with only parallel dims,
reductions of a single element, etc.). To support those foldings in
a composable way we also add support for folding different flavors of
empty vector.mask opertions.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D144414
2023-02-22 06:37:38 +00:00
Aart Bik
d453d73d0d [mlir][vector] add proper verification to vector.print operation
Rationale:
Only proper vectors and scalars of floating-point or integral types
are actually lowered to calls into the light-weight output library.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D143423
2023-02-06 14:10:07 -08:00
Diego Caballero
eb7e2998d1 Reland "[mlir][Vector] Re-define masking semantics in vector.transfer ops""
This relands commit 847b5f82a4a34218bf16d6f83f1b7c32df3117ba.

Differential Revision: https://reviews.llvm.org/D138079
2022-11-29 03:36:54 +00:00
Diego Caballero
847b5f82a4 Revert "[mlir][Vector] Re-define masking semantics in vector.transfer ops"
This reverts commit 6c59c5cd08c879c9d1cfa653711613244a7c39bf.
2022-11-18 01:18:11 +00:00
Diego Caballero
6c59c5cd08 [mlir][Vector] Re-define masking semantics in vector.transfer ops
Masking hasn't been widely used in vector transfer ops and the semantics
of the mask operand were a bit loose. This patch states that the mask
operand in a vector transfer op is applied to the read/write part of the
operation and, therefore, its shape should match the shape of the
elements read/written from/into the memref/tensor regardless of any
permutation/broadcasting also applied by the transfer operation.

Reviewers: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D138079
2022-11-18 01:05:42 +00:00
Javier Setoain
aa9647e2d0 [mlir][vector] Add vector.scalable.insert/extract ops
These new operations match the semantics of
llvm.experimental.vector.insert and llvm.experimental.vector.extract.

`vector.scalable.insert` and `vector.scalable.extract` allow,
respectively, insert vectors into scalable vectors, and extract vectors
from scalable vectors.

The discussion about the inclusion of these operations is here:
https://discourse.llvm.org/t/rfc-interfacing-between-fixed-length-and-scalable-vectors-for-vls-vector-code-on-scalable-vector-architectures

Differential Revision: https://reviews.llvm.org/D127875
2022-11-08 08:51:15 +00:00
Diego Caballero
2d10f81d46 [mlir][Vector] Introduce 'vector.mask' operation and MaskableOpInterface
This patch introduces the `vector.mask` operation and the MaskableOpInterface
as described in https://discourse.llvm.org/t/rfc-vector-masking-representation-in-mlir/64964.
The `vector.mask` operation is used to predicate the execution of operations
implementing the MaskableOpInterface. This interface will be implemented by maskable
operations and provides information about its masking constraints and semantics.

For now, only vector transfer and reduction ops implement the MaskableOpInterface
for illustration and testing purposes.

Reviewed By: nicolasvasilache, rriddle

Differential Revision: https://reviews.llvm.org/D134939
2022-10-10 21:25:43 +00:00
Thomas Raoux
54db8cc7b1 [mlir][vector] Remove ExtractMap/InsertMap operations
As discussed on discourse: https://discourse.llvm.org/t/vector-vector-distribution-large-vector-to-small-vector/1983/22
removing insert_map/extract_map op as vector distribution now uses
warp_execute_on_lane_0 op.

Differential Revision: https://reviews.llvm.org/D134000
2022-09-16 17:41:26 +00:00
Nicolas Vasilache
db6f8ebe06 [mlir][Vector] Support 0-D vectors in ShuffleOp
Co-authored-by: Michal Terepeta <michalt@google.com>

Reviewed-by: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D115744
2022-08-29 00:39:57 -07:00
Nicolas Vasilache
6e81eae2f7 [mlir][Vector] Support 0-D vectors in TransposeOp
Co-authored-by: Michal Terepeta <michalt@google.com>

Reviewed-by: ftynse

Differential Revision: https://reviews.llvm.org/D115743
2022-08-26 03:40:21 -07:00
Michal Terepeta
ab45a4329b [mlir][Vector] Support 0-D vectors in FMAOp
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D115742
2022-08-24 08:49:58 -07:00
Che-Yu Wu
f250b97222 Reland "[MLIR]Extend vector.gather to support n-D result"
Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D132507
2022-08-24 04:18:00 +00:00
Mehdi Amini
de54bcc54c Revert "[MLIR]Extend vector.gather to support n-D result"
This reverts commit 0cbfd6fd1633a075dcfd1bcd8a11e1c6d2785fa8.

A test is crashing with the shared_lib config.
2022-08-23 20:26:38 +00:00
Che-Yu Wu
0cbfd6fd16 [MLIR]Extend vector.gather to support n-D result
Currently vector.gather only supports reading memory into a 1-D result vector.
This patch extends it to support an n-D result vector with the indices, masks,
and passthroughs in n-D vectors.

As we are trying to vectorize tensor.extract with vector.gather
(https://github.com/iree-org/iree/issues/9198), it will need to gather the
elements into an n-D vector. Having vector.gather with n-D results allows us
to avoid flatten and reshape at the vectorization stage. The backends can then
decide the optimal ways to lower the vector.gather op.

Note that this is different from n-D gathering, which is about reading n-D
memory with the n-D indices. The indices here are still only 1-D offsets on
the base.

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D131905
2022-08-23 16:53:19 +00:00
Güray Özen
85882e7d64 [mlir][Vector] Support 0-D vectors in ReductionOp
This commit adds support for 0-D vectors in ReductionOp.

Reviewed By: nicolasvasilache, dcaballe

Differential Revision: https://reviews.llvm.org/D131896
2022-08-18 09:12:47 +00:00
Jerry Wu
66c2b76846 [MLIR] Extend vector.gather to accept tensor as base
In addition to memref, accept ranked tensor as the base operand of vector.gather, similar to vector.trasnfer_read.

This will allow us to vectorize noncontiguous tensor.extract into vector.gather. Full discussion can be found here: https://github.com/iree-org/iree/issues/9198

Reviewed By: hanchung, dcaballe

Differential Revision: https://reviews.llvm.org/D130097
2022-08-09 11:19:16 -07:00
Thomas Raoux
051b36ba28 [mlir][vector] Add accumulator operand to MultiDimReduce op
This allows vectorizing linalg reductions without changing the operation
order. Therefore this produce a valid vectorization even if operations
are not associative.

Differential Revision: https://reviews.llvm.org/D129535
2022-07-12 14:28:30 +00:00
River Riddle
c48e3a13f3 [mlir][NFC] Update textual references of func to func.func in Tensor/Tosa/Vector tests
The special case parsing of `func` operations is being removed.
2022-04-20 22:17:29 -07:00
Thomas Raoux
59058c441a [mlir][vector] Add operations used for Vector distribution
Add vector op warp_execute_on_lane_0 that will be used to do incremental
vector distribution in order to target warp level vector programming for
architectures with GPU-like SIMT programming model.
The idea behing the op is discussed further on discourse:
https://discourse.llvm.org/t/vector-vector-distribution-large-vector-to-small-vector/1983/23

Differential Revision: https://reviews.llvm.org/D123703
2022-04-15 03:47:52 +00:00
Javier Setoain
a75a46db89 [mlir][Vector] Enable create_mask for scalable vectors
The way vector.create_mask is currently lowered is
vector-length-dependent, and therefore incompatible with scalable vector
types. This patch adds an alternative lowering path for create_mask
operations that return a scalable vector mask.

Differential Revision: https://reviews.llvm.org/D118248
2022-03-25 10:48:59 +00:00
Matthias Springer
fe0bf7d469 [mlir][vector][NFC] Use CombiningKindAttr instead of StringAttr
This makes the op consistent with other ops in vector dialect.

Differential Revision: https://reviews.llvm.org/D119343
2022-02-10 19:13:29 +09:00
River Riddle
6a8ba3186e [mlir] Split std.splat into tensor.splat and vector.splat
This is part of the larger effort to split the standard dialect. This will also allow for pruning some
additional dependencies on Standard (done in a followup).

Differential Revision: https://reviews.llvm.org/D118202
2022-02-02 14:45:12 -08:00
harsh
80e0bf1af1 Add vector.scan op
This patch adds the vector.scan op which computes the
scan for a given n-d vector. It requires specifying the operator,
the identity element and whether the scan is inclusive or
exclusive.

TEST: Added test in ops.mlir

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D117171
2022-01-28 20:07:57 +00:00
Javier Setoain
a4830d14ed [mlir][RFC] Add scalable dimensions to VectorType
With VectorType supporting scalable dimensions, we don't need many of
the operations currently present in ArmSVE, like mask generation and
basic arithmetic instructions. Therefore, this patch also gets
rid of those.

Having built-in scalable vector support also simplifies the lowering of
scalable vector dialects down to LLVMIR.

Scalable dimensions are indicated with the scalable dimensions
between square brackets:

        vector<[4]xf32>

Is a scalable vector of 4 single precission floating point elements.

More generally, a VectorType can have a set of fixed-length dimensions
followed by a set of scalable dimensions:

        vector<2x[4x4]xf32>

Is a vector with 2 scalable 4x4 vectors of single precission floating
point elements.

The scale of the scalable dimensions can be obtained with the Vector
operation:

        %vs = vector.vscale

This change is being discussed in the discourse RFC:

https://llvm.discourse.group/t/rfc-add-built-in-support-for-scalable-vector-types/4484

Differential Revision: https://reviews.llvm.org/D111819
2021-12-15 09:31:37 +00:00
Mehdi Amini
ee0908703d Change the printing/parsing behavior for Attributes used in declarative assembly format
The new form of printing attribute in the declarative assembly is eliding the `#dialect.mnemonic` prefix to only keep the `<....>` part.

Differential Revision: https://reviews.llvm.org/D113873
2021-12-08 02:02:37 +00:00
Michal Terepeta
caf89c0db6 [mlir][Vector] Support 0-D vectors in ConstantMaskOp
To support creating both a mask with just a single `true` and `false` values,
I had to relax the restriction in the verifier that the rank is always equal to
the length of the attribute array, in other words, we now allow:

- `vector.constant_mask [0] : vector<i1>` which gets lowered to
  `arith.constant dense<false> : vector<i1>`
- `vector.constant_mask [1] : vector<i1>` which gets lowered to
  `arith.constant dense<true> : vector<i1>`

(the attribute list for the 0-D case must be a singleton containing
either `0` or `1`)

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D115023
2021-12-06 08:03:04 +00:00
Michal Terepeta
1423e8bf5d [mlir][Vector] Support 0-D vectors in BitCastOp
The implementation only allows to bit-cast between two 0-D vectors. We could
probably support casting from/to vectors like `vector<1xf32>`, but I wasn't
convinced that this would be important and it would require breaking the
invariant that `BitCastOp` works only on vectors with equal rank.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114854
2021-12-03 08:55:59 +00:00
Michal Terepeta
8e2b373396 [mlir][Vector] Add some missing tests for broadcast and splat
Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114853
2021-12-03 08:52:51 +00:00
Nicolas Vasilache
c537a94334 [mlir][Vector] Thread 0-d vectors through vector.transfer ops
This revision adds 0-d vector support to vector.transfer ops.
In the process, numerous cleanups are applied, in particular around normalizing
and reducing the number of builders.

Reviewed By: ThomasRaoux, springerm

Differential Revision: https://reviews.llvm.org/D114803
2021-12-01 16:49:43 +00:00
Nicolas Vasilache
3ff4e5f2a4 [mlir][Vector] Thread 0-d vectors through InsertElementOp.
This revision makes concrete use of 0-d vectors to extend the semantics of
InsertElementOp.

Reviewed By: dcaballe, pifon2a

Differential Revision: https://reviews.llvm.org/D114388
2021-11-23 12:55:11 +00:00
Nicolas Vasilache
e7026aba00 [mlir][Vector] Thread 0-d vectors through ExtractElementOp.
This revision starts making concrete use of 0-d vectors to extend the semantics of
ExtractElementOp.
In the process a new VectorOfAnyRank Tablegen OpBase.td is added to allow progressive transition to supporting 0-d vectors by gradually opting in.

Differential Revision: https://reviews.llvm.org/D114387
2021-11-23 12:39:44 +00:00
Mogball
a54f4eae0e [MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200

Removed redundant ops from the standard dialect that were moved to the
`arith` or `math` dialects.

Renamed all instances of operations in the codebase and in tests.

Reviewed By: rriddle, jpienaar

Differential Revision: https://reviews.llvm.org/D110797
2021-10-13 03:07:03 +00:00
Nicolas Vasilache
67b10532c6 [mlir][Vector] Allow a 0-d for for vector transfer ops.
This revision updates the op semantics, printer, parser and verifier to allow 0-d transfers.
Until 0-d vectors are available, such transfers have a special form that transits through vector<1xt>.
This is a stepping stone towards the longer term work of adding 0-d vectors and will help significantly reduce corner cases in vectorization.

Transformations and lowerings do not yet support this form, extensions will follow.

Differential Revision: https://reviews.llvm.org/D111559
2021-10-12 11:48:42 +00:00
Nicolas Vasilache
31270eb165 [mlir][Vector] Let vector.multi_reduction reduce down to a scalar.
vector.multi_reduction currently does not allow reducing down to a scalar.
This creates corner cases that are hard to handle during vectorization.
This revision extends the semantics and adds the proper transforms, lowerings and canonicalizations to allow lowering out of vector.multi_reduction to other abstractions all the way to LLVM.

In a future, where we will also allow 0-d vectors, scalars will still be relevant: 0-d vector and scalars are not equivalent on all hardware.

In the process, splice out the implementation patterns related to vector.multi_reduce into a new file.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D111442
2021-10-12 11:03:54 +00:00
Diego Caballero
eaf2588a51 [mlir][Linalg] Add support for min/max reduction vectorization in linalg.generic
This patch extends Linalg core vectorization with support for min/max reductions
in linalg.generic ops. It enables the reduction detection for min/max combiner ops.
It also renames MIN/MAX combining kinds to MINS/MAXS to make the sign explicit for
floating point and signed integer types. MINU/MAXU should be introduce din the future
for unsigned integer types.

Reviewed By: pifon2a, ThomasRaoux

Differential Revision: https://reviews.llvm.org/D110854
2021-10-05 22:47:20 +00:00
thomasraoux
291025389c [mlir][vector] Refactor Vector Unrolling and remove Tuple ops
Simplify vector unrolling pattern to be more aligned with rest of the
patterns and be closer to vector distribution.
The new implementation uses ExtractStridedSlice/InsertStridedSlice
instead of the Tuple ops. After this change the ops based on Tuple don't
have any more used so they can be removed.

This allows removing signifcant amount of dead code and will allow
extending the unrolling code going forward.

Differential Revision: https://reviews.llvm.org/D105381
2021-07-07 11:11:26 -07:00
Matthias Springer
864adf399e [mlir] Allow empty position in vector.insert and vector.extract
Such ops are no-ops and are folded to their respective `source`/`vector` operand.

Differential Revision: https://reviews.llvm.org/D101879
2021-05-13 12:54:18 +09:00
Matthias Springer
c52cbe63e4 [mlir] Fix masked vector transfer ops with broadcasts
Broadcast dimensions of a vector transfer op have no corresponding dimension in the mask vector. E.g., a 2-D TransferReadOp, where one dimension is a broadcast, can have a 1-D `mask` attribute.

This commit also adds a few additional transfer op integration tests for various combinations of broadcasts, masking, dim transposes, etc.

Differential Revision: https://reviews.llvm.org/D101745
2021-05-13 12:46:03 +09:00