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6 Commits

Author SHA1 Message Date
Zaara Syeda
76ad289748
[PowerPC] 32-bit large code-model support for toc-data (#85129) 
This patch adds the pseudo op ADDItocL for 32-bit large code-model
support for toc-data.
 2024-04-17 09:24:53 -04:00
Zaara Syeda
cc761a7c35
[PowerPC][NFC] Rename ADDItocL to match the 64-bit naming convention (#85099) 
In preparation of adding a similar instruction for large code model on
AIX for 32-bit, rename the exisitng ADDItocL 64-instruction to ADDItocL8
to match the naming convention of other instructions with 32-bit and
64-bit variants.
 2024-03-13 11:57:07 -04:00
Qiu Chaofan
e3c2694da9 [PowerPC] Implement general back2back fusion 
Implement 'back-to-back' FX fusion according to Power10 User Manual
'19.1.5.4 Fusion', not enabled by default.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D114345
 2021-12-06 10:15:05 +08:00
Qiu Chaofan
59f4b3d308 [PowerPC] Implement more fusion types for Power10 
This implements the rest of Power10 instruction fusion pairs, according
to user manual, including 'wide immediate', 'load compare', 'zero move'
and 'SHA3 assist'.

Only 'SHA3 assist' is enabled by default.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D112912
 2021-11-23 17:21:17 +08:00
Qiu Chaofan
9b5e2b5261 [PowerPC] Implement basic macro fusion in Power10 
Including basic fusion types around arithmetic and logical instructions.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D111693
 2021-11-08 17:23:56 +08:00
QingShan Zhang
518292dbdf [PowerPC] Add the MacroFusion support for Power8 
This patch is intend to implement the missing P8 MacroFusion for LLVM
according to Power8 User's Manual Section 10.1.12 Instruction Fusion

Differential Revision: https://reviews.llvm.org/D70651
 2020-03-12 05:15:41 +00:00