6 Commits

Author SHA1 Message Date
Kai Nacke
427fb35192 [PPC] Opaque pointer migration, part 1.
The LIT test cases were migrated with the script provided by
Nikita Popov. Due to the size of the change it is split into
several parts.

Reviewed By: nemanja, amyk, nikic, PowerPC

Differential Revision: https://reviews.llvm.org/D135470
2022-10-11 17:24:06 +00:00
Amy Kwan
af430944b3 [PowerPC][AIX] Allow VSX patterns to be 32-bit and 64-bit safe on P8+.
This patch updates two patterns involving `scalar_to_vector` and
`SCALAR_TO_VECTOR_PERMUTED` nodes to be safe for both 64-bit and 32-bit by
pulling the patterns out of the 64-bit specific guard. These patterns are
matched on POWER8 and above.

Differential Revision: https://reviews.llvm.org/D125389
2022-05-27 10:34:17 -05:00
Amy Kwan
0c1000cbd6 [NFC][PowerPC] Add 32-bit AIX RUN lines to test cases.
This patch adds 32-bit AIX RUN lines to several test cases, along with the
addition of one new test case, to prepare for future codegen changes involving
the PPCISD::SCALAR_TO_VECTOR_PERMUTED node on 32-bit mode.
2022-05-10 09:20:10 -05:00
Kamau Bridgeman
accf06feb1 Test commit. 2020-03-19 08:34:48 -05:00
Stefan Pintilie
6512473cee [PowerPC] Improve float vector gather codegen
This patch aims to improve the code generation for float vector gather on POWER9.
Patterns have been implemented to utilize instructions that deliver improved
performance.

Patch by: Kamau Bridgeman

Differential Revision: https://reviews.llvm.org/D62908
2019-11-18 15:53:32 -06:00
Stefan Pintilie
9d93893914 [PowerPC] Test case for vector float gather on ppc64le and ppc64
Test case to verify that the expected code is generated for a
vector float gather based on the patterns in tablegen for big
and little endian cases.

Patch by: Kamau Bridgeman

Differential Revision: https://reviews.llvm.org/D69443
2019-11-18 13:17:07 -06:00