10 Commits

Author SHA1 Message Date
Rahul Joshi
74335fb7ae
[LLVM][TableGen] Change X86MnemonicTables to use const RecordKeeper (#109053)
Change X86MnemonicTables to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-09-18 09:57:31 -07:00
Pierre van Houtryve
fa3d789df1
[RFC][TableGen] Restructure TableGen Source (#80847)
Refactor of the llvm-tblgen source into:
- a "Basic" library, which contains the bare minimum utilities to build
`llvm-min-tablegen`
- a "Common" library which contains all of the helpers for TableGen
backends. Such helpers can be shared by more than one backend, and even
unit tested (e.g. CodeExpander is, maybe we can add more over time)

Fixes #80647
2024-03-25 09:40:35 +01:00
NAKAMURA Takumi
9c93e728bf llvm-tblgen: Rewrite emitters to use TableGen::Emitter
Each emitter became self-contained since it has the registration of option.

Differential Revision: https://reviews.llvm.org/D144351
2023-03-21 16:21:27 +09:00
NAKAMURA Takumi
aeafcbcd75 llvm-tblgen: Add "TableGenBackends.h" to each emitter.
"TableGenBackends.h" has declarations of emitters.
2023-02-19 03:06:32 +09:00
NAKAMURA Takumi
afde3f549d llvm-tblgen: Apply IWYU partially 2023-02-17 00:32:46 +09:00
Shengchen Kan
271e8d2495 [X86][tablgen] Refine the class RecognizableInstr. NFCI
1. Add comments to explain why we set `isAsmParserOnly` for XACQUIRE and XRELEASE
2. Check `X86Inst` in the constructor of `RecognizableInstrBase` so that
   we can avoid the case where one of it's field is not initialized but
   accessed by user. (e.g. in X86EVEX2VEXTablesEmitter.cpp)
3. Move `Rec` from `RecognizableInstrBase` to `RecognizableInstr` to reduce
   size of `RecognizableInstrBase`
4. Remove out-of-date comments for shouldBeEmitted() (filter() was removed)
5. Add a basic field `IsAsmParserOnly` and remove the field
   `ShouldBeEmitted` b/c we can deduce it w/ little overhead
2022-03-26 22:41:49 +08:00
Shengchen Kan
bf11ed293a [X86][tablgen] Add class RecognizableInstrBase to simplify X86 code, NFCI 2022-03-26 13:03:06 +08:00
Shengchen Kan
e13faa40cf [X86][tablgen] Add interface getMnemonic to namespace X86Disassembler, NFCI
Address comments in D122477 b/c `getMnemonic` is common to X86 and may be
used in more than one place.
2022-03-26 09:55:54 +08:00
Amir Ayupov
442e9e1389 [X86][NFC] MnemonicTables: only access RI fields if they're initialized
Fix an issue reported by UBSan.

Test Plan:
Configure with `-DLLVM_USE_SANITIZER="Address;Undefined"`
`ninja llc`

Differential Revision: https://reviews.llvm.org/D122140
2022-03-21 09:25:29 -07:00
Amir Ayupov
fdcb256f97 [TableGen] X86 mnemonic tables backend
Add tablegen backend that generates X86 mnemonic-based opcode groupings, e.g.
`isADD`, `isTEST`, etc.

Addresses https://lists.llvm.org/pipermail/llvm-dev/2022-January/154526.html

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D121571
2022-03-18 01:43:53 -07:00