6 Commits

Author	SHA1	Message	Date
serge-sans-paille	989f1c72e0	Cleanup codegen includes ... This is a (fixed) recommit of https://reviews.llvm.org/D121169 after: 1061034926 before: 1063332844 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D121681	2022-03-16 08:43:00 +01:00
Zi Xuan Wu	9ee96aaab2	[CSKY] Add CK800 series ProcessorModel and complete related SubtargetFeatures ... Now we only support CSKY 800 series cpus and newer cpus in the future undering CSKYv2 ABI specification. There are 11 processor family enums for CK series cpus such as CK801, CK802, CK803, CK803S, CK804, CK805, CK807, CK810, CK810V, CK860, CK860V. The SchedMachineModels are not ready for different cpus, so only NoSchedModel is used.	2022-02-08 16:02:59 +08:00
Zi Xuan Wu	4fb282fec5	[CSKY] Add CSKY 16-bit instruction format and encoding ... CSKY is a ARCH which supports mixture of 16-bit and 32-bit instructions natively, and there is not an indivual predictor or feature to enable/disable 16-bit instruction. So I think it's better to add 16-bit instruction early, and naturally to use 16-bit and 32-bit instructions. Differential Revision: https://reviews.llvm.org/D112919	2021-11-08 10:02:15 +08:00
Zi Xuan Wu	cf78715cae	[CSKY] First patch to construct codegen infra and generate first add instruction ... Ooops. It constructs codegen infra and provide only basic code to generate first add instruction successfully. Differential Revision: https://reviews.llvm.org/D112206	2021-11-01 10:06:56 +08:00
Kazu Hirata	d8e4170b0a	Ensure newlines at the end of files (NFC)	2021-10-23 08:45:29 -07:00
Zi Xuan Wu	de10a02fc0	[CSKY] Complete to add basic integer instruction set ... Complete the basic integer instruction set and add related predictor in CSKY.td. And it includes the instruction definition and asm parser support. Differential Revision: https://reviews.llvm.org/D111701	2021-10-20 15:50:44 +08:00